CN102946229B - A kind of implementation method of Digital Down Convert - Google Patents
A kind of implementation method of Digital Down Convert Download PDFInfo
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- CN102946229B CN102946229B CN201210407163.2A CN201210407163A CN102946229B CN 102946229 B CN102946229 B CN 102946229B CN 201210407163 A CN201210407163 A CN 201210407163A CN 102946229 B CN102946229 B CN 102946229B
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Abstract
The invention provides a kind of implementation method of Digital Down Convert, the sampling rate of analog to digital converter (A/D) is 4/3 times of analog if signal center frequency point, makes the mixing in Digital Down Convert can adopt thick mixing, i.e. fs/4 mixing; Low pass filter LP adopts half-band filter, and then twice extracts and reduces signal rate.The effect that the present invention is useful is: the mixing in Digital Down Convert, filtering, extraction algorithm are perfectly combined, and adopts this structure greatly can reduce requirement to data processing speed, can save hard-wired resource.
Description
Technical field
The present invention relates to mobile communications network to cover and optimization field, the implementation method of mainly a kind of Digital Down Convert.
Background technology
Take software radio as the research and development of the communication system of new generation of feature, be regarded as the electronic technology revolution again after analog-and digital-technology.And Digital Down Convert (DDC) technology is one of key technology of software radio.
Digital down converter (DDC) is that after analog to digital converter (A/D) conversion of receiver, the work for the treatment of that first will complete, general DDC is made up of digital controlled oscillator (NCO), frequency mixer (MIXER), filter and withdrawal device.Main Function: analog if signal is after A/D sampling becomes digital medium-frequency signal, through digital mixing, digital real signal to be downconverted into digital real signal I and the empty signal Q signal of numeral of zero intermediate frequency, then after filtering, extract and reduce sample rate, then through row Digital Signal Processing below.
Summary of the invention
Object of the present invention just in order to overcome the deficiency of above-mentioned technology, and provides a kind of implementation method of Digital Down Convert.
The present invention solves the technical scheme that its technical problem adopts: the implementation method of this Digital Down Convert, the sampling rate of analog to digital converter (A/D) is that (center frequency point of hypothetical simulation signal is 150M for 4/3 times of analog if signal center frequency point, then the sample rate f s of A/D should be 200M), make the mixing in Digital Down Convert can adopt thick mixing, i.e. fs/4 mixing; Low pass filter LP adopts half-band filter, and then twice extracts and reduces signal rate.
Further, the method combines the mixing in Digital Down Convert, filtering, extraction algorithm, the digital signal of 4/3 times that the speed of A/D sampling is the real intermediate-freuqncy signal center frequency point of simulation, directly can convert two-way to by odd and even number point, be respectively odd number road: f (1) ,-f (3), f (5) ,-f (7) ... with even number road: f (2) ,-f (4), f (6) ,-f (8) ... two-way, the speed of signal becomes half; Odd number road wherein through a coefficient exponent number be original half-band filter half have limit for length's unit impulse response filter FIR just obtain zero intermediate frequency twice extract after real part I signal, and even number road be exactly zero intermediate frequency twice extract after imaginary part Q signal.
The effect that the present invention is useful is: the mixing in Digital Down Convert, filtering, extraction algorithm are perfectly combined, and adopts this structure greatly can reduce requirement to data processing speed, can save hard-wired resource.
Accompanying drawing explanation
Fig. 1 is digital down conversion system schematic diagram;
Fig. 2 is digital down converter method schematic diagram of the present invention;
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with accompanying drawing and citing, the present invention is further elaborated.Should be appreciated that citing described herein only in order to explain the present invention, be not intended to limit the present invention.
Fig. 1 is digital down conversion system schematic diagram.This system comprises three basic modules, digital controlled oscillator (NCO) frequency mixing module, filtration module and abstraction module.In NCO module just, cosine value generally obtains by look-up table, be then multiplied with input data respectively, complete digital mixing.
Extraction, the structure that filtration module is conventional are the cascades of Integrator-Comb decimation filter (CIC) or multi-level semi-band filter (HBF).If signal bandwidth is wider, extracting multiple is not very large, can adopt limit for length's unit impulse response filter (FIR).When input signal sampling rate is very large time, then can adopt the down-conversion scheme of multiphase filtering, operation link arrangement after extracting.
Fig. 2 is digital down conversion system schematic diagram of the present invention.The speed of A/D sampling is that (center frequency point of hypothetical simulation signal is 150MHz for 4/3 times of analog if signal center frequency point, then the sample rate f s of A/D should be 200MHz), then the signal after A/D sampling be turned into that sample rate is 200MHz, digital intermediate frequency is-50MHz digital signal f (n): f (1), f (2), f (3), f (4), f (5), f (6), f (7) ...
Frequency mixing module eliminates digital controlled oscillator, the scheme of thick mixing of having sampled.To be 200MHz sample rate according to mixing theory, digital intermediate frequency is the digital signal that the digital signal mixing of-50MHz becomes zero intermediate frequency, must produce a sample rate is 200MHz, frequency is the digital sine of 50MHz, cosine signal, the namely sine of 50MHz, sampling 4 points in cosine analog signal one-period, so we can select (10-10) of cosine signal in one-period and (010-1) these four points of sinusoidal signal, then be multiplied with digital signal f (n) and obtain the digital signal real part I:f (1) of zero intermediate frequency, 0,-f (3), 0, f (5), 0,-f (7), with the digital signal imaginary part Q:0 of zero intermediate frequency, f (2), 0,-f (4), 0, f (6), 0,
Half-band filter is the special circumstances (coefficient of its half is zero) of FIR filter, has a wide range of applications in the varying sampling rate of software radio.The later form of half low-pass filter (supposing that the exponent number of half low-pass filter in this programme is 7 rank) coefficient normalization is: a10a21a20a1, then the digital signal real part I of zero intermediate frequency through the filtered signal of half-band filter is:
I_f
hb(1)=a1*f(1)+0*0-a2*f(3)+1*0+a2*f(5)+0*0-a1*f(7)
=a1*{f(1)-f(7)}+a2*{f(5)-f(3)}、
I_f
hb(2)=..., the rear signal of twice extraction abandons,
I_f
hb(3)=-a1*f(3)+0*0+a2*f(5)+1*0-a2*f(7)+0*0+a1*f(9)、
=a1*{f(9)-f(3)}+a2*{f(5)-f(7)}、
I_f
hb(4)=..., the rear signal of twice extraction abandons,
……。
The digital signal real part Q of zero intermediate frequency through the filtered signal of half-band filter is:
Q_f
hb(1)=a1*0+0*f(2)+a2*0-1*f(4)+a2*0+0*f(6)+a1*0=-f(4)、
Q_f
hb(2)=..., the rear signal of twice extraction abandons,
Q_f
hb(3)=a1*0-0*f(4)+a2*0+1*f(6)+a2*0-0*f(8)+a1*0=f(6)、
Q_f
hb(4)=..., the rear signal of twice extraction abandons,
……。
So described from upper, the speed of A/D sampling is the digital signal of 4/3 times of the real intermediate-freuqncy signal center frequency point of simulation, directly can convert two-way to by odd and even number point, be respectively odd number road: f (1) ,-f (3), f (5) ,-f (7) ... with even number road: f (2) ,-f (4), f (6) ,-f (8) ... two-way, the speed of signal becomes half.Odd number road wherein through a coefficient is: the FIR filter of a1a2a2a1 just obtain zero intermediate frequency twice extract after real part I signal, and the imaginary part Q signal of even number road after to be exactly zero intermediate frequency twice extract.This programme does not need that NCO is just producing, cosine signal is multiplied with the sampled signal of A/D and adopts thick mixing, as long as realize 7 rank half-band filter twices to extract the digital iota signal that obtains through two subtractions, two multiplication and an addition, and Q road directly by even number rood to.This method will reduce the adder and the multiplier that are greater than 3/4 compared with general scheme, and the hardware implementing resource of Digital Down Convert is greatly reduced, and relevant multiply-add operation has been placed on computing below low rate, reduces the requirement to data processing speed.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvement and modification, these improve and modify and also should be considered as protection scope of the present invention.
Claims (1)
1. the implementation method of a Digital Down Convert, it is characterized in that: the method is the mixing in Digital Down Convert, filtering, extraction algorithm combines, the speed of modulus converter A/D sampling is 4/3 times of analog if signal center frequency point, signal then after A/D sampling is turned into digital signal f (n): f (1), f (2), f (3), f (4), f (5), f (6), f (7) directly convert two-way to by odd and even number point, be respectively odd number road: f (1),-f (3), f (5),-f (7), with even number road: f (2),-f (4), f (6),-f (8) ... two-way, the speed of signal becomes half, odd number road wherein through a coefficient exponent number be original half-band filter half have limit for length's unit impulse response filter FIR just obtain zero intermediate frequency twice extract after real part I signal, and even number road be exactly zero intermediate frequency twice extract after imaginary part Q signal, make the mixing in Digital Down Convert can adopt the thick mixing of fs/4, low pass filter LP adopts half-band filter, and then twice extracts and reduces signal rate.
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CN104320088B (en) * | 2014-10-27 | 2018-04-17 | 重庆会凌电子新技术有限公司 | A kind of Digital Down Convert circuit |
CN104393841A (en) * | 2014-11-20 | 2015-03-04 | 北京东方联星科技有限公司 | Implementation method and module for quadrature digital down conversion of IF digital signal |
CN105763497A (en) * | 2016-04-07 | 2016-07-13 | 成都华日通讯技术有限公司 | Zynq-based multichannel AM and FM demodulation method |
CN106330210B (en) * | 2016-08-29 | 2019-06-04 | 西安航天华迅科技有限公司 | A kind of transform method and signal conversion module of GNSS digital medium-frequency signal |
CN111697977B (en) * | 2019-03-12 | 2021-06-11 | 大唐移动通信设备有限公司 | Ultra-wideband frequency spectrum monitoring system and method |
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