CN102946229A

CN102946229A - Digital down conversion implementing method

Info

Publication number: CN102946229A
Application number: CN2012104071632A
Authority: CN
Inventors: 王利强; 金淮东; 洪杭迪
Original assignee: Sunwave Communications Co Ltd
Current assignee: Sunwave Communications Co Ltd
Priority date: 2012-10-23
Filing date: 2012-10-23
Publication date: 2013-02-27
Anticipated expiration: 2032-10-23
Also published as: CN102946229B

Abstract

The invention provides a digital down conversion implementing method. The sampling rate of an analog-digital (A/D) converter is 4/3 of the center frequency of an analog intermediate frequency signal, so that rough frequency mixing in digital down conversion can be adopted, namely fs/ 4 frequency mixing; a low-pass (LP) filter uses a half-band filter; and the signal rate is reduced by double extraction. The digital down conversion implementing method has the advantages as follows: frequency-mixing, filtering and extracting algorithms in the digital down conversion are perfectly combined; and by adopting the structure, a requirement on the data processing can be greatly reduced and hardware implementing resources can be saved.

Description

A kind of implementation method of Digital Down Convert

Technical field

The present invention relates to mobile communications network and cover and the optimization field, mainly is a kind of implementation method of Digital Down Convert.

Background technology

The research and development of the communication system of new generation take software radio as feature are regarded as the again electronic technology revolution after analog-and digital-technology.And Digital Down Convert (DDC) technology is one of key technology of software radio.

After digital down converter (DDC) is analog to digital converter (A/D) conversion of receiver, the work for the treatment of that at first will finish, general DDC is comprised of digital controlled oscillator (NCO), frequency mixer (MIXER), filter and withdrawal device.Main Function: after analog if signal process A/D sampling becomes digital medium-frequency signal, to be downconverted into digital real signal through digital mixing digital real signal I and the digital empty signal Q signal of zero intermediate frequency, then through filtering, extract to reduce sample rate, again through the Digital Signal Processing of row back.

Summary of the invention

Purpose of the present invention is just in order to overcome the deficiency of above-mentioned technology, and a kind of implementation method of Digital Down Convert is provided.

The present invention solves the technical scheme that its technical problem adopts: the implementation method of this Digital Down Convert, the sampling rate of analog to digital converter (A/D) is that (center frequency point of hypothetical simulation signal is 150M for 4/3 times of analog if signal center frequency point, then the sample rate f s of A/D should be 200M), so that the mixing in the Digital Down Convert can be adopted thick mixing, i.e. fs/4 mixing; Low pass filter LP adopts half-band filter, and then twice extracts and reduces signal rate.

Further, the method combines the mixing in the Digital Down Convert, filtering, extraction algorithm, the speed that A/D is sampled is 4/3 times digital signal of the real intermediate-freuqncy signal center frequency point of simulation, directly can convert two-way to by the odd and even number point, be respectively odd number road: f (1) ,-f (3), f (5) ,-f (7) ... with even number road: f (2) ,-f (4), f (6) ,-f (8) ... two-way, the speed of signal becomes half; Odd number road wherein is that half the limit for length's unit impulse response filter FIR of having of original half-band filter has just obtained real part I signal after the zero intermediate frequency twice extracts through a coefficient exponent number, and the imaginary part Q signal of even number road after to be exactly the zero intermediate frequency twice extract.

The effect that the present invention is useful is: the mixing in the Digital Down Convert, filtering, extraction algorithm are perfectly combined, adopt this structure can greatly reduce requirement to the data processing speed, can save hard-wired resource.

Description of drawings

Fig. 1 is the digital down conversion system schematic diagram;

Fig. 2 is digital down converter method schematic diagram of the present invention;

Embodiment

In order to make purpose of the present invention, technical scheme and advantage clearer, reach for example below in conjunction with accompanying drawing, the present invention is further elaborated.Should be appreciated that described herein giving an example only in order to explain the present invention, be not intended to limit the present invention.

Fig. 1 is the digital down conversion system schematic diagram.This system comprises the module of three basic, digital controlled oscillator (NCO) frequency mixing module, filtration module and abstraction module.In the NCO module just, cosine value generally obtains by look-up table, then multiplies each other with the input data respectively, finishes digital mixing.

The structure of extract, filtration module is commonly used is the cascade of integration pectination decimation filter (CIC) or multi-level semi-band filter (HBF).If signal bandwidth is wider, extracting multiple is not very large, can adopt limit for length's unit impulse response filter (FIR).When the input signal sampling rate is very large, then can adopt the down-conversion scheme of multiphase filtering, operation link is arranged in after the extraction.

Fig. 2 is digital down conversion system schematic diagram of the present invention.The speed of A/D sampling is that (center frequency point of hypothetical simulation signal is 150MHz for 4/3 times of analog if signal center frequency point, then the sample rate f s of A/D should be 200MHz), then the signal after the A/D sampling becomes as sample rate is 200MHz, digital intermediate frequency and is the digital signal f (n) of-50MHz: f (1), f (2), f (3), f (4), f (5), f (6), f (7) ...

Frequency mixing module has been removed digital controlled oscillator, the scheme of the thick mixing of having sampled.To be sample rate 200MHz according to the mixing theory, digital intermediate frequency becomes the digital signal of zero intermediate frequency for the-digital signal mixing of 50MHz, must produce a sample rate is 200MHz, frequency is the digital sine of 50MHz, cosine signal, the sine of 50MHz namely, 4 points of sampling in the cosine analog signal one-period, we can select (10-10) and (010-1) these four points of sinusoidal signal of cosine signal in the one-period so, the digital signal real part I:f (1) that then multiplies each other and obtain zero intermediate frequency with digital signal f (n), 0,-f (3), 0, f (5), 0,-f (7), digital signal imaginary part Q:0 with zero intermediate frequency, f (2), 0,-f (4), 0, f (6), 0;

Half-band filter is the special circumstances (its half coefficient is zero) of FIR filter, has a wide range of applications in the variable Rate sampling of software radio.The later form of half low-pass filter (exponent number of supposing half low-pass filter in this programme is 7 rank) coefficient normalization is: a1 0 a2 1 a2 0 a1, and then the digital signal real part I of zero intermediate frequency through the filtered signal of half-band filter is:

I_f _hb(1)=a1*f(1)+0*0-a2*f(3)+1*0+a2*f(5)+0*0-a1*f(7)

=a1*{f(1)-f(7)}+a2*{f(5)-f(3)}、

I_f _Hb(2)=..., after twice extracts signal abandon,

I_f _hb(3)=-a1*f(3)+0*0+a2*f(5)+1*0-a2*f(7)+0*0+a1*f(9)、

=a1*{f(9)-f(3)}+a2*{f(5)-f(7)}、

I_f _Hb(4)=..., after twice extracts signal abandon,

……。

The digital signal real part Q of zero intermediate frequency through the filtered signal of half-band filter is:

Q_f _hb(1)=a1*0+0*f(2)+a2*0-1*f(4)+a2*0+0*f(6)+a1*0=-f(4)、

Q_f _Hb(2)=..., after twice extracts signal abandon,

Q_f _hb(3)=a1*0-0*f(4)+a2*0+1*f(6)+a2*0-0*f(8)+a1*0=f(6)、

Q_f _Hb(4)=..., after twice extracts signal abandon,

……。

So by upper narration as can be known, the speed of A/D sampling is 4/3 times digital signal of the real intermediate-freuqncy signal center frequency point of simulation, directly can convert two-way to by the odd and even number point, be respectively odd number road: f (1) ,-f (3), f (5) ,-f (7) ... with even number road: f (2) ,-f (4), f (6) ,-f (8) ... two-way, the speed of signal becomes half.Odd number road wherein through a coefficient is: the FIR filter of a1 a2a2 a1 has just obtained the real part I signal after the extraction of zero intermediate frequency twice, and the even number road is exactly the imaginary part Q signal after the extraction of zero intermediate frequency twice.This programme does not need that NCO is just producing, the sampled signal of cosine signal and A/D multiplies each other and adopt thick mixing, realize that as long as 7 rank half-band filter twices extract the digital I signal that obtains through two subtractions, two multiplication and an addition, and the Q road directly by the even number rood to.This method is compared adder and the multiplier that will reduce greater than 3/4 with general scheme, greatly reduce so that the hardware of Digital Down Convert is realized resource, and relevant multiply-add operation has been placed on computing below the low rate, reduces the requirement to the data processing speed.

The above is only to be preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvement and modification, these improvement and modification also should be considered as protection scope of the present invention.

Claims

1. the implementation method of a Digital Down Convert is characterized in that, the sampling rate of analog to digital converter (A/D) is 4/3 times of analog if signal center frequency point, so that the mixing in the Digital Down Convert can be adopted thick mixing, i.e. and fs/4 mixing; Low pass filter LP adopts half-band filter, and then twice extracts and reduces signal rate.

2. the implementation method of Digital Down Convert according to claim 1, it is characterized in that: the method combines the mixing in the Digital Down Convert, filtering, extraction algorithm, the speed that A/D is sampled is 4/3 times digital signal of the real intermediate-freuqncy signal center frequency point of simulation, directly can convert two-way to by the odd and even number point, be respectively odd number road: f (1) ,-f (3), f (5) ,-f (7) ... with even number road: f (2) ,-f (4), f (6) ,-f (8) ... two-way, the speed of signal becomes half; Odd number road wherein is that half the limit for length's unit impulse response filter FIR of having of original half-band filter has just obtained real part I signal after the zero intermediate frequency twice extracts through a coefficient exponent number, and the imaginary part Q signal of even number road after to be exactly the zero intermediate frequency twice extract.