CN102905465A - Double-sided circuit board structure - Google Patents
Double-sided circuit board structure Download PDFInfo
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- CN102905465A CN102905465A CN2011102105288A CN201110210528A CN102905465A CN 102905465 A CN102905465 A CN 102905465A CN 2011102105288 A CN2011102105288 A CN 2011102105288A CN 201110210528 A CN201110210528 A CN 201110210528A CN 102905465 A CN102905465 A CN 102905465A
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- chip
- sandwich construction
- electrode pad
- chipset
- connection gasket
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
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Abstract
The invention relates to a double-sided circuit board structure which comprises a circuit board, a first chip group and a second chip group. The circuit board comprises a partition layer, a first multi-layer structure and a second multi-layer structure, the partition layer comprises a first surface and a second surface opposite to the first surface, the first multi-layer structure forms on the first surface, and the second multi-layer structure forms on the second surface. Each multi-layer structure comprises a first line layer, an intermediate layer and a second line layer, wherein the first line layer is formed on the first surface or the second surface, and the second line layer is formed on the intermediate layer which is formed on the first line layer and comprises a conductive line portion and a grounding portion. The first chip group is arranged on the grounding portion of the first multi-layer structure and electrically connected with the conductive line portion of the first multi-layer structure. The second chip group is arranged on the grounding portion of the second multi-layer structure and electrically connected with the conductive line portion of the second multi-layer structure.
Description
Technical field
The present invention relates to a kind of double-sided circuit plate structure.
Background technology
At present, the computing/processing speed of the demand for development electronic installation of calculator technology, the data transmission bauds between electronic installation function more and more faster and/or that electronic installation is integrated is more and more.Computing/processing speed, transmission speed and more function will inevitably require the integrated more multiple electronic modules of electronic installation faster.Only, the width of circuit board that integrated more electronic building brick can cause carrying these electronic building bricks increases, and does not meet the trend of current electronic device miniaturization.
Summary of the invention
In view of this, be necessary to provide a kind of double-sided circuit plate structure that can when improving the electronic building brick integrated level, not increase width of circuit board, be beneficial to the miniaturization of electronic installation.
A kind of double-sided circuit plate structure, it comprises circuit board, the first chipset and the second chipset, this circuit board comprises wall, the first sandwich construction and the second sandwich construction, this wall comprises first surface reaches and this first surface is opposing second, this first sandwich construction is formed on this first surface, this second sandwich construction is formed on this second, each sandwich construction comprises the first line layer that is formed on this first surface or this second, be formed on the intermediate layer on this first line layer and be formed on the second line layer on this intermediate layer, this second line layer comprises conducting wire section and grounding parts, this first chipset is arranged on this grounding parts of this first sandwich construction and with this conducting wire section of this first sandwich construction and is electrically connected, and this second chipset is arranged on this grounding parts of this second sandwich construction and with this conducting wire section of this second sandwich construction and is electrically connected.
Above-mentioned double-sided circuit plate structure provided by the invention, by distinguishing the chip placement group wall two apparent surfaces, make the integrated more electronic building brick of board structure of circuit not increase the width of circuit board simultaneously, be conducive to the miniaturization of this double-sided circuit plate structure and use the miniaturization of the electronic installation of this double-sided circuit plate structure.
A kind of double-sided circuit plate structure, it comprises circuit board, the first chipset and the second chipset, and this circuit board comprises wall, the first sandwich construction and the second sandwich construction, and this wall comprises first surface reaches and this first surface is opposing second.This first sandwich construction is formed on this first surface, and this second sandwich construction is formed on this second.Each sandwich construction comprises the first line layer that is formed on this first surface or this second, be formed on the intermediate layer on this first line layer and be formed on the second line layer on this intermediate layer, this first line layer comprises grounding parts, this second line layer comprises conducting wire section, this first sandwich construction offer run through this second line layer and this intermediate layer the first through hole to expose this grounding parts, this second sandwich construction offer run through this second line layer and this intermediate layer the second through hole to expose this grounding parts, this first chipset places in this first through hole and is positioned on this grounding parts of this first sandwich construction and with this conducting wire section of this first sandwich construction and is connected by wire, and this second chipset places in this second through hole and is positioned on this grounding parts of this second sandwich construction and with this conducting wire section of this second sandwich construction and is connected by wire.
Above-mentioned double-sided circuit plate structure provided by the invention, by distinguishing the chip placement group wall two apparent surfaces, make the integrated more electronic building brick of board structure of circuit not increase the width of circuit board simultaneously, be conducive to the miniaturization of this double-sided circuit plate structure and use the miniaturization of the electronic installation of this double-sided circuit plate structure.Further, chipset placed chipset is reduced with respect to the height of conducting wire section, and then so that connect the wire of chip and conducting wire section and shorten, therefore can reduce the equivalent inductance value of wire and reduce wire inductive effect and so that the easy coupling and reduce the signal loss of circuit impedance, also can reduce simultaneously the use of wire, save cost.
Description of drawings
A kind of schematic cross-section with double-sided circuit plate structure of packaged glass that Fig. 1 provides for first embodiment of the invention.
Fig. 2 is the vertical view of the double-sided circuit plate structure of Fig. 1 when this packaged glass is not installed.
The schematic cross-section of a kind of double-sided circuit plate structure that Fig. 3 provides for second embodiment of the invention.
The schematic cross-section of a kind of double-sided circuit plate structure that Fig. 4 provides for third embodiment of the invention.
The schematic cross-section of a kind of double-sided circuit plate structure that Fig. 5 provides for four embodiment of the invention.
The schematic cross-section of a kind of double-sided circuit plate structure that Fig. 6 provides for fifth embodiment of the invention.
The schematic cross-section of a kind of double-sided circuit plate structure that Fig. 7 provides for sixth embodiment of the invention.
The schematic cross-section of a kind of double-sided circuit plate structure that Fig. 8 provides for seventh embodiment of the invention.
The schematic cross-section of a kind of double-sided circuit plate structure that Fig. 9 provides for eighth embodiment of the invention.
The schematic cross-section of a kind of double-sided circuit plate structure that Figure 10 provides for ninth embodiment of the invention.
The schematic cross-section of a kind of double-sided circuit plate structure that Figure 11 provides for tenth embodiment of the invention.
The main element symbol description
| The double-sided |
700，800，801，100，200，300，400，500，600，601 |
| |
70 |
| The |
701，102 |
| The |
702，202 |
| |
71，72，81，82，85，11，12，21，22，32，51，52，61，62，63，65，67，69 |
| |
714，724 |
| |
73，74，83，84，86，40，41，23，34 |
| |
75，76 |
| |
901 |
| |
710，720，110，210 |
| |
706，708，716，718，106，108，206，208 |
| The |
707，717，107，207 |
| Conducting |
709，719，109，209 |
| |
711，721 |
| Through |
101，201 |
| The |
712，111 |
| The |
713，723 |
| |
715，725 |
| The |
722，121 |
| The |
119 |
| The |
219 |
| |
704 |
| Second | 705 |
| |
71a，72a，11a，12a，51a，52a，61a，62a，64a，64b，66a，66b，68a，68b，69a， |
| Chip pair | |
| 64，66，68，69c |
Following embodiment further specifies the present invention in connection with above-mentioned accompanying drawing.
Embodiment
Below in conjunction with graphic the present invention is described in further detail.
See also Fig. 1 to Fig. 2, a kind of double-sided circuit plate structure 700 that first embodiment of the invention provides comprises circuit board 70, the first chipset 71, the second chipset 72, the first protective layer 73, the second protective layer 74, the first packaged glass 75 and the second packaged glass 76.
This circuit board 70 comprises wall 901, the first sandwich construction 701 and the second sandwich construction 702.This wall 901 comprise first surface 704 and with opposing second 705 of this first surface 704.The first sandwich construction 701 is formed on this first surface 704, and this second sandwich construction 702 is formed on this second 705.
This first sandwich construction 701 comprises the first line layer 706 that is formed on this first surface 704, is formed on the first intermediate layer 707 on this first line layer 706 and is formed on the second line layer 708 on this first intermediate layer 707.This second line layer 708 comprises conducting wire section 709 and grounding parts 710.This first intermediate layer 707 can be a layer insulating or can be to comprise such as metal level and insulating barrier and replaces stacking multiple layer.
In the present embodiment, the material of this wall 901 is pottery.Grounding parts 710 is used for connecting earth terminal.In the present embodiment, please refer to the drawing 2, (Fig. 2 is the vertical view that removes the double-sided circuit plate structure 700 of the first packaged glass 75 and the first protective layer 73) this conducting wire section 709 comprises 4 the first connection gaskets 711.
In the present embodiment, the first chipset 71 comprises first a chip 71a, and this first chip 71a is arranged on this grounding parts 710 of this first sandwich construction 701.The material of grounding parts 710 is metal, thereby metal grounding parts 710 is conducive to the heat dispersion that the heat radiation of the first chip 71a promotes double-sided circuit plate structure 700, and grounding parts 710 also can filter out the Electromagnetic Interference that produces near circuit the first chip 71a and filter out the Electromagnetic Interference that the first chip 71a produces when work, avoided the first chip 71a with should near the interfering with each other of circuit.Should near circuit can comprise when other circuit, electronic component (such as the second chipset 72) and/or this double-sided circuit plate structure 700 that this double-sided circuit plate structure 700 comprises are applied to other electronic installation the circuit that this electronic installation comprises.The back side of the first chip 71a can be sticked together on grounding parts 710 and so that this first chip 71a and this grounding parts 710 mutually insulateds by the insulation viscose.
The first chip 71a is electrically connected with this conducting wire section 709 of this first sandwich construction 701.Particularly, the first chip 71a comprises the first end face 712 and is positioned at 4 the first chip electrode pads 713 on the first end face 712.These 4 the first chip electrode pads 713 connect these 4 the first connection gaskets 711 by 4 the first wires 714 respectively.The first wire 714 can connect this first chip electrode pad 713 and this first connection gasket 711 by the method that engages (wire bonding) such as routing.The first wire 714 can be gold thread, and aluminum steel or copper cash etc. is applicable to the metal wire as conductor wire.
The material of the first protective layer 73 is heat reactive resin, such as polyimide resin (polyimide resin), epoxy resin (epoxy resin), organic siliconresin (silicone resin) and analog.Certainly, the material of the first protective layer 73 also is not limited to above-mentioned cited, and all protective layer materials in the art also can be used for the present invention.In the present embodiment, this first protective layer 73 covers this first wire 714, the first chip electrode pad 713, this first wire 714 and the junction of this first chip electrode pad 713 and the junction of this first wire 714 and this first connection gasket 711.The first protective layer 73 can be strengthened the first wire 714 also can increase the non-oxidizability of the first wire 714, the first chip electrode pad 713 and the first connection gasket 711 to prolong the useful life of double-sided circuit plate structure 700 simultaneously with the bonding strength of conducting wire section 709 and the first chip 71a respectively.In the present embodiment; this first chip 71a is luminescence chip; such as laser diode (laser diode), the first end face 712 of the first chip 71a comprises the exposed region 715 that is not covered by the first protective layer 73, and this exposed region 715 corresponds to the illuminating part of the first chip 71a.This structure is conducive to promote the light extraction efficiency of the first chip 71a.Be appreciated that the first protective layer 73 also can cover the other parts of the first chip 71a except exposed region 715.
The first packaged glass 75 is bonding on the first protective layer 73, the first chip 71a is encapsulated in the double-sided circuit plate structure 700 to protect the first chip 71a to avoid the erosion of steam and dust and to seal this exposed region 715.For example, the first protective layer 73 circumferential edges of being bonding on the first packaged glass 75 seals this exposed region 715 to form enclosure space.In other embodiments, according to the further lifting of light extraction efficiency and/or to the needs of volume minimizing etc., the first packaged glass 75 can be removed.
This second sandwich construction 702 comprise the first line layer 716(of being formed on this second 705 for the first sandwich construction 701 in the differences done nominally of the first line layer 706, call tertiary circuit layer 716 in the following text), be formed on this tertiary circuit layer 716 the first intermediate layer 717(for the first sandwich construction 701 in the first intermediate layer 707 do nominally differences, call the second intermediate layer 717 in the following text) and be formed on this second intermediate layer 717 the second line layer 718(for the first sandwich construction 701 in the second line layer 708 do nominally differences, call the 4th line layer 718 in the following text).The 4th line layer 718 comprises conducting wire section 719 and grounding parts 720.This second intermediate layer 717 can be a layer insulating or can be to comprise such as metal level and insulating barrier and replaces stacking multiple layer.
In the present embodiment, the second chipset 72 comprises second a chip 72a, and this second chip 72a is arranged on this grounding parts 720 of this second sandwich construction 702.The material of grounding parts 720 is metal, thereby the grounding parts of metal 720 is conducive to the heat dispersion that the heat radiation of the second chip 72a promotes double-sided circuit plate structure 700, and grounding parts 720 also can filter out the Electromagnetic Interference that produces near circuit the second chip 72a and filter out the Electromagnetic Interference that the second chip 72a produces when work, avoided the second chip 72a with should near the interfering with each other of circuit.Should near circuit can comprise when other circuit, electronic component (such as the first chipset 71) and/or this double-sided circuit plate structure 700 that this double-sided circuit plate structure 700 comprises are applied to other electronic installation the circuit that this electronic installation comprises.The back side of the second chip 72a can be sticked together on grounding parts 720 and so that this second chip 72a and this grounding parts 720 mutually insulateds by the insulation viscose.
The second chip 72a is electrically connected with this conducting wire section 719 of this second sandwich construction 702.Particularly, the second chip 72a comprises the second end face 722 and is positioned at 4 the second chip electrode pads 723 on the second end face 722.These 4 the second chip electrode pads 723 connect these 4 the second connection gaskets 721 by 4 the second wires 724 respectively.The second wire 724 can connect this second chip electrode pad 723 and this second connection gasket 721 by the method that engages (wire bonding) such as routing.The second wire 724 can be gold thread, and aluminum steel or copper cash etc. is applicable to the metal wire as conductor wire.
The material of the second protective layer 74 is heat reactive resin, such as polyimide resin (polyimide resin), epoxy resin (epoxy resin), organic siliconresin (silicone resin) and analog.Certainly, the material of the second protective layer 74 also is not limited to above-mentioned cited, and all protective layer materials in the art also can be used for the present invention.In the present embodiment, this second protective layer 74 covers this second wire 724, this second chip electrode pad 723, this second wire 724 and the junction of this second chip electrode pad 723 and the junction of this second wire 724 and this second connection gasket 721.The second protective layer 74 can be strengthened the second wire 724 also can increase the non-oxidizability of the second wire 724, the second chip electrode pad 723 and the second connection gasket 721 to prolong the useful life of double-sided circuit plate structure 700 simultaneously with the bonding strength of conducting wire section 719 and the second chip 72a respectively.In the present embodiment; this second chip 72a is photodiode chip; such as photodiode (photo diode), the second end face 722 of the second chip 72a comprises the exposed region 725 that is not covered by the second protective layer 74, and this exposed region 725 corresponds to the photographic department of this second chip 72a.This structure is conducive to promote the receipts optical efficiency of the second chip 72a.Be appreciated that the second protective layer 74 also can cover the other parts of the second chip 72a except exposed region 725.
The second packaged glass 76 is bonding on the second protective layer 74, the second chip 72a is encapsulated in the double-sided circuit plate structure 700 to protect the second chip 72a to avoid the erosion of steam and dust and to seal this exposed region 725.For example, the second protective layer 74 circumferential edges of being bonding on the second packaged glass 76 seals this exposed region 725 to form enclosure space.In other embodiments, according to the further lifting of receiving optical efficiency and/or to the needs of volume minimizing etc., the second packaged glass 76 can be removed.
Double-sided circuit plate structure 700 provided by the invention, by distinguishing chip placement groups 71,72 901 liang of apparent surfaces 704 of wall, 705, make the integrated more electronic building bricks of board structure of circuit 700 not increase the width of circuit board 70 simultaneously, be conducive to the miniaturization of this double-sided circuit plate structure 700 and use the miniaturization of the electronic installation of this double-sided circuit plate structure 700.In addition, the double-sided circuit plate structure 700 in the above-mentioned execution mode is applicable to optical communication/transmission field, the function that it possesses the emission of light signal and receives.Further, the increasing degree of board structure of circuit 700 thickness (highly) is much smaller with respect to board structure of circuit 700 width increasing degrees, therefore, the increase of board structure of circuit 700 thickness (highly) is also less on the impact that the miniaturization of board structure of circuit 700 brings, for example, the thickness increasing degree of double-sided circuit plate structure is several millimeters, and the width increasing degree of single-sided circuit board structure is 1-2cm 2 chipsets is set.
See also Fig. 3, a kind of double-sided circuit plate structure 800 that second embodiment of the invention provides.Double-sided circuit plate structure 700 differences of this double-sided circuit plate structure 800 and the first execution mode are: the first protective layer 83 covers the first chipset 81; the second protective layer 84 covers the second chipset 82, and has omitted the first packaged glass and the second packaged glass.
See also Fig. 4, a kind of double-sided circuit plate structure 801 that third embodiment of the invention provides.Double-sided circuit plate structure 700 differences of this double-sided circuit plate structure 801 and the first execution mode are: the second protective layer 86 covers the second chipset 85, and has omitted the second packaged glass.
See also Fig. 5, a kind of double-sided circuit plate structure 100 that four embodiment of the invention provides.Double-sided circuit plate structure 700 differences of this double-sided circuit plate structure 100 and the first execution mode are: the first line layer 106 of the first sandwich construction 102 comprises grounding parts 110, this second line layer 108 comprises conducting wire section 109, this first sandwich construction 102 offer run through this second line layer 108 and the first intermediate layer 107 the first through hole 101 to expose this grounding parts 110.The first chipset 11 places in this first through hole 101 and is positioned on this grounding parts 110 of this first sandwich construction 102 and with this conducting wire section 109 of this first sandwich construction 102 and is electrically connected.The first protective layer 40 is filled the first through hole 101.
The tertiary circuit layer 206 of the second sandwich construction 202 comprises grounding parts 210, the 4th line layer 208 comprises conducting wire section 209, this second sandwich construction 202 offer run through the 4th line layer 208 and the second intermediate layer 207 the second through hole 201 to expose this grounding parts 210.The second chipset 12 places in this second through hole 201 and is positioned on this grounding parts 210 of this second sandwich construction 202 and with this conducting wire section 209 of this second sandwich construction 202 and is electrically connected.The second protective layer 41 is filled the second through hole 201.
This first chipset 11 comprises first a chip 11a, this first chip 11a comprises the first end face 111, this second chipset 12 comprises second a chip 12a, this second chip 12a comprises the second end face 121, this conducting wire section 109 of this first sandwich construction 102 comprises the 3rd end face 119, and this conducting wire section 209 of this second sandwich construction 202 comprises the 4th end face 219.In the present embodiment, this first end face 111 is in same level with the 3rd end face 119, and this second end face 121 is in same level with the 4th end face 219.
Except having the advantage identical with the double-sided circuit plate structure of above-mentioned execution mode, the double-sided circuit plate structure 100 of present embodiment places chipset 11,12 in this through hole 101,201 and is positioned on this grounding parts 110,210, chipset 11,12 is reduced with respect to conducting wire section 109,209 height, and then so that connect chipset 11,12 and conducting wire section 109,209 wire (scheming not label) shorten, therefore can reduce the equivalent inductance value of wire and reduce the inductive effect of wire, also can reduce simultaneously the use of wire, save cost.
See also Fig. 6, a kind of double-sided circuit plate structure 200 that fifth embodiment of the invention provides.Double-sided circuit plate structure 100 differences of this double-sided circuit plate structure 200 and the 4th execution mode are: the first protective layer 23 covers the first chipset 21; the second protective layer 24 covers the second chipset 22, and has omitted the first packaged glass and the second packaged glass.
See also Fig. 7, a kind of double-sided circuit plate structure 300 that sixth embodiment of the invention provides.Double-sided circuit plate structure 100 differences of this double-sided circuit plate structure 300 and the 4th execution mode are: the second protective layer 34 covers the second chipset 32, and has omitted the second packaged glass.
See also Fig. 8, a kind of double-sided circuit plate structure 400 that seventh embodiment of the invention provides.Double-sided circuit plate structure 700 differences of this double-sided circuit plate structure 400 and the first execution mode are: the first chipset 51 comprises a plurality of the first chip 51a, the second chipset 52 comprises a plurality of the second chip 52a, and the quantity of the first chip 51a is identical with the quantity of the second chip 52a.The first chip 51a is luminescence chip, and such as laser diode (laser diode), the second chip 52a is photodiode chip, such as photodiode (photo diode).
In the present embodiment, chipset is arranged on the grounding parts, can be understood as grounding parts and comprises a plurality of sub-grounding parts, and each chip is arranged on the corresponding sub-grounding parts.
See also Fig. 9, a kind of double-sided circuit plate structure 500 that eighth embodiment of the invention provides.Double-sided circuit plate structure 100 differences of this double-sided circuit plate structure 500 and the 4th execution mode are: the first chipset 61 comprises a plurality of the first chip 61a, the second chipset 62 comprises a plurality of the second chip 62a, and the quantity of the first chip 61a is identical with the quantity of the second chip 62a.The first chip 61a is luminescence chip, and such as laser diode (laser diode), the second chip 62a is photodiode chip, such as photodiode (photo diode).
In the present embodiment, chipset is arranged on the grounding parts, can be understood as grounding parts and comprises a plurality of sub-grounding parts, and each chip is arranged on the corresponding sub-grounding parts.Chipset is arranged in the through hole, can be understood as through hole and comprises a plurality of sub-through holes, and each chip is arranged in the corresponding sub-through hole.
See also Figure 10, a kind of double-sided circuit plate structure 600 that ninth embodiment of the invention provides.Double-sided circuit plate structure 400 differences of this double-sided circuit plate structure 600 and the 7th execution mode are: the first chipset 63 comprises that a plurality of the first chips are to 64, each first chip comprises first a chip 64a and second a chip 64b to 64, and the quantity of the first chip 64a is identical with the quantity of the second chip 64b.The first chip 64a is luminescence chip, and such as laser diode (laser diode), the second chip 62b is photodiode chip, such as photodiode (photo diode).The second chipset 65 comprises a plurality of the second chips to 66, and each second chip comprises first a chip 66a and second a chip 66b to 66, and the quantity of the first chip 66a is identical with the quantity of the second chip 66b.The first chip 66a is luminescence chip, and such as laser diode (laser diode), the second chip 66b is photodiode chip, such as photodiode (photo diode).
See also Figure 11, a kind of double-sided circuit plate structure 601 that tenth embodiment of the invention provides.Double-sided circuit plate structure 500 differences of this double-sided circuit plate structure 601 and the 8th execution mode are: the first chipset 67 comprises that a plurality of the first chips are to 68, each first chip comprises first a chip 68a and second a chip 68b to 68, and the quantity of the first chip 68a is identical with the quantity of the second chip 68b.The first chip 68a is luminescence chip, and such as laser diode (laser diode), the second chip 68b is photodiode chip, such as photodiode (photo diode).The second chipset 69 comprises a plurality of the second chips to 69c, and each second chip comprises first a chip 69a and second a chip 69b to 69c, and the quantity of the first chip 69a is identical with the quantity of the second chip 69b.The first chip 69a is luminescence chip, and such as laser diode (laser diode), the second chip 69b is photodiode chip, such as photodiode (photo diode).
In addition, those skilled in the art can also do other variation in spirit of the present invention, as in other embodiments, 1) this first end face and the 3rd end face are in same level, and this second end face and the 4th end face are in different level; Or 2) this first end face and the 3rd end face are in different level, reach this second end face and the 4th end face and are in same level; Or 3) this first end face and the 3rd end face are in different level, reach this second end face and the 4th end face and are in different level.Certainly, the variation that these are done according to spirit of the present invention all should be included within the present invention's scope required for protection.
Claims (10)
1. double-sided circuit plate structure, it comprises circuit board, the first chipset and the second chipset, this circuit board comprises wall, the first sandwich construction and the second sandwich construction, this wall comprises first surface reaches and this first surface is opposing second, this first sandwich construction is formed on this first surface, this second sandwich construction is formed on this second, each sandwich construction comprises the first line layer that is formed on this first surface or this second, be formed on the intermediate layer on this first line layer and be formed on the second line layer on this intermediate layer, this second line layer comprises conducting wire section and grounding parts, this first chipset is arranged on this grounding parts of this first sandwich construction and with this conducting wire section of this first sandwich construction and is electrically connected, and this second chipset is arranged on this grounding parts of this second sandwich construction and with this conducting wire section of this second sandwich construction and is electrically connected.
2. double-sided circuit plate structure as claimed in claim 1, it is characterized in that, this first chipset comprises a luminescence chip, this luminescence chip comprises the first chip electrode pad, this conducting wire section of this first sandwich construction comprises the first connection gasket, this the first chip electrode pad connects this first connection gasket by wire, this second chipset comprises a photodiode chip, this photodiode chip comprises the second chip electrode pad, this conducting wire section of this second sandwich construction comprises the second connection gasket, and this second chip electrode pad connects this second connection gasket by wire.
3. double-sided circuit plate structure as claimed in claim 2; it is characterized in that; this double-sided circuit plate structure also comprises protective layer, this protective layer cover this wire, this first chip electrode pad, this second chip electrode pad, this wire respectively with the junction of this first chip electrode pad and this second chip electrode pad and this wire respectively with the junction of this first connection gasket and this second connection gasket.
4. double-sided circuit plate structure as claimed in claim 1, it is characterized in that, this first chipset comprises a plurality of luminescence chips, each luminescence chip comprises the first chip electrode pad, this conducting wire section of this first sandwich construction comprises the first connection gasket, this the first chip electrode pad connects this first connection gasket by wire, this second chipset comprises a plurality of photodiode chips, each photodiode chip comprises the second chip electrode pad, this conducting wire section of this second sandwich construction comprises the second connection gasket, and this second chip electrode pad connects this second connection gasket by wire.
5. double-sided circuit plate structure as claimed in claim 1, it is characterized in that, this first chipset comprises a plurality of the first chips pair, each first chip is to comprising a luminescence chip and a photodiode chip, each luminescence chip that this first chip is right and each photodiode chip include the first chip electrode pad, this conducting wire section of this first sandwich construction comprises the first connection gasket, this the first chip electrode pad connects this first connection gasket by wire, this second chipset comprises a plurality of the second chips pair, each second chip is to comprising a luminescence chip and a photodiode chip, each luminescence chip that this second chip is right and each photodiode chip include the second chip electrode pad, this conducting wire section of this second sandwich construction comprises the second connection gasket, and this second chip electrode pad connects this second connection gasket by wire.
6. double-sided circuit plate structure, it comprises circuit board, the first chipset and the second chipset, this circuit board comprises wall, the first sandwich construction and the second sandwich construction, this wall comprises first surface reaches and this first surface is opposing second, this first sandwich construction is formed on this first surface, this second sandwich construction is formed on this second, each sandwich construction comprises the first line layer that is formed on this first surface or this second, be formed on the intermediate layer on this first line layer and be formed on the second line layer on this intermediate layer, this first line layer comprises grounding parts, this second line layer comprises conducting wire section, this first sandwich construction offer run through this second line layer and this intermediate layer the first through hole to expose this grounding parts, this second sandwich construction offer run through this second line layer and this intermediate layer the second through hole to expose this grounding parts, this first chipset places in this first through hole and is positioned on this grounding parts of this first sandwich construction and with this conducting wire section of this first sandwich construction and is connected by wire, and this second chipset places in this second through hole and is positioned on this grounding parts of this second sandwich construction and with this conducting wire section of this second sandwich construction and is connected by wire.
7. double-sided circuit plate structure as claimed in claim 6, it is characterized in that, this first chipset comprises a luminescence chip, this luminescence chip comprises the first chip electrode pad, this conducting wire section of this first sandwich construction comprises the first connection gasket, this the first chip electrode pad connects this first connection gasket by this wire, this second chipset comprises a photodiode chip, this photodiode chip comprises the second chip electrode pad, this conducting wire section of this second sandwich construction comprises the second connection gasket, and this second chip electrode pad connects this second connection gasket by this wire.
8. double-sided circuit plate structure as claimed in claim 6, it is characterized in that, this first chipset comprises a plurality of luminescence chips, each luminescence chip comprises the first chip electrode pad, this conducting wire section of this first sandwich construction comprises the first connection gasket, this the first chip electrode pad connects this first connection gasket by this wire, this second chipset comprises a plurality of photodiode chips, each photodiode chip comprises the second chip electrode pad, this conducting wire section of this second sandwich construction comprises the second connection gasket, and this second chip electrode pad connects this second connection gasket by this wire.
9. double-sided circuit plate structure as claimed in claim 6, it is characterized in that, this first chipset comprises a plurality of the first chips pair, each first chip is to comprising a luminescence chip and a photodiode chip, each luminescence chip that this first chip is right and each photodiode chip include the first chip electrode pad, this conducting wire section of this first sandwich construction comprises the first connection gasket, this the first chip electrode pad connects this first connection gasket by this wire, this second chipset comprises a plurality of the second chips pair, each second chip is to comprising a luminescence chip and a photodiode chip, each luminescence chip that this second chip is right and each photodiode chip include the second chip electrode pad, this conducting wire section of this second sandwich construction comprises the second connection gasket, and this second chip electrode pad connects this second connection gasket by this wire.
10. double-sided circuit plate structure as claimed in claim 6, it is characterized in that, this first chipset comprises a luminescence chip, this luminescence chip comprises the first end face, this second chipset comprises a photodiode chip, this photodiode chip comprises the second end face, this conducting wire section of this first sandwich construction comprises the 3rd end face, this conducting wire section of this second sandwich construction comprises the 4th end face, this first end face and the 3rd end face are in same level or are in different level, reach this second end face and the 4th end face and are in same level or are in different level.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011102105288A CN102905465A (en) | 2011-07-26 | 2011-07-26 | Double-sided circuit board structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011102105288A CN102905465A (en) | 2011-07-26 | 2011-07-26 | Double-sided circuit board structure |
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| CN102905465A true CN102905465A (en) | 2013-01-30 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2011102105288A Pending CN102905465A (en) | 2011-07-26 | 2011-07-26 | Double-sided circuit board structure |
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| CN107613665A (en) * | 2017-08-11 | 2018-01-19 | 沈雪芳 | Multilayer conducting construction processing method, linear circuit plate processing method and line source |
| CN115127081A (en) * | 2021-03-18 | 2022-09-30 | 光宝科技股份有限公司 | Dimmable light emitting device |
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