A kind of power bipolar transistor and preparation method thereof
Technical field
The invention belongs to semiconductor device and technique and make the field, be specifically related to power bipolar transistor structure and preparation method thereof.
Background technology
Power bipolar transistor just began to obtain to use in commerce since the 1950's.Although the appearance of 20 century 70 power MOSFETs has replaced power bipolar transistor in some application scenarios, because the advantage such as its technology maturation, current handling capability be strong still is widely used as switching device in various middle-size and small-size Power Electronic Circuit.The physical characteristic of power bipolar transistor is similar with common triode in essence, but in order to realize the high collector voltage of power bipolar transistor, has introduced the high resistance collector region.
Second breakdown is the one of the main reasons that power bipolar transistor lost efficacy in application, and second breakdown is normally expendable, so harmfulness is very large.It is one of mechanism that causes second breakdown that electric current is concentrated the thermal instability that causes.When the emitter junction of bipolar transistor is in forward bias, because there is lateral resistance in the base, the base resistance self-biasing effect that produces when base current flows will force emitter current to concentrate on the emitter junction edge flowing, and the inhomogeneities that material, production technology cause might cause that also emitter current concentrates on the emitter junction edge.Electric current is concentrated and can be caused chip temperature to raise, because the bipolar transistor electric current has positive temperature characterisitic, the rising of temperature causes again further concentrating of electric current, forms the vicious circle of electric current and temperature and causes device to burn.
For the second breakdown that prevents that emitter current collection limit from causing, measure commonly used is in emitter or base stage series ballast resistance, utilize steady resistance to limit the vicious circle that electric current, temperature appear in the emitter region do negative feedback, steady resistance is made by metal film or polysilicon.But because the electric current of high-power switching transistor is larger, thereby can consuming larger power, the existence of steady resistance reduces output gain; On the other hand, although the electric current that steady resistance can balanced each emitter stripes, can not balanced each emitter stripes in the inhomogeneities of certain regional area electric current.In addition, making steady resistance also needs to increase manufacturing facilities and production process, has increased manufacturing cost.On the technique also normal the employing reduce the collection limit that the base resistor measure below the emitter junction prevents emitter current, namely improve the doping content in the base, reduce base resistance.To be subject to emitter region limit doping content, base transport factor but improve base doping concentration, and the restriction of base punchthrough effect, thereby the amplitude of improving is limited.
For fear of the impact of emitter region edge-crowding effect of current on bipolar device second breakdown characteristic, Shu Mei etc. (see SCIENCE﹠amp at document " improving a kind of method of high-power switching transistor second breakdown capacity "; TECHNOLOGYINFORMATION 2007NO.24page 233-234) a kind of area of not obvious change chip has been proposed, by domain is carried out particular design, remedy deficiency in the design by adjusting process again, thereby the method for the second breakdown power capacity of Effective Raise high-power switching transistor: as shown in Figure 3, in base 3, make a corral around base metal electrode 6, loop configuration 8 with the identical doping type in emitter region, this loop configuration 8 can stop base current directly to flow to the emitter sidewall, avoid at emitter sidewall place electric current occuring and concentrate, also avoided the impact of surface recombination on the bipolar transistor base transport factor simultaneously.Yet because loop configuration 8 has identical doping type with the emitter region, this can increase the dead resistance of base, brings extra power consumption to power bipolar transistor.
Summary of the invention
The object of the present invention is to provide new construction of a kind of power bipolar transistor and preparation method thereof, alleviate the emitter current collection side effect of power bipolar transistor, improve the second breakdown capacity of power bipolar transistor, simultaneously on the not impact of power bipolar transistor power output.The present invention has provided the preparation method of described power bipolar transistor new construction simultaneously.
Technical solution of the present invention is as follows:
A kind of power bipolar transistor as shown in Figure 1, comprises from down to up successively: collector region metal electrode 1, the collector region 2 that is made of the first conductive type semiconductor material, the base 3 that is made of the second conductive type semiconductor material; The top of base 3 has respectively with base 3 Surface Contacts, base metal electrode 6 and the emitter region 4 that is made of the first conductive type semiconductor material; The top of emitter region 4 has the emitter region metal electrode 7 with emitter region 4 Surface Contacts; Between the sidewall of emitter region 4 and the base metal electrode 6, and fill spacer medium 5 between base metal electrode 6 and the emitter region metal electrode 7.
Operation principle of the present invention:
Conventional bipolar transistor shown in Figure 2, there is base resistance in the current path from base metal electrode 6 to the emitter region 4 junction planes.When the base electric current is larger, will produces pressure drop at base resistance, thereby reduce the bias voltage that is added on the emitter junction.Because base resistance is distributed resistance, the closer to the electric current at edge, emitter region, the distributed base resistance of process less, also less in the pressure drop that distributed resistance produces.The result causes the junction bias of emitter junction zones of different different, and therefore the emitter current by the emitter junction zones of different is inhomogeneous, and higher the closer to the local current density at emitter junction edge, this phenomenon is called the emitter region edge-crowding effect of current.Electric current is concentrated and can be caused chip temperature to raise, because the bipolar transistor electric current has positive temperature characterisitic, the rising of temperature causes again further concentrating of electric current, forms the vicious circle of electric current and temperature and causes device to burn.
For fear of the impact of emitter region edge-crowding effect of current on bipolar device second breakdown characteristic, Shu Mei etc. (see SCIENCE﹠amp at document " improving a kind of method of high-power switching transistor second breakdown capacity "; TECHNOLOGYINFORMATION 2007NO.24page 233-234) a kind of area of not obvious change chip has been proposed, by domain is carried out particular design, remedy deficiency in the design by adjusting process again, thereby the method for the second breakdown power capacity of Effective Raise high-power switching transistor: as shown in Figure 3, in base 3, make a corral around base metal electrode 6, loop configuration 8 with the identical doping type in emitter region, this loop configuration 8 can stop base current directly to flow to the emitter sidewall, avoid at emitter sidewall place electric current occuring and concentrate, also avoided the impact of surface recombination on the bipolar transistor base transport factor simultaneously.Yet because loop configuration 8 has identical doping type with the emitter region, this can increase the dead resistance of base, brings extra power consumption to power bipolar transistor.
The power bipolar transistor that the present invention proposes, as shown in Figure 4, owing to only having a contact-making surface between emitter region 4 and the base 3, the sidewall of emitter region 4 does not contact with base 3; The sidewall of simultaneously having filled spacer medium 5(between the sidewall of emitter region 4 and the base metal electrode 6 and be emitter region 4 is isolated dielectric layer 5 encirclements); So avoided the directly sidewall of 3 inflow emitter regions 4 from the base of base current, alleviated edge-crowding effect of current.Simultaneously, make base metal electrode 6 by borehole on spacer medium 5, the increase of the base dead resistance that the loop configuration 8 of having avoided prior art shown in Figure 3 to introduce is brought is on the not impact of power bipolar transistor power output.
Therefore, beneficial effect of the present invention comprises two aspects: (1) has alleviated the emitter region edge-crowding effect of current that occurs in the power bipolar transistor sidewall, is conducive to improve the second breakdown power capacity of device; (2) can not increase the base dead resistance, on the not impact of power bipolar transistor power output.
Description of drawings
Fig. 1 is the schematic diagram of a kind of power bipolar transistor provided by the invention.
Fig. 2 is the base current schematic diagram of conventional power bipolar transistor.
Fig. 3 is document (Shu Mei " improving a kind of method of high-power switching transistor second breakdown capacity " SCIENCE﹠amp; The base current schematic diagram of the power bipolar transistor that TECHNOLOGY INFORMATION 2007NO.24page 233-234) proposes.
Fig. 4 is the base current schematic diagram of a kind of power bipolar transistor provided by the invention.
Among Fig. 1 to Fig. 4, the 1st, the collector region metal electrode, the 2nd, the collector region that is consisted of by the first conductive type semiconductor material, the 3rd, the base that is consisted of by the second conductive type semiconductor material, the 4th, the emitter region that is consisted of by the first conductive type semiconductor material, the 5th, spacer medium, the 6th, base metal electrode, the 7th, the emitter region metal electrode, the 8th, in base 3 around base metal electrode 6, with the loop configuration of the identical doping type in emitter region.The Ib representative flows into the electric current of emitter region from the base.
Fig. 5 is a kind of domain structure of power bipolar transistor provided by the invention.
Wherein, the 1st, emitter region, the 2nd, emitter region contact hole, the 3rd, base contact hole, the 4th, dielectric layer.
What Fig. 5-a-Fig. 5-f provided is preparation technology's flow process of a kind of power bipolar transistor provided by the invention.
Fig. 5-a represents the formation of base.
Fig. 5-b represents the formation of emitter region.
Fig. 5-c represents grooving around the emitter region.
Fig. 5-d represents the formation of spacer medium.
Fig. 5-e represents the etching of spacer medium.
Fig. 5-f represents the depositing metal electrode.
Embodiment
A kind of power bipolar transistor as shown in Figure 1, comprises from down to up successively: collector region metal electrode 1, the collector region 2 that is made of heavy doping the first conductive type semiconductor material, the base 3 that is made of the second conductive type semiconductor material; The top of base 3 has respectively with base 3 Surface Contacts, base metal electrode 6 and the emitter region 4 that is made of the first conductive type semiconductor material; The top of emitter region 4 has the emitter region metal electrode 7 with emitter region 4 Surface Contacts; Between the sidewall of emitter region 4 and the base metal electrode 6, and fill spacer medium 5 between base metal electrode 6 and the emitter region metal electrode 7.
A kind of preparation method of power bipolar transistor shown in figure Fig. 5-a-Fig. 5-f, may further comprise the steps:
Step 1: adopt the first conductive type semiconductor substrate as the collector region 2 of power bipolar transistor, at collector region 2 surperficial external pressure growth one deck the first conductive type semiconductor materials; Then in the first conductive type semiconductor material of external pressure growth, carry out the second conduction type and mix, form the base 3 of the power bipolar transistor of the second conductive type semiconductor material formation;
Step 2: the doping of the first conduction type is carried out on 3 surfaces in the base, forms the first conductive type semiconductor material that one deck is positioned at 3 surfaces, base;
Step 3: the first conductive type semiconductor material on 3 surfaces, photoetching base, form the emitter region 4 that the first conductive type semiconductor material consists of, etch areas should be exposed 3 surfaces, base fully;
Step 4: at etch areas and emitter region 4 Film by Thermal Oxidation one deck thin oxide layers of step 3, the deposit thick oxide layer is filled and led up the etch areas of step 3 again; Wherein oxide layer is as the spacer medium 5 of power bipolar transistor;
Step 5: the photoetching oxide layer, 4 surfaces form the emitter region ohmic contact hole in the emitter region, and 3 surfaces form the base ohmic contact hole in the base;
Step 6: plated metal forms emitter region metal electrode 7 in the ohmic contact hole of emitter region, and plated metal forms base metal electrode 6 in the base ohmic contact hole, forms collector region metal electrode 1 at collector region 2 backside deposition metals.
The below further specifies the main technological steps of device preparation take the NPN bipolar transistor as example:
(a) monocrystalline silicon is prepared, and adopts the N+ silicon substrate, and doping content is 1.6 * 10
19Cm
-3, its crystal orientation is<111 〉, thickness is 200 μ m;
(b) at N+ surface of silicon epitaxial growth N-epitaxial loayer, N-epitaxial thickness and impurity concentration are determined by device withstand voltage;
(c) form P type base, at first use ion implantation technology to N-epitaxial loayer B Implanted atom, implantation dosage is 2e13cm
-2, Implantation Energy is 100keV, and 1150 ℃ of high annealings again obtain the junction depth and the CONCENTRATION DISTRIBUTION that need, and shown in Fig. 5-a, wherein 2 is collector regions that N type semiconductor consists of, the 3rd, the base that P type semiconductor forms;
(d) form the N-type emitter region, inject phosphorus atoms to P type base with diffusion technology, implantation dosage is 1.5e15cm
-2, whether Implantation Energy is 80keV, require to select to anneal according to junction depth again, and then obtain needed junction depth and CONCENTRATION DISTRIBUTION.Shown in Fig. 5-b, wherein 2 is collector regions that N type semiconductor consists of, the 3rd, and the base that P type semiconductor forms, the 4th, the emitter region that N type semiconductor forms;
(e) grooving around in the emitter region, bottom land should contact with the base.Shown in Fig. 5-c, wherein 2 is collector regions that N type semiconductor consists of, the 3rd, and the base that P type semiconductor forms, the 4th, the emitter region that N type semiconductor forms;
(f) thermal oxidation forms one deck thin oxide layer at groove and surface, emitter region, and oxidizing temperature is 850 ℃, dried oxygen.Its objective is defective and the damage of eliminating semiconductor surface, reduce the recombination losses of base electric current;
(g) deposit thick oxide layer is filled groove smooth, and oxide layer will cover whole device surface.Shown in Fig. 5-d, wherein 2 is collector regions that N type semiconductor consists of, the 3rd, and the base that P type semiconductor forms, the 4th, the emitter region that N type semiconductor forms, the 5th, form oxide layer (spacer medium) at groove and surface, emitter region;
(h) photoetching and etching oxidation layer, the contact hole of formation base and emitter region is shown in Fig. 5-e, wherein 2 is collector regions that N type semiconductor consists of, the 3rd, the base that P type semiconductor forms, the 4th, the emitter region that N type semiconductor forms, the 5th, form oxide layer at groove and surface, emitter region;
(i) the metal A l of deposition thickness 4 μ m, photoetching and etching metal, form the electrode of base and emitter region, shown in Fig. 5-f, wherein 1 is the collector region metal electrode, the 2nd, the collector region that N type semiconductor consists of, the 3rd, the base that P type semiconductor forms, the 4th, the emitter region that N type semiconductor forms, the 5th, form oxide layer at groove and surface, emitter region, the 6th, be positioned at the base metal electrode on the base, the 7th, be positioned at the emitter region electrode on the emitter region.
In implementation process, can as the case may be, in the situation that basic structure is constant, carry out certain accommodation design.Semi-conducting materials replacement body silicon such as available carborundum, GaAs, indium phosphide or germanium silicon also when making device.