CN102831041A - Portable logic analyzer based on FPGA (Field Programmable Gate Array) - Google Patents

Portable logic analyzer based on FPGA (Field Programmable Gate Array) Download PDF

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Publication number
CN102831041A
CN102831041A CN201210323116XA CN201210323116A CN102831041A CN 102831041 A CN102831041 A CN 102831041A CN 201210323116X A CN201210323116X A CN 201210323116XA CN 201210323116 A CN201210323116 A CN 201210323116A CN 102831041 A CN102831041 A CN 102831041A
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China
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fpga
logic analyser
logic analyzer
sampling
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CN201210323116XA
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杨军
王小军
舒平平
赵嘎
陈成
李剑
孔延兵
杜琛
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Yunnan University YNU
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Yunnan University YNU
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Abstract

The invention relates to a portable logic analyzer, which aims at the defect that the current cassette virtual logic analyzer needs to depend on a computer, and is realized by adopting an FPGA (Field Programmable Gate Array) technology design with good real-time, reconfigurability and reliability. The logic analyzer supports 3 kinds of sampling pattern and 10 kinds of different sampling frequencies. The logic analyzer is provided with 6 sampling channels, and each channel supports two trigger modes, namely a rising edge and a failing edge. A whole system adopts a black box testing method, and the designed various functions are tested in a detailed mode. Practices prove that the logic analyzer achieves an expected target, and the logic analyzer has the characteristics of low cost and convenience in carry.

Description

Portable logic analyser based on FPGA
Technical field
Logic analyser is to utilize the instrument of clock from testing apparatus collection and display digit signal, and main effect is the sequential judgement.Because logic analyser has many electric pressures unlike the oscillograph that kind; Usually only show two voltages (logical one and 0); Therefore after having set reference voltage, logic analyser is judged measured signal that the person is High to be higher than the reference voltage through comparer; The person is Low to be lower than the reference voltage, between High and Low, forms digital waveform.For example: a measured signal uses the logic analyser of 200MHz sampling rate; When reference voltage is set at 1.5V; Logic analyser will be taked a point by average every 5ns when measuring, and surpassing 1.5V person is High (logical one), and being lower than 1.5V person is Low (logical zero); Logical one then and 0 can connect into a simple wave form, and the slip-stick artist just can find out exception error (bug) part in this continuous wave.Generally speaking, when logic analyser is measured measured signal, can't demonstrate magnitude of voltage, just High is with the difference of Low; If measuring voltage just necessarily needs to use oscillograph.Except the demonstration difference of magnitude of voltage, logic analyser and oscillographic another difference are number of channels.General oscillograph has only 2 passages or 4 passages, and logic analyser can have from 16 passages, 32 passages, 64 passages and up to a hundred port numbers and do not wait, so logic analyser possesses the advantage of carrying out multiple channel test simultaneously.
Background technology
When the product of exploitation digital circuit, all can run into various faults.According to statistics; Spend during the research and development product in the time of debugging and will want many more than design time; So in order to improve research and development of products efficient; Shorten Time To Market and dominate the market faster, engineers all can belong to logic analyser observation problem intuitively, thereby deals with problems rapidly and accelerate research and development speed greatly.Logic analyser is a kind of oscillographic waveform testing equipment that is similar to, the logic level (high or low) when it can monitor hardware circuit work, and store; Mode with figure is expressed intuitively, is convenient to the user and detects, the mistake in the analysis circuit design (hardware designs and software design); Logic analyser is an indispensable equipment in the design, through it, can promptly locate mistake; Deal with problems, reach the effect of getting twice the result with half the effort.
According to the difference in the hardware device design, logic analyser can be divided into stand alone type (or stand-alone type) logic analyser and the PC-based cassette FVLA that needs to combine computer haply on the market at present.The stand alone type logic analyser is with all testing softwares, computing managent component and is incorporated among the instrument; The cassette FVLA computer of then need arranging in pairs or groups uses together, and display screen also separates with main frame.
With regard to whole specification; The stand alone type logic analyser has developed into quite high-level product; For example sampling rate can reach 8GHz, port number extends to 300 more than the passage, and storage depth is relatively also high, and free-standing logic analyser cost an arm and a leg in the past; Do not wait from several ten thousand to hundreds thousand of Renminbi, the general user seldom affords to use.
Cassette FVLA based on computer interface provides corresponding performance with less cost, but the cassette FVLA has some shortcomings: at first, its use need highly rely on computing machine, is not having the use of having no way of under the situation of computing machine.Its two, though the cassette FVLA is portable, whole cassette chip only is responsible for the collection of signal and is sent to computer, main processing part software on computers is to utilize software to realize the function of logic analyser, so be called FVLA.And the pure relatively hardware handles of speed that adopts software processes wants slow.
Summary of the invention
The present invention is directed to the deficiency of present cassette FVLA, propose to utilize FPGA to add the VGA display and realize a portable logic analyser.In design, mainly contain following several advantage.
At first solve the shortcoming that present cassette logic analyser height relies on computing machine, only needed the clamp of a band VGA interface, added the VGA display and just can realize portable logic analyser, really realized portable characteristics.
Secondly because that the FPGA technology has speed is fast, outstanding feature such as resource occupation is few, and dirigibility is high, and cost is low, therefore adopt total system that the FPGA technology realizes relatively and the cassette FVLA to have speed fast, characteristics such as real-time height.
Moreover total system has multiple function, can dispose different triggering modes and trigger mode, and can dispose ten kinds of different SFs.Simultaneously all right extended channel satisfies functional need.
Whole invention has reached following functional requirement:
(1) this logic analyser ability steady operation is under the clock frequency of 100MHz, and the video data degree of depth is 64 (can change data depth through the degree of depth of easy configuration shift register).
(2) this logic analyser adopts 6 tunnel (also can pass through easy configuration reaches 64 tunnel) signal capture input channel, and 6 road sampling channels all support rising edge or negative edge to trigger.
(3) this logic analyser can dispose three kinds of sampling patterns through the toggle switch of stirring on the development board: pattern one---and show and trigger back 64 bit data; Pattern two---show and trigger front and back 32 bit data; Pattern three---show and trigger preceding 64 bit data.
(4) this logic analyser uses the display of being with the VGA interface as the waveform show tools, be operated under the 60Hz/640*480 resolution, and be the demonstration length of unit with per 8 pixels as a sampled data.
(5) amplification and the translation of support waveform are through stirring toggle switch realization corresponding function on the development board.
(6) this logic analyser (is realized through toggle switch) except the system reset button that a FPGA is arranged, and also has the sampling of a logic analyser to remove button (realizing through keyswitch), and is effectively low.Be used to remove current sample waveform, trigger to begin a new sampling.
(7) the present invention supports SF in 10: 100M, 50M, 25M, 10M, 2M, 1M, 500K, 200K, 100K, 10K; Realize the increase and the minimizing of SF through button on the development board.Adjustable SF (sampling period) is as shown in the table, is divided into 10 grades.
Frequency/Hz 100M 50M 25M 10M 2M 1M 500K 200K 100K 10K
Cycle 10ns 20ns 40ns 100ns 500ns 1μs 2μs 5μs 10μs 100μs
The total system design realizes that its system global structure can be participated in Figure of description 1 on Quartus II development platform.In total system is designed and developed, adopt the progressively method for designing of refinement of top-down sub-module.To introduce the concrete design of each module below in detail.
(1) VGA display control module
The VGA display control module is one of nucleus module of total system, main realization two functions, INTERFACE DESIGN and display drivers in this module.In program, we further are divided into a lot of little display modules with the INTERFACE DESIGN module again, finally realize the design of whole interface.Driver module mainly is provided for the interface that driving display display interface design module is designed.The end interface display interface can be referring to Figure of description 2.
(2) sampling module
Sampling module also is the design's a nucleus module, in this design, mainly comprises four little modules, is respectively button and detects, and trigger mode is selected, data acquisition and data storage module.The function that mainly realizes at the button detection module has, and detects 3 push button signallings on the development board, and carries out function corresponding according to different key, and increase and minimizing and sampled signal that 3 buttons are respectively applied for the control SF are clear.After triggering, each button all can on display, relevant variation be arranged corresponding position.
(3) system synchronization module
The system synchronization module is fairly simple, mainly uses the PLL phaselocked loop to realize, the clock frequency of input 50MHz on the development board is given VGA and sampling module respectively through the clock of PLL output 25MHz and 100MHz.
Sub-module adopts bottom-up method after realizing the function of each sub-module again, and each module synthesis is got up, and the top-level module figure after comprehensive can participate in Figure of description 3.Whole design is carried out emulation after accomplishing on Quartus II, after emulation was passed through, total system downloads to carried out physical varification on the development platform.After success was downloaded, package system adopted the Black-box Testing method, and each function of system has been carried out test one by one.Through the analytical test result, native system is stable, and speed is fast, reaches all requirements of functional requirement part basically.
The design is directed against the deficiency that current cassette FVLA need rely on computing machine, adopts the FPGA technical design of real-time, reconfigurability and good reliability also to realize a portable logic analyser.This logic analyser is supported 3 kinds of sampling patterns, 10 kinds of different sample frequencies; And have 6 sampling channels, each passage is all supported rising edge or two kinds of triggering modes of negative edge.Total system adopts the Black-box Testing method, and each item function that is designed has been carried out detailed test.Realize proof, this logic analyser has reached the set goal, and it is low to have a cost, the characteristics that are convenient for carrying.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the present invention is further specified.The order of accompanying drawing is following:
Fig. 1 system global structure figure
The final display interface figure of Fig. 2
Fig. 3 system top level diagram
Fig. 4 simulation result figure
Fig. 5 system testing operation panorama sketch
Fig. 1 is the one-piece construction figure of system, and we can see that total system is made up of 3 big modules in the drawings, are respectively sampling modules, and VGA display module and system synchronization module are subdivided into a plurality of little modules again in each inside modules.In the whole design, sampling module and VGA display module are the emphasis of this logic analyser.
Fig. 2 is after system accomplishes, the display interface of total system, and the interface is short and sweet, can both give birth in detail at the interface for functions all in the whole invention to show.
Fig. 3 after the design of system design sub-module is accomplished, adds the result that relevant circuit integrates with each module.
Fig. 4 is after system design is accomplished, the result after carrying out emulation on the Quartus II software platform.
Fig. 5 after total system emulation is passed through, downloads to the program of being edited on the development board, the test run panorama sketch that assembles then.
Embodiment
The present invention has at first made a concrete analysis of the current situation of current logic analyser; Be directed against the deficiency of cassette logic analyser then; Propose improvement project, adopt the FPGA techniques make use Verilog Programming with Pascal Language of real-time, reconfigurability and good reliability on Quartus II platform, to realize the design.It has been carried out emulation testing accomplishing the design back, after emulation is passed through, it has been downloaded to carry out physical varification on the development board, in validation test, adopted the Black-box Testing method, each item function that is designed has been carried out detailed test.Through the analytical test result, native system is stable under the frequency of 100MHz, has a good application prospect.

Claims (4)

1. portable logic analyser based on FPGA; With the realization of on Quartus II development platform, programming of Verilog hardware description language; DE2 and DE0 with ALTERA company are hardware platform; But designed a portable logic analyser of the flexible configuration based on FPGA; Its essential characteristic is: exploitation has realized comprising sampling module on the FPGA platform, and synchronization module and VGA display module be totally three modules, adds relevant peripheral circuit and can under the frequency of 100MHz, carry out stable work.
2. a kind of portable logic analyser according to claim 1 based on FPGA; The function that it had is: support 3 kinds of sampling patterns; 10 kinds of different sample frequencies; Have 6 sampling channels, each passage is all supported rising edge or two kinds of triggering modes of negative edge, and can realize the amplification and the translation of sampled result.
3. a kind of portable logic analyser according to claim 1 based on FPGA, the characteristics that it had are: do not rely on computing machine, do not need the operating system support; Be convenient for carrying, adopt the FPGA technical design, cost is low; Speed is fast, and resource occupation is few, and reconfigurability is strong; Reliability is high, can satisfy the application demand of high-speed real-time.
4. a kind of portable logic analyser according to claim 1 based on FPGA; The simple structure characteristic of can working after it is accomplished is: a band VGA interface hardware development board; And the display that has the VGA interface arbitrarily; The minimum system of having formed this logic analyser, sampling probe are the interfaces of aircraft formula.
CN201210323116XA 2012-09-05 2012-09-05 Portable logic analyzer based on FPGA (Field Programmable Gate Array) Pending CN102831041A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103257606A (en) * 2013-04-22 2013-08-21 北京控制工程研究所 USB interface high-speed and real-time sampling logic analyzer
CN104836994A (en) * 2015-05-20 2015-08-12 公安部沈阳消防研究所 Disaster site information acquisition device and method
WO2016183696A1 (en) * 2015-05-18 2016-11-24 孕龙科技股份有限公司 Logic analyzer and probe thereof
CN108319200A (en) * 2018-02-28 2018-07-24 西安电子科技大学 A kind of portable internet logic analyser

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103257606A (en) * 2013-04-22 2013-08-21 北京控制工程研究所 USB interface high-speed and real-time sampling logic analyzer
CN103257606B (en) * 2013-04-22 2015-08-19 北京控制工程研究所 A kind of USB interface high-speed real-time sampling logic analyser
WO2016183696A1 (en) * 2015-05-18 2016-11-24 孕龙科技股份有限公司 Logic analyzer and probe thereof
CN104836994A (en) * 2015-05-20 2015-08-12 公安部沈阳消防研究所 Disaster site information acquisition device and method
CN108319200A (en) * 2018-02-28 2018-07-24 西安电子科技大学 A kind of portable internet logic analyser

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Application publication date: 20121219