CN207992293U - A kind of video triggered equipment and oscillograph based on separator and FPGA - Google Patents
A kind of video triggered equipment and oscillograph based on separator and FPGA Download PDFInfo
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- CN207992293U CN207992293U CN201621236713.9U CN201621236713U CN207992293U CN 207992293 U CN207992293 U CN 207992293U CN 201621236713 U CN201621236713 U CN 201621236713U CN 207992293 U CN207992293 U CN 207992293U
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- video
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- selector
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Abstract
The utility model discloses a kind of video triggered equipment and oscillograph based on separator and FPGA, the wherein video triggered equipment include：Input selector for video signals, the input terminal of the input selector for video signals accesses different vision signals, the output end of input selector for video signals is connected at least two-stage amplifying circuit, the output end of afterbody amplifying circuit is connected with signal polarity selector, the signal polarity selector is connected with video separator, and the video separator is connected with fpga chip.
Description
Technical field
The utility model belongs to video data field more particularly to a kind of video triggered equipment based on separator and FPGA
And oscillograph.
Background technology
In daily life, Video Applications are seen everywhere.Position parity field, the whole audience rapidly in numerous and complicated vision signal
Which even specific position is not an easily thing.At this moment, it is necessary to a reliable and stable video triggering dress
It sets.
Which when Video Applications exploitation debugging, need quickly to navigate to the even specific position of parity field, the whole audience.It is existing
Technical solution：FPGA detects trigger device, as shown in Figure 1.The principle of FPGA detections trigger device shown in FIG. 1 is vision signal
It is inputted into fpga chip by a certain channel, quantifies to sample through ADC devices.FPGA counts the pulse width of sampled signal,
By being compared with the pulse width of known video format and umber of pulse, line number, parity field and the whole audience are identified, and then realize
Triggering positioning in user preset triggering pattern.Measurement circuit design is all completed inside FPGA.
By the existing scheme schematic diagram of Fig. 1 signals it is found that vision signal is selected through four analog channels, adopted by ADC quantizations
Fpga chip is directly entered after sample.Signal distortion after sampling by oscillograph storage depth, when base gear, that is, sample rate influenced,
If the timely base gear selection of storage depth is unreasonable, cause the distortion factor larger, the detection of FPGA digital circuits also will error.And it is different
The video of format needs corresponding triggering parser circuitry, causes triggering parser circuitry complex, virtually increases instrument
Debugging difficulty and the development cycle.
Utility model content
In order to solve the disadvantage that the prior art, first purpose of the utility model are to provide one kind and being based on separator and FPGA
Video triggered equipment.The vision signal that the video triggered equipment of the utility model can be directed to different-format carries out triggering solution
Analysis, video triggered equipment circuit is simple, and synchronous triggering is reliable and stable.
A kind of video triggered equipment based on separator and FPGA of the utility model, including：Vision signal input selection
The input terminal of device, the input selector for video signals accesses different vision signals, the output of input selector for video signals
End is connected at least two-stage amplifying circuit, and the output end of afterbody amplifying circuit is connected with signal polarity selector, the letter
Number polarity selector is connected with video separator, and the video separator is connected with fpga chip.
The input selector for video signals selection of video triggered equipment based on separator and FPGA in the utility model
Signal in one video channel is improved by least two-stage amplifying circuit, forms the signal of constant gain so that video separation
Device normally parses M signal and is sent to FPGA, and FPGA again analyzes these M signals, parses vision signal
Odd field, even field, the whole audience and line number, so that the clear logic of whole device, circuit is simple, for different applied fields
It closes, replacement video separator is more convenient, and the digital circuit change of FPGA design is smaller, shortens the development cycle.
The output end of the input selector for video signals is also connected with ADC quantization samplers.The video of the utility model
Signal in one video channel of signal input selector selection also passes through ADC quantization samplings, is used for simultaneous display.
The fpga chip is connected with display device.
The ADC quantizations sampler is also connected with display device.
Another video triggered equipment based on separator and FPGA of the utility model, including：Vision signal input choosing
Select device, the input terminal of the input selector for video signals accesses different vision signals, input selector for video signals it is defeated
Go out end signal and be divided into two-way, is directly connected all the way with ADC quantization samplers；Another way is connected at least two-stage amplifying circuit, most
The output end of rear stage amplifying circuit is connected with signal polarity selector, the signal polarity selector and video separator phase
Even, the video separator is connected with fpga chip.
The ADC quantization samplers and fpga chip are connected with display device.
Second purpose of the utility model is to provide a kind of oscillograph.
A kind of oscillograph of the utility model, including display and the video triggered equipment based on separator and FPGA；Institute
The video triggered equipment for stating FPGA includes input selector for video signals, the input terminal access of the input selector for video signals
Different vision signals, the output end of input selector for video signals are connected at least two-stage amplifying circuit, afterbody amplification
The output end of circuit is connected with signal polarity selector, and the signal polarity selector is connected with video separator, the video
Separator is connected with fpga chip.
Vision signal input selection in the video triggered equipment based on separator and FPGA of the utility model oscillograph
Signal in one video channel of device selection is improved by least two-stage amplifying circuit, forms the signal of constant gain so that
Video separator normally parses M signal and is sent to FPGA, and FPGA again analyzes these M signals, parses
The odd field of vision signal, even field, the whole audience and line number, so that the clear logic of whole device, circuit is simple, for different
Application scenario, replacement video separator is more convenient, and the digital circuit change of FPGA design is smaller, shortens the development cycle.
The output end of the input selector for video signals is also connected with ADC quantization samplers.
The fpga chip is connected with display；Or the ADC quantizations sampler is also connected with display.
Another oscillograph of the utility model, including display and the video triggered equipment based on separator and FPGA；
The video triggered equipment of the FPGA includes input selector for video signals, the input termination of the input selector for video signals
Enter different vision signals, the output end signal of input selector for video signals is divided into two-way, directly quantifies to sample with ADC all the way
Device is connected；Another way is connected at least two-stage amplifying circuit, output end and the signal polarity selector of afterbody amplifying circuit
It is connected, the signal polarity selector is connected with video separator, and the video separator is connected with fpga chip.
Vision signal input selection in the video triggered equipment based on separator and FPGA of the utility model oscillograph
Signal in one video channel of device selection is improved by least two-stage amplifying circuit, forms the signal of constant gain so that
Video separator normally parses M signal and is sent to FPGA, and FPGA again analyzes these M signals, parses
The odd field of vision signal, even field, the whole audience and line number, so that the clear logic of whole device, circuit is simple, for different
Application scenario, replacement video separator is more convenient, and the digital circuit change of FPGA design is smaller, shortens the development cycle.
The output end of the input selector for video signals is also connected with ADC quantization samplers.The video of the utility model
Signal in one video channel of signal input selector selection also passes through ADC quantization samplings, is used for simultaneous display.
The fpga chip is connected with display.
The ADC quantizations sampler is also connected with display.
The beneficial effects of the utility model are：
(1) in a video channel of the input selector for video signals selection of the video triggered equipment of the utility model
Signal is improved by least two-stage amplifying circuit, forms the signal of constant gain so that video separator normally parses centre
Signal is simultaneously sent to FPGA, and FPGA again analyzes these M signals, parses the odd field of vision signal, even field, the whole audience
And line number, so that the clear logic of whole device, circuit is simple, for different application scenarios, replaces video separator
It is more convenient, and the digital circuit change of FPGA design is smaller, shortens the development cycle.
(2) the oscillograph clear logic of the utility model, circuit is simple, for different application scenarios, replaces video point
It is more convenient from device, and the digital circuit change of FPGA design is smaller, shortens the development cycle.
Description of the drawings
Fig. 1 is that traditional FPGA detects trigger device structural schematic diagram；
Fig. 2 is one structural schematic diagram of video triggered equipment embodiment based on separator and FPGA of the utility model；
Fig. 3 is two structural schematic diagram of video triggered equipment embodiment based on separator and FPGA of the utility model.
Specific implementation mode
The utility model is described further with embodiment below in conjunction with the accompanying drawings：
Embodiment one
Fig. 2 is one structural schematic diagram of video triggered equipment embodiment based on separator and FPGA of the utility model.Such as
Video triggered equipment shown in Fig. 2 based on separator and FPGA, including：Input selector for video signals, the vision signal
The input terminal of input selector accesses different vision signals, and the output end of input selector for video signals amplifies at least two-stage
Circuit be connected, the output end of afterbody amplifying circuit is connected with signal polarity selector, the signal polarity selector with regard
Frequency separator is connected, and the video separator is connected with fpga chip.
Wherein, input selector for video signals is achieved using multi-channel data selector.
Signal polarity selector is realized using alternative data selector.
Input selector for video signals is used to choose the channel of input video, and signal source is provided for back-end circuit.
At least for two-stage amplifying circuit for improving channel input signal, anti-stop signal is excessively faint, causes rear end
It can not test and analyze.As shown in Figure 2 by taking the two-stage amplifying circuit in the utility model as an example：
The processing of two-stage amplifying circuit can avoid the case where channel conditioning distortion from occurring so that the recognition capability of instrument increases
By force, synchronous triggering is more reliable and more stable.
Signal polarity selector, the polarity for signal select to carry out input signal at any time with phase and reverse phase convenient for user
Switching.
Video separator is used for videodataclus tearing, and FPGA is combined to realize that the analysis to vision signal, parsing are unusual
Field, even field, the whole audience and line number.
LM1881MX models may be used to realize in video separator.
The input selector for video signals selection of video triggered equipment based on separator and FPGA in the utility model
Signal in one video channel is improved by least two-stage amplifying circuit, forms the signal of constant gain so that video separation
Device normally parses M signal and is sent to FPGA, and FPGA again analyzes these M signals, parses vision signal
Odd field, even field, the whole audience and line number, so that the clear logic of whole device, circuit is simple, for different applied fields
It closes, replacement video separator is more convenient, and the digital circuit change of FPGA design is smaller, shortens the development cycle.
Wherein, the output end of input selector for video signals is also connected with ADC quantization samplers.The video of the utility model
Signal in one video channel of signal input selector selection also passes through ADC quantization samplings, is used for simultaneous display.It synchronizes aobvious
Show to stablize in trigger point position and shows vision signal.
Further, fpga chip is connected with display device.
Further, ADC quantizations sampler is also connected with display device.
Wherein, ADC, which quantifies sampler, to be realized with ADC sampling A/D chips.
Form or other existing display devices of liquid crystal display may be used to realize in display device.
Embodiment two
Fig. 3 is two structural schematic diagram of video triggered equipment embodiment based on separator and FPGA of the utility model.Such as
Video triggered equipment shown in Fig. 3 based on separator and FPGA, including：Input selector for video signals, the vision signal
The input terminal of input selector accesses different vision signals, and the output end signal of input selector for video signals is divided into two-way,
Directly it is connected all the way with ADC quantization samplers；Another way is connected at least two-stage amplifying circuit, afterbody amplifying circuit it is defeated
Outlet is connected with signal polarity selector, and the signal polarity selector is connected with video separator, the video separator with
Fpga chip is connected.
Wherein, input selector for video signals is achieved using multi-channel data selector.
Signal polarity selector is realized using alternative data selector.
Input selector for video signals is used to choose the channel of input video, and signal source is provided for back-end circuit.
At least for two-stage amplifying circuit for improving channel input signal, anti-stop signal is excessively faint, causes rear end
It can not test and analyze.As shown in figure 3, by taking the two-stage amplifying circuit in the utility model as an example：
The processing of two-stage amplifying circuit can avoid the case where channel conditioning distortion from occurring so that the recognition capability of instrument increases
By force, synchronous triggering is more reliable and more stable.
Signal polarity selector, the polarity for signal select to carry out input signal at any time with phase and reverse phase convenient for user
Switching.
Video separator is used for videodataclus tearing, and FPGA is combined to realize that the analysis to vision signal, parsing are unusual
Field, even field, the whole audience and line number.
The input selector for video signals selection of video triggered equipment based on separator and FPGA in the utility model
Signal in one video channel is improved by least two-stage amplifying circuit, forms the signal of constant gain so that video separation
Device normally parses M signal and is sent to FPGA, and FPGA again analyzes these M signals, parses vision signal
Odd field, even field, the whole audience and line number, so that the clear logic of whole device, circuit is simple, for different applied fields
It closes, replacement video separator is more convenient, and the digital circuit change of FPGA design is smaller, shortens the development cycle.
Wherein, the ADC quantization samplers and fpga chip are connected with display device.
Embodiment three
A kind of oscillograph of the present embodiment, including display and the video triggered equipment based on separator and FPGA；It is described
The video triggered equipment of FPGA includes input selector for video signals, and the input terminal access of the input selector for video signals is not
Same vision signal, the output end of input selector for video signals are connected at least two-stage amplifying circuit, afterbody amplification electricity
The output end on road is connected with signal polarity selector, and the signal polarity selector is connected with video separator, the video point
It is connected with fpga chip from device.
Further, the output end of input selector for video signals is also connected with ADC quantization samplers.
Further, fpga chip is connected with display；Or the ADC quantizations sampler is also connected with display.
Input selector for video signals in the video triggered equipment based on separator and FPGA of the present embodiment oscillograph
Signal in one video channel of selection is improved by least two-stage amplifying circuit, forms the signal of constant gain so that regard
Frequency separator normally parses M signal and is sent to FPGA, and FPGA again analyzes these M signals, parses and regards
The odd field of frequency signal, even field, the whole audience and line number, so that the clear logic of whole device, circuit is simple, is answered for different
With occasion, replacement video separator is more convenient, and the digital circuit change of FPGA design is smaller, shortens the development cycle.
Example IV
A kind of oscillograph of the present embodiment, including display and the video triggered equipment based on separator and FPGA；It is described
The video triggered equipment of FPGA includes input selector for video signals, and the input terminal access of the input selector for video signals is not
Same vision signal, the output end signal of input selector for video signals are divided into two-way, directly quantify sampler phase with ADC all the way
Even；Another way is connected at least two-stage amplifying circuit, and the output end of afterbody amplifying circuit is connected with signal polarity selector,
The signal polarity selector is connected with video separator, and the video separator is connected with fpga chip.
Further, the output end of input selector for video signals is also connected with ADC quantization samplers.The utility model
Signal in one video channel of input selector for video signals selection also passes through ADC quantization samplings, is used for simultaneous display.
Further, fpga chip is connected with display.
Further, ADC quantizations sampler is also connected with display.
Input selector for video signals in the video triggered equipment based on separator and FPGA of the present embodiment oscillograph
Signal in one video channel of selection is improved by least two-stage amplifying circuit, forms the signal of constant gain so that regard
Frequency separator normally parses M signal and is sent to FPGA, and FPGA again analyzes these M signals, parses and regards
The odd field of frequency signal, even field, the whole audience and line number, so that the clear logic of whole device, circuit is simple, is answered for different
With occasion, replacement video separator is more convenient, and the digital circuit change of FPGA design is smaller, shortens the development cycle.
It is above-mentioned although specific embodiments of the present invention are described with reference to the accompanying drawings, but not to this practicality newly
The limitation of type protection domain, those skilled in the art should understand that, based on the technical solution of the present invention, ability
Field technique personnel need not make the creative labor the various modifications or changes that can be made still in the protection model of the utility model
Within enclosing.
Claims (10)
1. a kind of video triggered equipment based on separator and FPGA, which is characterized in that including：Input selector for video signals,
The input terminal of the input selector for video signals accesses different vision signals, the output end of input selector for video signals with
At least two-stage amplifying circuit is connected, and the output end of afterbody amplifying circuit is connected with signal polarity selector, the pickup electrode
Property selector is connected with video separator, and the video separator is connected with fpga chip.
2. a kind of video triggered equipment based on separator and FPGA as described in claim 1, which is characterized in that the video
The output end of signal input selector is also connected with ADC quantization samplers.
3. a kind of video triggered equipment based on separator and FPGA as described in claim 1, which is characterized in that the FPGA
Chip is connected with display device.
4. the video triggered equipment based on separator and FPGA as claimed in claim 2, which is characterized in that the ADC quantizations
Sampler is also connected with display device.
5. a kind of video triggered equipment based on separator and FPGA, which is characterized in that including：Input selector for video signals,
The input terminal of the input selector for video signals accesses different vision signals, the output end letter of input selector for video signals
Number it is divided into two-way, is directly connected all the way with ADC quantization samplers；Another way is connected at least two-stage amplifying circuit, afterbody
The output end of amplifying circuit is connected with signal polarity selector, and the signal polarity selector is connected with video separator, described
Video separator is connected with fpga chip.
6. the video triggered equipment based on separator and FPGA as claimed in claim 5, which is characterized in that the ADC quantizations
Sampler and fpga chip are connected with display device.
7. a kind of oscillograph, which is characterized in that the video triggered equipment including display and based on separator and FPGA；It is described
The video triggered equipment of FPGA includes input selector for video signals, and the input terminal access of the input selector for video signals is not
Same vision signal, the output end of input selector for video signals are connected at least two-stage amplifying circuit, afterbody amplification electricity
The output end on road is connected with signal polarity selector, and the signal polarity selector is connected with video separator, the video point
It is connected with fpga chip from device.
8. oscillograph as claimed in claim 7, which is characterized in that the output end of the input selector for video signals also with ADC
Quantify sampler to be connected.
9. oscillograph as claimed in claim 8, which is characterized in that the fpga chip is connected with display；Or the ADC quantizations
Sampler is also connected with display.
10. a kind of oscillograph, which is characterized in that the video triggered equipment including display and based on separator and FPGA；It is described
The video triggered equipment of FPGA includes input selector for video signals, and the input terminal access of the input selector for video signals is not
Same vision signal, the output end signal of input selector for video signals are divided into two-way, directly quantify sampler phase with ADC all the way
Even；Another way is connected at least two-stage amplifying circuit, and the output end of afterbody amplifying circuit is connected with signal polarity selector,
The signal polarity selector is connected with video separator, and the video separator is connected with fpga chip.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621236713.9U CN207992293U (en) | 2016-11-15 | 2016-11-15 | A kind of video triggered equipment and oscillograph based on separator and FPGA |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621236713.9U CN207992293U (en) | 2016-11-15 | 2016-11-15 | A kind of video triggered equipment and oscillograph based on separator and FPGA |
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| CN207992293U true CN207992293U (en) | 2018-10-19 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110836992A (en) * | 2019-10-31 | 2020-02-25 | 电子科技大学 | Oscillography power meter acquisition system based on FPGA |
-
2016
- 2016-11-15 CN CN201621236713.9U patent/CN207992293U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110836992A (en) * | 2019-10-31 | 2020-02-25 | 电子科技大学 | Oscillography power meter acquisition system based on FPGA |
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