CN102790593A - Parallel-resistance feedback differential low-noise amplifier - Google Patents
Parallel-resistance feedback differential low-noise amplifier Download PDFInfo
- Publication number
- CN102790593A CN102790593A CN2012102804910A CN201210280491A CN102790593A CN 102790593 A CN102790593 A CN 102790593A CN 2012102804910 A CN2012102804910 A CN 2012102804910A CN 201210280491 A CN201210280491 A CN 201210280491A CN 102790593 A CN102790593 A CN 102790593A
- Authority
- CN
- China
- Prior art keywords
- semiconductor
- oxide
- metal
- resistance
- links
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The invention relates to a parallel-resistance feedback differential low-noise amplifier, which comprises a main amplification circuit. The main amplification circuit comprises a first MOS (metal oxide semiconductor) tube, a second MOS tube, a third MOS tube and a fourth MOS tube, a grid end of the first MOS tube is connected with a first differential input end through a first input matching network, the second MOS tube is connected with a second differential input end through a second input matching network, a drain end of the first MOS tube M1 is connected with the grid end of the first MOS tube through a first parallel-resistance feedback branch, and a drain end of the second MOS tube is connected with a grid end of the second MOS tube through a second parallel-resistance feedback branch; the first parallel-resistance feedback branch comprises a first resistor and a first capacitor connected with the first resistor in series; and the second parallel-resistance feedback branch comprises a second resistor and a second capacitor connected with the second resistor in series. The parasitic capacitance of the output end of the amplifier can be reduced, the isolation between the output end and the input end of the amplifier can be improved, good high-frequency characteristics can be achieved, and the circuit stability can be enhanced.
Description
Technical field
The present invention relates to a kind of low noise amplifier; Especially a kind of resistance parallel feedback type differential low noise amplifier; Specifically a kind of differential low noise amplifier that is used for wireless communication receiver system radio frequency front end chip belongs to the technical field of low noise amplifier.
Background technology
Now, comprise the various types of wireless communication systems and the technological develop rapidly of mobile communication and WLAN, RF IC (RFIC) worldwide becomes the focus of university, research institute and the related industry of communicating by letter research and development.The development of these wireless communication systems has formed a RFIC market that increases fast.Why radio circuit receives concern and the research in the worldwide, is because it is the main bottleneck of whole wireless transceiver system design.In the element of radio frequency transceiver, the technical performance of RFIC requires to have constituted the ultimate challenge of RFIC.And meanwhile; The market user is again very harsh to the performance requirement of wireless product; I.e. low cost, low-power consumption, small size, high-performance etc.; With original use bulky, cost dearly, power consumption again extremely the discrete device of waste realize that the method for transceiver compares, this is a great challenge.
Low noise amplifier is first module in the wireless receiver system normally, also is indispensable key modules.The major function of low noise amplifier is that the wireless signal with the sub-micro volt that receives from antenna is amplified to a certain size, with convenient follow-up module signal is handled, and self introduces the little noise and non-linear of trying one's best simultaneously.This just requires low noise amplifier to have the attribute of low-noise factor and high-gain.Simultaneously, low noise amplifier is between reception antenna and the frequency mixer in wireless receiver system signal path, and for preventing that local oscillation signal from leaking into the antenna front end from frequency mixer and causing interference, low noise amplifier also need have high-isolation.In addition, the user is to the simple requirement of wireless receiver low cost, small size, low-power consumption and peripheral circuit from market, and resistance reaction type differential low noise amplifier is a kind of circuit that satisfies the demand preferably.
Traditional resistance parallel feedback type differential low noise amplifier is as shown in Figure 1; Its annexation is: difference rf inputs RFINN and RFINP; Be input to the grid of triode M1 and M2 respectively through input matching network; The source electrode of triode M1 and M2 is connected on the upper end of the tail current source ISS of lower end ground connection jointly, and their drain electrode connects the source electrode of triode M3 and M4 respectively, constitutes a difference cascode circuit structure; The grid of triode M3 and M4 is connected on the power vd D, cross-over connection output loading network between their drain electrode and the power vd D, and drain electrode directly links to each other with RFOUTN with difference output end RFOUTP.In addition, resistance R 1 is connected with capacitor C 3 and is connected across grid and the output RFOUTP of triode M1, and resistance R 2 is connected with capacitor C 4 and is connected across grid and the output RFOUTN of triode M2.
Traditional resistance parallel feedback type differential low noise amplifier is as shown in Figure 1, and its basic functional principle is: main amplifying circuit is made up of triode M1～M4, is the active device that is used to amplify; Input matching network is the approximate imaginary part of offsetting main amplifying circuit input impedance in the certain frequency scope; Resistance parallel connection feedback branch is made up of resistance R 1, R2 and C1, C2, and the real impedance of main amplifying circuit is provided, and is complementary with 50 ohm of output impedance with reception antenna, and wherein capacitor C 1, C2 are used for the different DC potential in isolation resistance parallel connection feedback branch two ends; The output loading network is the load of amplifier; Current source ISS is that main amplifying circuit provides direct current biasing.
Such differential low noise amplifier uses resistance parallel connection feedback that the real part of input impedance is provided; Thereby two source negative feedback on-chip inductors that mainly are used to provide the input impedance real part in traditional source electrode inductive feedback formula differential low noise amplifier have been saved; Obviously reduce chip area, reduced the flow cost.But this method has its certain defective, because the resistance R of feedback branch 1, R2 and capacitor C 1, the C2 extra noise except introducing, also can introduce the parasitic capacitance of amplifier in and output, has influenced the high frequency performance of amplifier; Simultaneously, the feedback branch that directly is connected across amplifier in and output has reduced the isolation of amplifier out to input to a certain extent, is unfavorable for preventing the leakage of follow-up mixer module local oscillator large-signal to the reception antenna end.
Summary of the invention
The objective of the invention is to overcome the deficiency that exists in the prior art; A kind of resistance parallel feedback type differential low noise amplifier is provided, and the parasitic capacitance that it reduces amplifier out has improved the isolation of amplifier out to input; High frequency characteristics is good, has strengthened circuit stability.
According to technical scheme provided by the invention; Said resistance parallel feedback type differential low noise amplifier; Comprise main amplifying circuit; Said main amplifying circuit comprises first metal-oxide-semiconductor, second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor and the 4th metal-oxide-semiconductor, and said first metal-oxide-semiconductor, second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor and the 4th metal-oxide-semiconductor form the difference cascode circuit; The gate terminal of first metal-oxide-semiconductor links to each other with first differential input end through first input matching network; Second metal-oxide-semiconductor links to each other with second differential input end through second input matching network, and the source terminal of first metal-oxide-semiconductor all links to each other with tail current source with the source terminal of second metal-oxide-semiconductor; The gate terminal of the 3rd metal-oxide-semiconductor all links to each other with power vd D with the gate terminal of the 4th metal-oxide-semiconductor; The drain electrode end of the 3rd metal-oxide-semiconductor links to each other with power vd D through the first output loading network; The drain electrode end of the 4th metal-oxide-semiconductor links to each other with power vd D through the second output loading network; The drain electrode end of the 3rd metal-oxide-semiconductor links to each other with first difference output end, and the drain electrode end of the 4th metal-oxide-semiconductor links to each other with second difference output end; The drain electrode end of first metal-oxide-semiconductor links to each other with the source terminal of the 3rd metal-oxide-semiconductor, and the drain electrode end of second metal-oxide-semiconductor (M2) links to each other with the source terminal of the 4th metal-oxide-semiconductor; It is characterized in that: link to each other through first resistance parallel connection feedback branch between the drain electrode end of said first metal-oxide-semiconductor (M1) and the gate terminal of first metal-oxide-semiconductor, link to each other through the parallelly connected feedback branch of second resistance between the gate terminal of the drain electrode end of second metal-oxide-semiconductor and second metal-oxide-semiconductor; First resistance parallel connection feedback branch comprises first resistance and first electric capacity of connecting with said first resistance; Second resistance parallel connection feedback branch comprises second resistance and second electric capacity of connecting with said second resistance.
Said first input matching network, when second input matching network works in the arrowband state; Said first input matching network comprises first inductance and the 3rd electric capacity; One end of said the 3rd electric capacity links to each other with first differential input end, and the other end of the 3rd electric capacity links to each other with the gate terminal of first resistance, first metal-oxide-semiconductor through first inductance; Second input matching network comprises the 4th electric capacity and second inductance, and an end of said the 4th electric capacity links to each other with second differential input end, and the other end of the 4th electric capacity links to each other with the gate terminal and second resistance of second metal-oxide-semiconductor through second inductance; The gate terminal of first metal-oxide-semiconductor, second metal-oxide-semiconductor links to each other with direct current regulation circuit.
Said direct current regulation circuit comprises first voltage regulation resistance and power vd D, and an end of said first voltage regulation resistance links to each other with power vd D, and the other end is through the second voltage regulation resistance ground connection; First voltage regulation resistance) end that links to each other with second voltage regulation resistance links to each other with the gate terminal of first metal-oxide-semiconductor through the 3rd voltage regulation resistance, and the end that first voltage regulation resistance links to each other with second voltage regulation resistance links to each other with the gate terminal of second metal-oxide-semiconductor through the 4th voltage regulation resistance.
The said first output loading network, the second output loading network work are in the arrowband during state; The said first output loading network comprises the 3rd inductance, the 3rd adjustable resistance and the 5th tunable capacitor, and said the 3rd inductance, the 3rd adjustable resistance and the 5th tunable capacitor are parallel with one another; The second output loading network comprises the 4th inductance, the 4th adjustable resistance and the 6th tunable capacitor, and said the 4th inductance, the 4th adjustable resistance and the 6th tunable capacitor are parallel with one another.
Said tail current source comprises power vd D; Said power vd D links to each other through the drain electrode end of bias current sources with the first biasing metal-oxide-semiconductor; The gate terminal of the gate terminal of the drain electrode end of the first biasing metal-oxide-semiconductor and the first biasing metal-oxide-semiconductor, the second biasing metal-oxide-semiconductor interconnects; And the gate terminal of the first biasing metal-oxide-semiconductor is through the 9th capacity earth; The equal ground connection of source terminal of the source terminal of the first biasing metal-oxide-semiconductor, the second biasing metal-oxide-semiconductor, drain electrode end and the source terminal of first metal-oxide-semiconductor, the source terminal of second metal-oxide-semiconductor of the second biasing metal-oxide-semiconductor interconnect.
Said first input matching network, when second input matching network works in the broadband state; First input matching network comprises the 9th inductance; One end of said the 9th inductance links to each other with first differential input end; The other end of the 9th inductance links to each other with an end of the 5th inductance and an end of the 7th inductance through the tenth electric capacity, and the other end of the 7th inductance links to each other with the gate terminal of first resistance, first metal-oxide-semiconductor; The other end of the 5th inductance links to each other with direct current regulation circuit, and the two ends of the 5th inductance are parallel with the 7th electric capacity; Second input matching network comprises the tenth inductance; One end of said the tenth inductance links to each other with second differential input end; The other end of the tenth inductance links to each other with an end of the 11 electric capacity; The other end of said the 11 electric capacity links to each other with an end of the 8th inductance and an end of the 6th inductance, and the other end of said the 6th inductance links to each other with direct current regulation circuit, and the two ends of the 6th inductance are parallel with the 8th electric capacity; The other end that the 8th inductance links to each other with the 11 electric capacity links to each other with the gate terminal of second resistance and second metal-oxide-semiconductor.
During state, the first output loading network comprises the 5th resistance and the 7th adjustable resistance in the broadband for the said first output loading network, the second output loading network work, and said the 5th resistance and the 7th adjustable resistance are parallel with one another; The second output loading network comprises the 6th resistance and the 8th adjustable resistance, and said the 8th adjustable resistance and the 6th resistance are parallel with one another.
A kind of similar techniques scheme, a kind of resistance parallel feedback type differential low noise amplifier comprises main amplifying circuit, said main amplifying circuit comprises first triode, second triode, the 3rd triode and the 4th triode; The base terminal of first triode links to each other with first differential input end through first input matching network; Second triode links to each other with second differential input end through second input matching network, and the emitter terminal of first triode all links to each other with tail current source with the emitter terminal of second triode; The base terminal of the 3rd triode all links to each other with power vd D with the base terminal of the 4th triode; The collector terminal of the 3rd triode links to each other with power vd D through the first output loading network; The collector terminal of the 4th triode links to each other with power vd D through the second output loading network; The collector terminal of the 3rd triode links to each other with first difference output end, and the collector terminal of the 4th triode links to each other with second difference output end; The collector terminal of first triode links to each other with the emitter terminal of the 3rd triode, and the collector terminal of second triode links to each other with the emitter terminal of the 4th triode;
Link to each other through first resistance parallel connection feedback branch between the base terminal of the collector terminal of said first triode and first triode, link to each other through the parallelly connected feedback branch of second resistance between the base terminal of the collector terminal of second triode and second triode; First resistance parallel connection feedback branch comprises first resistance and first electric capacity of connecting with said first resistance; Second resistance parallel connection feedback branch comprises second resistance and second electric capacity of connecting with said second resistance.
Said tail current source comprises power vd D; Said power vd D links to each other through the drain electrode end of bias current sources with the first biasing metal-oxide-semiconductor; The gate terminal of the gate terminal of the drain electrode end of the first biasing metal-oxide-semiconductor and the first biasing metal-oxide-semiconductor, the second biasing metal-oxide-semiconductor interconnects; And the gate terminal of the first biasing metal-oxide-semiconductor is through the 9th capacity earth; The equal ground connection of source terminal of the source terminal of the first biasing metal-oxide-semiconductor, the second biasing metal-oxide-semiconductor, drain electrode end and the source terminal of first metal-oxide-semiconductor, the source terminal of second metal-oxide-semiconductor of the second biasing metal-oxide-semiconductor interconnect.
Advantage of the present invention:
1, the present invention is chosen in the 3rd metal-oxide-semiconductor M3 that is total to gate transistor in the main amplifying circuit, the source electrode of the 4th metal-oxide-semiconductor M4 with the sampling point of resistance parallel connection feedback; Be chosen in the traditional scheme of the first difference output end RFOUTP, the second difference output end RFOUTN with respect to sampling point; The output at amplifier dominant pole place has littler parasitic capacitance, therefore has better high frequency characteristics;
2, the present invention has changed the resistance parallel connection feedback branch that directly is connected across input and output in the traditional design; Improved the isolation of output to input; Help reducing of the leakage of follow-up frequency mixer local oscillator large-signal, and strengthened the stability of circuit to rf inputs.
Description of drawings
Fig. 1 is the circuit theory diagrams of existing differential low noise amplifier.
Fig. 2 is the circuit theory diagrams of differential low noise amplifier of the present invention.
Fig. 3 is the present invention's first input matching network, second input matching network, the first output loading network, the circuit theory diagrams when the second output loading network is arrowband work.
Fig. 4 is the circuit theory diagrams of direct current regulation circuit of the present invention.
Fig. 5 is the circuit theory diagrams of tail current source of the present invention.
Fig. 6 is the present invention's first input matching network, second input matching network, the first output loading network, the circuit theory diagrams when the second output loading network is wideband operation.
Embodiment
Below in conjunction with concrete accompanying drawing and embodiment the present invention is described further.
As shown in Figure 2: differential low noise amplifier of the present invention comprises main amplifying circuit; Said main amplifying circuit comprises the first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2, the 3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4, and the said first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2, the 3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4 form the difference cascode circuit; The gate terminal of the first metal-oxide-semiconductor M1 links to each other with the first differential input end RFINP through first input matching network; The second metal-oxide-semiconductor M2 links to each other with the second differential input end RFINN through second input matching network, and the source terminal of the first metal-oxide-semiconductor M1 all links to each other with tail current source with the source terminal of the second metal-oxide-semiconductor M2; The gate terminal of the 3rd metal-oxide-semiconductor M3 all links to each other with power vd D with the gate terminal of the 4th metal-oxide-semiconductor M4; The drain electrode end of the 3rd metal-oxide-semiconductor M3 links to each other with power vd D through the first output loading network; The drain electrode end of the 4th metal-oxide-semiconductor M4 links to each other with power vd D through the second output loading network; The drain electrode end of the 3rd metal-oxide-semiconductor M3 links to each other with the first difference output end RFOUTP, and the drain electrode end of the 4th metal-oxide-semiconductor M4 links to each other with the second difference output end RFOUTN; The drain electrode end of the first metal-oxide-semiconductor M1 links to each other with the source terminal of the 3rd metal-oxide-semiconductor M3, and the drain electrode end of the second metal-oxide-semiconductor M2 links to each other with the source terminal of the 4th metal-oxide-semiconductor M4; Link to each other through first resistance parallel connection feedback branch between the gate terminal of the drain electrode end of the said first metal-oxide-semiconductor M1 and the first metal-oxide-semiconductor M1, link to each other through the parallelly connected feedback branch of second resistance between the gate terminal of the drain electrode end of the second metal-oxide-semiconductor M2 and the second metal-oxide-semiconductor M2; First resistance parallel connection feedback branch comprises first resistance R 1 and first capacitor C 1 of connecting with said first resistance R 1; Second resistance parallel connection feedback branch comprises second resistance R 2 and second capacitor C 2 of connecting with said second resistance R 2.
The first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2, the 3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4 form cascode amplifier; It is the active device that is used to amplify; The first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 are the drain electrode small-signal current with small-signal input voltage or current transitions; This small-signal current flows through the 3rd metal-oxide-semiconductor M3, the 4th metal-oxide-semiconductor M4 and the first output loading network and the second output loading network that common bank tube connects method, to form small-signal output at the first difference output end RFOUTP, the second difference output end RFOUTN.The 3rd metal-oxide-semiconductor M3, the 4th metal-oxide-semiconductor M4 cathode-input amplifier connect method; This transistor that connects method has the less input impedance that is inversely proportional to mutual conductance; Make the voltage gain of the metal-oxide-semiconductor M1 that wins, the second metal-oxide-semiconductor M2 lower, the Miller effect of the first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2 is eased.In addition; In the connected mode in embodiments of the present invention; The 3rd metal-oxide-semiconductor M3, the 4th metal-oxide-semiconductor M4 are serially connected in the main signal path and have the parasitic capacitance that two ends are leaked in less relatively source; Thereby strengthened the reverse isolation degree of whole amplifier, helped preventing of the leakage of the local oscillation signal of follow-up mixer module to antenna input.First capacitor C 1, second capacitor C 2 are used to isolate different DC potentials; First resistance R 1, second resistance R 2 through with first capacitor C 1, second capacitor C, 2 serial Feedback; For amplifying body the real part of input impedance is provided; In the actual design,, make the real part of whole amplifier input impedance reach 50 ohm through selecting the resistance of first resistance R 1 and second resistance R, 2 couplings; Cooperate first input matching network of prime, the negative function of the second input matching network input impedance imaginary part simultaneously, realization is complementary with 50 ohm of output impedance of reception antenna.
In the embodiment of the invention, different according to arrowband and wideband operation state, first input matching network, second input matching network have the different methods that connects, respectively like Fig. 3 and shown in Figure 6.
As shown in Figure 3: said first input matching network, when second input matching network works in the arrowband state; Said first input matching network comprises first inductance L 1 and the 3rd capacitor C 3; One end of said the 3rd capacitor C 3 links to each other with the first differential input end RFINP, and the other end of the 3rd capacitor C 3 links to each other through the gate terminal of first inductance L 1 with first resistance R 1, the first metal-oxide-semiconductor M1; Second input matching network comprises the 4th capacitor C 4 and second inductance L 2; One end of said the 4th capacitor C 4 links to each other with the second differential input end RFINN, and the other end of the 4th capacitor C 4 links to each other with the gate terminal and second resistance R 2 of the second metal-oxide-semiconductor M2 through second inductance L 2; The gate terminal of the first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2 links to each other with direct current regulation circuit.
Wherein, The 3rd capacitor C 3, the 4th capacitor C 4 play the effect that input direct voltage and the first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2 play dc offset voltage of isolating; First inductance L 1, second inductance L 2 are used for offsetting at the operating frequency place imaginary part of main amplifying circuit input impedance, so that amplifier input small signal resonance is at the operating frequency place.In actual design; First inductance L 1, second inductance L 2 generally are positioned at outside the sheet; This is because sheet inside spin inductance area occupied is very big on the one hand; Because the quality factor of sheet inside spin inductance is lower with respect to the outer chip inductor of sheet, the equivalent series resistance of introducing thus is bigger on the other hand, worsens the noise factor of amplifier easily.
The said first output loading network, the second output loading network work are in the arrowband during state; The said first output loading network comprises the 3rd inductance L 3, the 3rd adjustable resistance R3 and the 5th tunable capacitor C5, and said the 3rd inductance L 3, the 3rd adjustable resistance R3 and the 5th tunable capacitor C5 are parallel with one another; The second output loading network comprises the 4th inductance L 4, the 4th adjustable resistance R4 and the 6th tunable capacitor C6, and said the 4th inductance L 4, the 4th adjustable resistance R4 and the 6th tunable capacitor C6 are parallel with one another.
Wherein, the 5th tunable capacitor C5 in the first output loading network, the 3rd inductance L 3 are formed a LC resonant network, and the 4th inductance L 4 in the second output loading network and the 6th tunable capacitor C6 form another LC resonant network; Can make the frequency of amplifier of the present invention be positioned at the operating frequency place through two resonant networks.Consider in the foundry production of chip; The LC resonance frequency and the inconsistent problem of design load that possibly cause owing to the reason of process corner; The 5th tunable capacitor C5, the 6th tunable capacitor C6 are designed to the variable capacitance of external control; Through regulating the size of corresponding capacitance, the resonance frequency of LC network is corrected to operating frequency.The 3rd adjustable resistance R3, the 4th adjustable resistance R4 also are designed to the variable resistor of external control, through regulating the size of corresponding resistor, realize the variable function of amplifier gain of the present invention.
As shown in Figure 6: said first input matching network, when second input matching network works in the broadband state; First input matching network comprises the 9th inductance L 9; One end of said the 9th inductance L 9 links to each other with the first differential input end RFINP; The other end of the 9th inductance L 9 links to each other with an end of the 5th inductance L 5 and an end of the 7th inductance L 7 through the tenth capacitor C 10, and the other end of the 7th inductance L 7 links to each other with the gate terminal of first resistance R 1, the first metal-oxide-semiconductor M1; The other end of the 5th inductance L 5 links to each other with direct current regulation circuit, and the two ends of the 5th inductance L 5 are parallel with the 7th capacitor C 7; Second input matching network comprises the tenth inductance L 10; One end of said the tenth inductance L 10 links to each other with the second differential input end RFINN; The other end of the tenth inductance L 10 links to each other with an end of the 11 capacitor C 11; The other end of said the 11 capacitor C 11 links to each other with an end of the 8th inductance L 8 and the end of the 6th electric L6, and the other end of said the 6th inductance L 6 links to each other with direct current regulation circuit, and the two ends of the 6th inductance L 6 are parallel with the 8th capacitor C 8; The other end that the 8th inductance L 8 links to each other with the 11 capacitor C 11 links to each other with the gate terminal of second resistance R 2 and the second metal-oxide-semiconductor M2.
Wherein, the tenth capacitor C the 10, the 11 capacitor C 11 plays the effect of isolating input direct voltage and the first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2 being provided dc offset voltage; Simultaneously; The input impedance of other passive components and main amplifying circuit in first input matching network, second input matching network of the tenth capacitor C the 10, the 11 capacitor C 11 has constituted a broadband Chebychev band pass filter; Through designing the numerical value of each passive component, can make the low noise amplifier of the embodiment of the invention in very wide frequency band range, realize impedance matching.
During state, the first output loading network comprises the 5th resistance R 5 and the 7th adjustable resistance R7 in the broadband for the said first output loading network, the second output loading network work, and said the 5th resistance R 5 and the 7th adjustable resistance R7 are parallel with one another; The second output loading network comprises the 6th resistance R 6 and the 8th adjustable resistance R8, and said the 8th adjustable resistance R8 and the 6th resistance R 6 are parallel with one another.
In the embodiment of the invention, the first output loading network, when the second output loading network is wideband operation is realized the adjustable function of pair amplifier gain through regulating the 7th adjustable resistance R7, the 8th adjustable resistance R8.
As shown in Figure 4: said direct current regulation circuit comprises the first voltage regulation resistance RB1 and power vd D, and the end of the said first voltage regulation resistance RB1 links to each other with power vd D, and the other end is through the second voltage regulation resistance RB2 ground connection; The end that the first voltage regulation resistance RB1 links to each other with the second voltage regulation resistance RB2 links to each other with the gate terminal of the first metal-oxide-semiconductor M1 through the 3rd voltage regulation resistance RB3, and the end that the first voltage regulation resistance RB1 links to each other with the second voltage regulation resistance RB2 links to each other with the gate terminal of the second metal-oxide-semiconductor M2 through the 4th voltage regulation resistance RB4.Direct current regulation circuit is that first input matching network, second matching network provide galvanic current to press.
As shown in Figure 5: said tail current source comprises power vd D; Said power vd D links to each other with the drain electrode end of the first biasing metal-oxide-semiconductor MB1 through bias current sources IBO; The gate terminal of the gate terminal of the drain electrode end of the first biasing metal-oxide-semiconductor MB1 and the first biasing metal-oxide-semiconductor MB1, the second biasing metal-oxide-semiconductor MB0 interconnects; And the gate terminal of the first biasing metal-oxide-semiconductor MB1 is through the 9th capacitor C 9 ground connection; The equal ground connection of source terminal of the source terminal of the first biasing metal-oxide-semiconductor MB1, the second biasing metal-oxide-semiconductor MB0, drain electrode end and the source terminal of the first metal-oxide-semiconductor M1, the source terminal of the second metal-oxide-semiconductor M2 of the second biasing metal-oxide-semiconductor MB0 interconnect.
Like Fig. 2 ~ shown in Figure 6: main amplifying circuit is made up of the first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2, the 3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4, and all is the active devices that are used to amplify; First input matching network, second input matching network be the approximate imaginary part of offsetting main amplifying circuit input impedance in the certain frequency scope; First resistance parallel connection feedback branch is composed in series by first resistance R 1 and first capacitor C 1; Second resistance parallel connection feedback branch is composed in series by second resistance R 2 and second capacitor C 2; So that the real impedance of main amplifying circuit to be provided; 50 ohm of output impedance with reception antenna are complementary, and wherein first capacitor C 1, second capacitor C 2 are used for the different DC potential in isolation resistance parallel connection feedback branch two ends; The first output loading network, the second output loading network form the load of low noise amplifier; Tail current source ISS is that main amplifying circuit provides direct current biasing.
Be appreciated that from above-mentioned operation principle the main amplifying circuit the embodiment of the invention can adopt triode to realize equally, when adopting triode, the circuit of differential low noise amplifier of the present invention is connected to:
Said main amplifying circuit comprises first triode, second triode, the 3rd triode and the 4th triode; The base terminal of first triode links to each other with the first differential input end RFINP through first input matching network; Second triode links to each other with the second differential input end RFINN through second input matching network, and the emitter terminal of first triode all links to each other with tail current source with the emitter terminal of second triode; The base terminal of the 3rd triode all links to each other with power vd D with the base terminal of the 4th triode; The collector terminal of the 3rd triode links to each other with power vd D through the first output loading network; The collector terminal of the 4th triode links to each other with power vd D through the second output loading network; The collector terminal of the 3rd triode links to each other with the first difference output end RFOUTP, and the collector terminal of the 4th triode links to each other with the second difference output end RFOUTN; The collector terminal of first triode links to each other with the emitter terminal of the 3rd triode, and the collector terminal of second triode links to each other with the emitter terminal of the 4th triode;
Link to each other through first resistance parallel connection feedback branch between the base terminal of the collector terminal of said first triode and first triode, link to each other through the parallelly connected feedback branch of second resistance between the base terminal of the collector terminal of second triode and second triode; First resistance parallel connection feedback branch comprises first resistance R 1 and first capacitor C 1 of connecting with said first resistance R 1; Second resistance parallel connection feedback branch comprises second resistance R 2 and second capacitor C 2 of connecting with said second resistance R 2.
The present invention is chosen in the 3rd metal-oxide-semiconductor M3 that is total to gate transistor in the main amplifying circuit, the source electrode of the 4th metal-oxide-semiconductor M4 with the sampling point of resistance parallel connection feedback; Be chosen in the traditional scheme of the first difference output end RFOUTP, the second difference output end RFOUTN with respect to sampling point; The output of amplifier has littler parasitic capacitance, therefore has better high frequency characteristics;
The present invention has changed the resistance parallel connection feedback branch that directly is connected across input and output in the traditional design; Improved the isolation of output to input; Help reducing of the leakage of follow-up frequency mixer local oscillator large-signal, and strengthened the stability of circuit to rf inputs.
Protection scope of the present invention is not limited to embodiments described herein.As long as various variations accompanying claims limit and the spirit and scope of the present invention confirmed in, these variations are conspicuous, all utilize instance that the present invention conceives all at the row of protection.
Claims (9)
1. resistance parallel feedback type differential low noise amplifier; Comprise main amplifying circuit; Said main amplifying circuit comprises first metal-oxide-semiconductor (M1), second metal-oxide-semiconductor (M2), the 3rd metal-oxide-semiconductor (M3) and the 4th metal-oxide-semiconductor (M4), and said first metal-oxide-semiconductor (M1), second metal-oxide-semiconductor (M2), the 3rd metal-oxide-semiconductor (M3) and the 4th metal-oxide-semiconductor (M4) form the difference cascode circuit; The gate terminal of first metal-oxide-semiconductor (M1) links to each other with first differential input end (RFINP) through first input matching network; Second metal-oxide-semiconductor (M2) links to each other with second differential input end (RFINN) through second input matching network, and the source terminal of first metal-oxide-semiconductor (M1) all links to each other with tail current source with the source terminal of second metal-oxide-semiconductor (M2); The gate terminal of the 3rd metal-oxide-semiconductor (M3) all links to each other with power vd D with the gate terminal of the 4th metal-oxide-semiconductor (M4); The drain electrode end of the 3rd metal-oxide-semiconductor (M3) links to each other with power vd D through the first output loading network; The drain electrode end of the 4th metal-oxide-semiconductor (M4) links to each other with power vd D through the second output loading network; The drain electrode end of the 3rd metal-oxide-semiconductor (M3) links to each other with first difference output end (RFOUTP), and the drain electrode end of the 4th metal-oxide-semiconductor (M4) links to each other with second difference output end (RFOUTN); The drain electrode end of first metal-oxide-semiconductor (M1) links to each other with the source terminal of the 3rd metal-oxide-semiconductor (M3), and the drain electrode end of second metal-oxide-semiconductor (M2) links to each other with the source terminal of the 4th metal-oxide-semiconductor (M4); It is characterized in that: link to each other through first resistance parallel connection feedback branch between the drain electrode end of said first metal-oxide-semiconductor (M1) and the gate terminal of first metal-oxide-semiconductor (M1), link to each other through the parallelly connected feedback branch of second resistance between the drain electrode end of second metal-oxide-semiconductor (M2) and the gate terminal of second metal-oxide-semiconductor (M2); First resistance parallel connection feedback branch comprises first resistance (R1) and first electric capacity (C1) of connecting with said first resistance (R1); Second resistance parallel connection feedback branch comprises second resistance (R2) and second electric capacity (C2) of connecting with said second resistance (R2).
2. resistance parallel feedback type differential low noise amplifier according to claim 1; It is characterized in that: said first input matching network, when second input matching network works in the arrowband state; Said first input matching network comprises first inductance (L1) and the 3rd electric capacity (C3); One end of said the 3rd electric capacity (C3) links to each other with first differential input end (RFINP), and the other end of the 3rd electric capacity (C3) links to each other with the gate terminal of first resistance (R1), first metal-oxide-semiconductor (M1) through first inductance (L1); Second input matching network comprises the 4th electric capacity (C4) and second inductance (L2); One end of said the 4th electric capacity (C4) links to each other with second differential input end (RFINN), and the other end of the 4th electric capacity (C4) links to each other with the gate terminal and second resistance (R2) of second metal-oxide-semiconductor (M2) through second inductance (L2); The gate terminal of first metal-oxide-semiconductor (M1), second metal-oxide-semiconductor (M2) links to each other with direct current regulation circuit.
3. resistance parallel feedback type differential low noise amplifier according to claim 2; It is characterized in that: said direct current regulation circuit comprises first voltage regulation resistance (RB1) and power vd D; One end of said first voltage regulation resistance (RB1) links to each other with power vd D, and the other end is through second voltage regulation resistance (RB2) ground connection; The end that first voltage regulation resistance (RB1) links to each other with second voltage regulation resistance (RB2) links to each other with the gate terminal of first metal-oxide-semiconductor (M1) through the 3rd voltage regulation resistance (RB3), and the end that first voltage regulation resistance (RB1) links to each other with second voltage regulation resistance (RB2) links to each other with the gate terminal of second metal-oxide-semiconductor (M2) through the 4th voltage regulation resistance (RB4).
4. according to claim 2 or 3 described resistance parallel feedback type differential low noise amplifiers; It is characterized in that: the said first output loading network, the second output loading network work are in the arrowband during state; The said first output loading network comprises the 3rd inductance (L3), the 3rd adjustable resistance (R3) and the 5th tunable capacitor (C5), and said the 3rd inductance (L3), the 3rd adjustable resistance (R3) and the 5th tunable capacitor (C5) are parallel with one another; The second output loading network comprises the 4th inductance (L4), the 4th adjustable resistance (R4) and the 6th tunable capacitor (C6), and said the 4th inductance (L4), the 4th adjustable resistance (R4) and the 6th tunable capacitor (C6) are parallel with one another.
5. resistance parallel feedback type differential low noise amplifier according to claim 1; It is characterized in that: said tail current source comprises power vd D; Said power vd D links to each other through the drain electrode end of bias current sources (IBO) with the first biasing metal-oxide-semiconductor (MB1); The gate terminal of the gate terminal of the drain electrode end of the first biasing metal-oxide-semiconductor (MB1) and the first biasing metal-oxide-semiconductor (MB1), the second biasing metal-oxide-semiconductor (MB0) interconnects; And the gate terminal of the first biasing metal-oxide-semiconductor (MB1) is through the 9th electric capacity (C9) ground connection; The equal ground connection of source terminal of the source terminal of the first biasing metal-oxide-semiconductor (MB1), the second biasing metal-oxide-semiconductor (MB0), drain electrode end and the source terminal of first metal-oxide-semiconductor (M1), the source terminal of second metal-oxide-semiconductor (M2) of the second biasing metal-oxide-semiconductor (MB0) interconnect.
6. resistance parallel feedback type differential low noise amplifier according to claim 1; It is characterized in that: said first input matching network, when second input matching network works in the broadband state; First input matching network comprises the 9th inductance (L9); One end of said the 9th inductance (L9) links to each other with first differential input end (RFINP); The other end of the 9th inductance (L9) links to each other with an end of the 5th inductance (L5) and an end of the 7th inductance (L7) through the tenth electric capacity (C10), and the other end of the 7th inductance (L7) links to each other with the gate terminal of first resistance (R1), first metal-oxide-semiconductor (M1); The other end of the 5th inductance (L5) links to each other with direct current regulation circuit, and the two ends of the 5th inductance (L5) are parallel with the 7th electric capacity (C7); Second input matching network comprises the tenth inductance (L10); One end of said the tenth inductance (L10) links to each other with second differential input end (RFINN); The other end of the tenth inductance (L10) links to each other with an end of the 11 electric capacity (C11); The other end of said the 11 electric capacity (C11) links to each other with an end of the 8th inductance (L8) and an end of the 6th inductance (L6); The other end of said the 6th inductance (L6) links to each other with direct current regulation circuit, and the two ends of the 6th inductance (L6) are parallel with the 8th electric capacity (C8); The other end that the 8th inductance (L8) links to each other with the 11 electric capacity (C11) links to each other with the gate terminal of second resistance (R2) and second metal-oxide-semiconductor (M2).
7. according to claim 1 or 6 described resistance parallel feedback type differential low noise amplifiers; It is characterized in that: the said first output loading network, the second output loading network work are in the broadband during state; The first output loading network comprises the 5th resistance (R5) and the 7th adjustable resistance (R7), and said the 5th resistance (R5) is parallel with one another with the 7th adjustable resistance (R7); The second output loading network comprises the 6th resistance (R6) and the 8th adjustable resistance (R8), and said the 8th adjustable resistance (R8) is parallel with one another with the 6th resistance (R6).
8. resistance parallel feedback type differential low noise amplifier, it is characterized in that: comprise main amplifying circuit, said main amplifying circuit comprises first triode, second triode, the 3rd triode and the 4th triode; The base terminal of first triode links to each other with first differential input end (RFINP) through first input matching network; Second triode links to each other with second differential input end (RFINN) through second input matching network, and the emitter terminal of first triode all links to each other with tail current source with the emitter terminal of second triode; The base terminal of the 3rd triode all links to each other with power vd D with the base terminal of the 4th triode; The collector terminal of the 3rd triode links to each other with power vd D through the first output loading network; The collector terminal of the 4th triode links to each other with power vd D through the second output loading network; The collector terminal of the 3rd triode links to each other with first difference output end (RFOUTP), and the collector terminal of the 4th triode links to each other with second difference output end (RFOUTN); The collector terminal of first triode links to each other with the emitter terminal of the 3rd triode, and the collector terminal of second triode links to each other with the emitter terminal of the 4th triode;
Link to each other through first resistance parallel connection feedback branch between the base terminal of the collector terminal of said first triode and first triode, link to each other through the parallelly connected feedback branch of second resistance between the base terminal of the collector terminal of second triode and second triode; First resistance parallel connection feedback branch comprises first resistance (R1) and first electric capacity (C1) of connecting with said first resistance (R1); Second resistance parallel connection feedback branch comprises second resistance (R2) and second electric capacity (C2) of connecting with said second resistance (R2).
9. resistance parallel feedback type differential low noise amplifier according to claim 8; It is characterized in that: said tail current source comprises power vd D; Said power vd D links to each other through the drain electrode end of bias current sources (IBO) with the first biasing metal-oxide-semiconductor (MB1); The gate terminal of the gate terminal of the drain electrode end of the first biasing metal-oxide-semiconductor (MB1) and the first biasing metal-oxide-semiconductor (MB1), the second biasing metal-oxide-semiconductor (MB0) interconnects; And the gate terminal of the first biasing metal-oxide-semiconductor (MB1) is through the 9th electric capacity (C9) ground connection; The equal ground connection of source terminal of the source terminal of the first biasing metal-oxide-semiconductor (MB1), the second biasing metal-oxide-semiconductor (MB0), drain electrode end and the source terminal of first metal-oxide-semiconductor (M1), the source terminal of second metal-oxide-semiconductor (M2) of the second biasing metal-oxide-semiconductor (MB0) interconnect.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012102804910A CN102790593A (en) | 2012-08-08 | 2012-08-08 | Parallel-resistance feedback differential low-noise amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012102804910A CN102790593A (en) | 2012-08-08 | 2012-08-08 | Parallel-resistance feedback differential low-noise amplifier |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102790593A true CN102790593A (en) | 2012-11-21 |
Family
ID=47155907
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2012102804910A Pending CN102790593A (en) | 2012-08-08 | 2012-08-08 | Parallel-resistance feedback differential low-noise amplifier |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102790593A (en) |
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103117710A (en) * | 2012-12-27 | 2013-05-22 | 中国矿业大学 | Differential type low-noise parallel multifrequency amplifier |
| CN103560760A (en) * | 2013-11-13 | 2014-02-05 | 丹纳赫（上海）工业仪器技术研发有限公司 | Amplification circuit and measurement device |
| CN104348432A (en) * | 2013-08-09 | 2015-02-11 | 成都国腾电子技术股份有限公司 | Single-converted-to-double low noise amplifier with highly balanced and stabilized differential output gain phase |
| CN104901635A (en) * | 2015-06-10 | 2015-09-09 | 思瑞浦微电子科技（苏州）有限公司 | Low-noise PSSR amplifier circuit |
| CN107094034A (en) * | 2012-12-27 | 2017-08-25 | 英特尔公司 | High-speed receiver circuit and method |
| CN107994872A (en) * | 2017-11-07 | 2018-05-04 | 天津大学 | Big Dipper ground receiver high-gain broadband CMOS low-noise amplifiers |
| CN107994878A (en) * | 2017-11-28 | 2018-05-04 | 中科亿海微电子科技（苏州）有限公司 | Low-noise amplifier and emulation bus receiver for emulation bus receiver |
| CN110702970A (en) * | 2019-09-06 | 2020-01-17 | 恒大智慧充电科技有限公司 | Signal detection circuit |
| CN110794909A (en) * | 2019-11-05 | 2020-02-14 | 安徽大学 | Ultra-low power consumption voltage reference source circuit with adjustable output voltage |
| CN111434034A (en) * | 2017-12-15 | 2020-07-17 | 华为技术有限公司 | Passband frequency adjustable differential cascode amplifier for optical communications |
| CN111525893A (en) * | 2020-04-30 | 2020-08-11 | 杭州中科微电子有限公司 | Broadband low-noise amplifier applied to GNSS dual-frequency receiver |
| CN112187183A (en) * | 2020-10-14 | 2021-01-05 | 成都振芯科技股份有限公司 | Broadband low-noise amplifier with differential structure |
| CN112468099A (en) * | 2020-11-20 | 2021-03-09 | 北京昂瑞微电子技术股份有限公司 | Radio frequency front end and low noise amplifier thereof |
| CN113765481A (en) * | 2021-07-23 | 2021-12-07 | 华东师范大学 | Digital frequency multiplication method and injection locking frequency doubler circuit |
| CN114944823A (en) * | 2022-07-08 | 2022-08-26 | 深圳市德兴达科技有限公司 | Low-noise amplifier |
| CN116317966A (en) * | 2023-03-29 | 2023-06-23 | 南京米乐为微电子科技有限公司 | Amplifying circuit |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5742205A (en) * | 1995-07-27 | 1998-04-21 | Scientific-Atlanta, Inc. | Field effect transistor cable television line amplifier |
| CN201039094Y (en) * | 2007-05-21 | 2008-03-19 | 杭州中科微电子有限公司 | A high-gain RF low-noise amplifier |
| CN101656516A (en) * | 2009-07-23 | 2010-02-24 | 复旦大学 | Full-difference CMOS ultra wide band low-noise amplifier |
| CN102163955A (en) * | 2011-04-18 | 2011-08-24 | 上海信朴臻微电子有限公司 | Low-noise amplifier adopting single-ended input and differential output |
| CN102594264A (en) * | 2012-02-22 | 2012-07-18 | 刘轶 | Radio frequency power amplifier and input matching circuit thereof |
-
2012
- 2012-08-08 CN CN2012102804910A patent/CN102790593A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5742205A (en) * | 1995-07-27 | 1998-04-21 | Scientific-Atlanta, Inc. | Field effect transistor cable television line amplifier |
| CN201039094Y (en) * | 2007-05-21 | 2008-03-19 | 杭州中科微电子有限公司 | A high-gain RF low-noise amplifier |
| CN101656516A (en) * | 2009-07-23 | 2010-02-24 | 复旦大学 | Full-difference CMOS ultra wide band low-noise amplifier |
| CN102163955A (en) * | 2011-04-18 | 2011-08-24 | 上海信朴臻微电子有限公司 | Low-noise amplifier adopting single-ended input and differential output |
| CN102594264A (en) * | 2012-02-22 | 2012-07-18 | 刘轶 | Radio frequency power amplifier and input matching circuit thereof |
Cited By (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107094034A (en) * | 2012-12-27 | 2017-08-25 | 英特尔公司 | High-speed receiver circuit and method |
| CN103117710A (en) * | 2012-12-27 | 2013-05-22 | 中国矿业大学 | Differential type low-noise parallel multifrequency amplifier |
| CN104348432A (en) * | 2013-08-09 | 2015-02-11 | 成都国腾电子技术股份有限公司 | Single-converted-to-double low noise amplifier with highly balanced and stabilized differential output gain phase |
| CN104348432B (en) * | 2013-08-09 | 2017-10-17 | 成都振芯科技股份有限公司 | A kind of difference output gain-phase high balance and sane single turn double low-noise amplifier |
| CN103560760A (en) * | 2013-11-13 | 2014-02-05 | 丹纳赫（上海）工业仪器技术研发有限公司 | Amplification circuit and measurement device |
| CN104901635A (en) * | 2015-06-10 | 2015-09-09 | 思瑞浦微电子科技（苏州）有限公司 | Low-noise PSSR amplifier circuit |
| CN104901635B (en) * | 2015-06-10 | 2018-06-19 | 思瑞浦微电子科技（苏州）股份有限公司 | A kind of low noise PSSR amplifier circuits |
| CN107994872A (en) * | 2017-11-07 | 2018-05-04 | 天津大学 | Big Dipper ground receiver high-gain broadband CMOS low-noise amplifiers |
| CN107994878A (en) * | 2017-11-28 | 2018-05-04 | 中科亿海微电子科技（苏州）有限公司 | Low-noise amplifier and emulation bus receiver for emulation bus receiver |
| CN111434034A (en) * | 2017-12-15 | 2020-07-17 | 华为技术有限公司 | Passband frequency adjustable differential cascode amplifier for optical communications |
| CN110702970B (en) * | 2019-09-06 | 2022-03-22 | 恒大恒驰新能源汽车研究院(上海)有限公司 | Signal detection circuit |
| CN110702970A (en) * | 2019-09-06 | 2020-01-17 | 恒大智慧充电科技有限公司 | Signal detection circuit |
| CN110794909A (en) * | 2019-11-05 | 2020-02-14 | 安徽大学 | Ultra-low power consumption voltage reference source circuit with adjustable output voltage |
| CN110794909B (en) * | 2019-11-05 | 2021-06-04 | 安徽大学 | Ultra-low power consumption voltage reference source circuit with adjustable output voltage |
| CN111525893A (en) * | 2020-04-30 | 2020-08-11 | 杭州中科微电子有限公司 | Broadband low-noise amplifier applied to GNSS dual-frequency receiver |
| CN111525893B (en) * | 2020-04-30 | 2023-08-15 | 杭州中科微电子有限公司 | Broadband low-noise amplifier applied to GNSS dual-frequency receiver |
| CN112187183A (en) * | 2020-10-14 | 2021-01-05 | 成都振芯科技股份有限公司 | Broadband low-noise amplifier with differential structure |
| CN112468099A (en) * | 2020-11-20 | 2021-03-09 | 北京昂瑞微电子技术股份有限公司 | Radio frequency front end and low noise amplifier thereof |
| CN113765481A (en) * | 2021-07-23 | 2021-12-07 | 华东师范大学 | Digital frequency multiplication method and injection locking frequency doubler circuit |
| CN114944823A (en) * | 2022-07-08 | 2022-08-26 | 深圳市德兴达科技有限公司 | Low-noise amplifier |
| CN116317966A (en) * | 2023-03-29 | 2023-06-23 | 南京米乐为微电子科技有限公司 | Amplifying circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102790593A (en) | Parallel-resistance feedback differential low-noise amplifier | |
| CN201039094Y (en) | A high-gain RF low-noise amplifier | |
| CN103117711B (en) | Monolithic integrated radio frequency high-gain low-noise amplifier | |
| EP2557687B1 (en) | Low-noise amplifier, receiver, method and computer program | |
| CN101167245B (en) | Differential inductor-based low noise amplifier | |
| CN102361435B (en) | Variable gain broadband low-noise amplifier | |
| CN102084589B (en) | Method of achieving high selectivity in receiver RF front-ends | |
| CN102394572B (en) | High-linearity low noise amplifier and design method thereof | |
| CN103117712B (en) | Complementary metal-oxide-semiconductor (CMOS) high gain broad band low noise amplifier | |
| CN102163954A (en) | Low-voltage low-noise wideband mixer | |
| CN108063600B (en) | Low-noise amplifier and radio frequency front end integrated circuit | |
| CN104779920A (en) | Cascode radio frequency power amplifier based on closed-loop power control | |
| CN103095224A (en) | Complementary metal-oxide-semiconductor transistor (CMOS) broadband low-noise amplifier adopting noise cancellation technology | |
| GB2481487A (en) | An LNA switchable between inductively degenerated and feedback resistance configurations | |
| US20120293259A1 (en) | Amplifier | |
| CN109167578B (en) | Ultra-wideband low-noise amplifier with active inductor | |
| CN103563250A (en) | Amplifier | |
| CN106487344A (en) | A kind of CMOS technology 2400MHz linear power amplifier | |
| CN103633947A (en) | Noninductive and high-gain CMOS (Complementary Metal Oxide Semiconductor) broadband low-noise amplifier | |
| CN102332877B (en) | Differential complementary metal oxide semiconductor (CMOS) multimode low-noise amplifier with on-chip active Balun | |
| CN104065346A (en) | Broadband low noise amplifier circuit based on cross-coupled feedback | |
| Zhao et al. | A 40–67GHz power amplifier with 13dBm PSAT and 16% PAE in 28 nm CMOS LP | |
| CN100461620C (en) | Differential superimposed RF CMOS low noise amplifier | |
| CN110708025A (en) | Power amplifier using diode compensation capacitor | |
| CN102122921A (en) | Radio frequency low-noise amplifier |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20121121 |