CN102778628A - Integrated circuit chip and testing method thereof - Google Patents
Integrated circuit chip and testing method thereof Download PDFInfo
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- CN102778628A CN102778628A CN2011101341137A CN201110134113A CN102778628A CN 102778628 A CN102778628 A CN 102778628A CN 2011101341137 A CN2011101341137 A CN 2011101341137A CN 201110134113 A CN201110134113 A CN 201110134113A CN 102778628 A CN102778628 A CN 102778628A
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Abstract
The invention relates to an integrated circuit chip and a testing method of the integrated circuit chip. The integrated circuit chip comprises a welding pad, a first resistor, a first switch, a second resistor, a second switch and a control module, wherein the first resistor and the first switch are connected between the welding pad and a first reference voltage end in series; the second resistor and the second switch are connected between the welding pad and a second reference voltage end in series; the control module is used for selectively opening or closing the first switch and the second switch by being matched with an error judgment mechanism; and the error judgment mechanism is used for judging whether the error conditions related to the welding pad exist or not.
Description
Technical field
The present invention is relevant with integrated circuit, and especially the method with testing integrated circuit chip is relevant.
Background technology
In order to keep the utilization elasticity of IC chip under different situations; Many chips are designed to comprise one or more in order to receive the joint final election pad (bonding option pad) of external control voltage; Seeing through overlap joint line (bonding wire) provides Different control voltage to this weld pad, can make chip operation in the different working pattern.With the video signal process chip is example, and joint final election pad wherein is connected to power source supply end or earth terminal, possibly represent this chip to be set to the video signal that receives different size.On the practice, engaging the final election pad also possibly be the demand according to the back-end client, in order to select to open or close the specific function in the chip.
Shown in Fig. 1 (A) and Fig. 1 (B), engage the final election pad and can see through voltage feed end or the earth terminal that a resistance R is solidly connected to chip internal usually, its purpose is that avoiding engaging the final election pad gets into suspension joint (floating) state.With Fig. 1 (A) is example; If weld pad 10 itself is damaged or the overlap joint line 12 that is connected to weld pad 10 comes off; Make weld pad 10 can't receive this external voltage really, the voltage of the internal circuit contact that links to each other with weld pad 10 maintains high potential state to I haven't seen you for ages, rather than is in floating.Relatively, in weld pad 10, overlap joint line 12, the normal situation about connecting of external voltage feed end 14 threes, the voltage of weld pad 10 all can be substantially equal to the voltage of external voltage feed end 14.
After chip manufacturing was accomplished, chip maker must be tested chip usually, wherein comprise running situation and test that test engages final election advance capital for body engage between final election pad and the external voltage feed end be connected whether normal.With Fig. 1 (A) is example, and at first, before overlap joint line 12 was connected to weld pad 10, the tester can judge earlier whether the function of weld pad 10 is normal.After overlap joint line 12 was connected to weld pad 10, whether correctly the tester then was once more detection welding pad 10, overlap joint line 12, external voltage feed end 14 threes connection.
Connected mode with shown in Fig. 1 (A) is an example, at overlap joint before line 12 is connected to weld pad 10, if the tester finds that the voltage of weld pad 10 is not noble potential, and decidable weld pad 10 own defectiveness then, and then judge that this chip is defective products (bad die).On the other hand; After weld pad 10 is connected to external voltage feed end 14 through overlap joint line 12; If external voltage feed end 14 is an earth terminal; Test result points out that but weld pad 10 has high-potential voltage, and the tester can infer that the overlap joint line 12 that should be connected to weld pad 10 possibly come off, also judges that this chip is a defective products.
If there is not resistance R, in case above-mentioned damage takes place or electrically connect error situations such as undesired, the internal circuit contact that links to each other with weld pad 10 promptly is in floating, that is its voltage possibly be noble potential, also possibly be electronegative potential.With Fig. 1 (A) is example, if external voltage feed end 14 is earth terminal, and this suspension joint point by chance has low-potential voltage, and the tester promptly can't detect erroneous condition by test result.The necessity that resistance R that hence one can see that exists.
Yet the external voltage feed end 14 in Fig. 1 (A) is an earth terminal, when normal operation, will have fixing power consumption on the resistance R.Similarly, if the external voltage feed end 14 among Fig. 1 (B) is a power source supply end, when normal operation, also can there be fixing power consumption on the resistance R.For the running gear of suitable attention power supply endurance, the negative effect that said fixing power consumption is brought is especially great.
In addition, with regard to the test aspect, the connected mode that Fig. 1 (A) and Fig. 1 (B) are adopted still can't provide complete test correctness.With person shown in Fig. 1 (A) is example; Under the test pattern after overlap joint line 12 is connected to weld pad 10; If external voltage feed end 14 is a power source supply end, even overlap joint line 12 comes off, weld pad 10 still can have high-potential voltage because of resistance R is connected to internal electric source feed end VDD; Therefore the tester can't detect the existence of erroneous condition, can not improve the problem that possibly exist in overlap joint line 12 welding sequences as quickly as possible.Similarly; With regard to person shown in Fig. 1 (B); Under the test pattern after overlap joint line 12 is connected to weld pad 10, if external voltage feed end 14 is an earth terminal, even overlap joint line 12 comes off; Weld pad 10 still can have low-potential voltage because of resistance R is connected to inner earth terminal GND, and the tester also can't detect the existence of erroneous condition.
Summary of the invention
For addressing the above problem, the present invention proposes a kind of IC chip and method of testing thereof.By in test process, optionally weld pad being connected to different reference voltages and more corresponding test result, IC chip according to the present invention can judge effectively with method of testing whether the electric connection relevant with this weld pad be normal.Because when chip is in the normal operation pattern, can be controlled as between weld pad and the feeder ear/earth terminal and do not have leakage path, can avoid resistance in the prior art to cause the problem of fixedly power consumption according to IC chip of the present invention.
A specific embodiment according to the present invention is a kind of IC chip, wherein comprises weld pad, first resistance, first switch, second resistance, second switch, control module.First resistance and first switch series are connected between this weld pad and first reference voltage end.Second resistance and second switch are serially connected with between this weld pad and second reference voltage end.This control module cooperates a false judgment mechanism optionally to open or close this first switch and this second switch.This false judgment mechanism system is in order to judge whether an erroneous condition relevant with this weld pad exists.
Another specific embodiment according to the present invention is a kind of IC chip test method.One IC chip comprises weld pad, first resistance, first switch, second resistance, second switch.This first resistance and this first open relation are serially connected with between this weld pad and one first reference voltage end.This second resistance and this second switch are serially connected with between this weld pad and one second reference voltage end.This method is at first carried out a measuring process, after opening this first switch and closing this second switch, measures relevant with this weld pad one and receives measuring point, produces one first tested result.Then, this method is carried out another measuring process, after opening this second switch and closing this first switch, measures this once more and receives measuring point, produces one second tested result.Thereafter, this method is promptly carried out a determining step, judges according to this first tested result and this second tested result whether an erroneous condition exists.
Compared to prior art, have low power consumption and can effectively confirm whether to exist the advantage of connection error according to method of testing of the present invention and IC chip.About advantage of the present invention and spirit can by following detailed Description Of The Invention and scheme further to be understood.
Description of drawings
The present invention obtains more deep understanding by attached drawings and explanation:
Fig. 1 (A) and Fig. 1 (B) weld pad connected mode synoptic diagram for adopting in the prior art.
Fig. 2 (A) and Fig. 2 (B) are according to the IC chip partial schematic diagram in the specific embodiment of the present invention.
Fig. 3 (A) and Fig. 3 (B) are the sorting table of test status and test result.
Fig. 4 is according to the IC chip test method flow diagram in the specific embodiment of the present invention.
The main element symbol description
Each element that is comprised in the accompanying drawing of the present invention is listed as follows:
10,22: weld pad 12,32: the overlap joint line
14,34: external voltage feed end R, R1, R2: resistance
S1, S2: switch 24: control module
Embodiment
A specific embodiment according to the present invention is a kind of IC chip, and Fig. 2 (A) is the partial schematic diagram of this IC chip.This IC chip comprises a weld pad 22, one first resistance R 1, one first switch S 1, one second resistance R 2, a second switch S2 and a control module 24.For example, weld pad 22 can be one and engages the final election pad, but not as limit.
Shown in Fig. 2 (A), first resistance R 1 and first switch S 1 are serially connected with weld pad 22 and one first reference voltage end V
Ref1Between, second resistance R 2 is serially connected with weld pad 22 and one second reference voltage end V with second switch S2
Ref2Between.Wherein, the first reference voltage end V
Ref1With the second reference voltage end V
Ref2The voltage that both provide is different.On the practice, first switch S 1 and the first resistance S1 can realize by a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) CMOS1; In like manner, the second switch S2 and the second resistance S2 can also realize by another MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) CMOS2.Wherein, first resistance R 1 and second resistance R 2 are respectively the interior resistance of MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) CMOS1 and CMOS2.Certainly, first switch S 1 and second switch S2 also can realize with a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) respectively.In practical application, the first reference voltage end V
Ref1With the second reference voltage end V
Ref2Can be respectively the inner voltage feed end of IC chip.Below explanation will be with the first reference voltage end V
Ref1Be the power source supply end VDD second reference voltage end V
Ref2For the situation of earth terminal GND is an example.
Cooperate false judgment mechanism, control module 24 is optionally opened (turn-on) or is closed (turn-off) first switch S 1 and second switch S2.This false judgment mechanism can be in the test process program in order to judge whether one of relevant with this weld pad 22 erroneous condition exists.In test process, control module 24 can at first be opened first switch S 1 and closed second switch S2, makes weld pad 22 see through first resistance R 1 and is connected to the first reference voltage end V
Ref1After control module 24 was opened first switch S 1 and closed second switch S2, tester's external instrument capable of using was measured the voltage of weld pad 22, as the first voltage V1.
Then, control module 24 can be opened second switch S2 and closed first switch S 1, makes weld pad 22 see through second resistance R 2 and is connected to the second reference voltage end V
Ref2After control module 24 was opened second switch S2 and closed first switch S 1, the tester can measure the voltage of weld pad 22 once more, as the second voltage V2.
Test before weld pad 22 is connected to the external voltage feed end through the overlap joint line at first is discussed.If the first voltage V1 and power source supply end VDD be equipotential (that is the weld pad 22 and the first reference voltage end V roughly
Ref1Voltage equipotential roughly), and the second voltage V2 and earth terminal GND equipotential (that is the weld pad 22 and the second reference voltage end V roughly
Ref2Voltage equipotential roughly), the function of expression weld pad 22 is normal, the decidable erroneous condition does not exist.
See also the sorting table shown in Fig. 3 (A).If the function of weld pad 22 is normal, when first switch S 1 is opened, first measured when second switch S2 the closes voltage V1 should be noble potential, and when first switch S 1 is closed, the second measured voltage V should be electronegative potential during second switch S2 unlatching.In other words, if test result is different from shown in Fig. 3 (A), expression weld pad 22 can't normal operation, and promptly weld pad 22 possibly damage.
Test after weld pad 22 is connected to the external voltage feed end through the overlap joint line then is discussed.Shown in Fig. 2 (B), weld pad 22 can see through an overlap joint line 32 and receive an external voltage that is provided by external voltage feed end 34.To the circuit shown in Fig. 2 (B), the tester can open first switch S 1 and second switch S2 equally respectively, measures the above-mentioned first voltage V1 and the second voltage V2.
When control module 24 is opened first switch S 1 and closed second switch S2; If the electric connection between weld pad 22, overlap joint line 32 and the external voltage feed end 34 is normal; The voltage no matter external voltage feed end 34 is provided equals the voltage of power source supply end VDD, the voltage of earth terminal GND; Or other voltage potentials, the voltage that weld pad 22 is had all can be substantially equal to this external voltage.Relatively, come off or the problem of loose contact if overlap joint line 32 exists, no matter this external voltage why, and the voltage of weld pad 22 all can be substantially equal to the voltage of power source supply end VDD.
When control module 24 is closed first switch S 1 and opened second switch S2; If the electric connection between weld pad 22, overlap joint line 32 and the external voltage feed end 34 is normal; The voltage no matter external voltage feed end 34 is provided equals the voltage of power source supply end VDD, the voltage of earth terminal GND; Or other voltage potentials, the voltage that weld pad 22 is had all can be substantially equal to this external voltage.Relatively, come off or the problem of loose contact if overlap joint line 32 exists, no matter this external voltage why, and the voltage of weld pad 22 all can be substantially equal to the voltage of earth terminal GND.
In sum, if the electric connection between weld pad 22, overlap joint line 32 and the external voltage feed end 34 is normal, the first voltage V1 and the second voltage V2 can be substantially equal to this external voltage.Relatively, if there is erroneous condition, the first voltage V1 can be substantially equal to the voltage of power source supply end VDD, and the second voltage V2 can be substantially equal to the voltage of earth terminal GND.Hence one can see that, and by the comparison first voltage V1 and the second voltage V2, the tester can judge to be connected whether there is erroneous condition between weld pad 22, overlap joint line 32 and the external voltage feed end 34.More particularly, if the first voltage V1 is different from the second voltage V2, erroneous condition is judged as existence.
See also the sorting table shown in Fig. 3 (B).If inerrancy situation and external voltage have noble potential, no matter be that first switch S 1 is opened or second switch S2 opens, the first voltage V1 and the second voltage V2 can be high-potential voltages.Relatively, if inerrancy situation and external voltage have electronegative potential, no matter be that first switch S 1 is opened or second switch S2 opens, the first voltage V1 and the second voltage V2 can be low-potential voltages.Yet if there is erroneous condition, the first voltage V1 will be different from the second voltage V2.
In above-mentioned each embodiment, measuring object is the voltage of weld pad 22.Must explanation be that in practical application, receiving measuring point can be inner or outside other the electrical end points relevant with weld pad 22 of this IC chip.For example; Suppose that this IC chip has an output pin position (not being shown among the figure) in addition; Its output signal can be different along with the change of the voltage of weld pad 22, and then in present embodiment, whether the tester also can exist an erroneous condition according to the output signal determining of this output pin position.For example, when weld pad 22 has the first voltage V1, this output signal is A; When weld pad 22 has the second voltage V2, this output signal is B, and A is different from B.Test status with Fig. 2 (B) is an example, if the tester finds that under aforementioned two kinds of different connected modes, the output signal of this output pin position is different, then also can judge in view of the above to have erroneous condition.
In another embodiment, this IC chip has two input pin position PE and PS (not being shown among the figure), and the voltage of pin position PE and PS is by control module 24 controls, in order to indicate first switch S 1 and second switch S2 for opening or closing.Wherein, PE has a high-potential voltage when the pin position, representes first switch S 1 and second switch S2 one of which for opening, and another is for closing.In addition, PS has a low-potential voltage when the pin position, representes first switch S 1 for closing, and second switch S2 is for opening; Otherwise PS has a high-potential voltage when the pin position, representes first switch S 1 for opening, and second switch is for closing.In other words; In the test process of weld pad 22 before not being connected to the external voltage feed end through overlap joint line 32; Control module 24 at first makes pin position PE have high-potential voltage and pin position PS has low-potential voltage; Make the switch S 1 of winning for closing, second switch is for opening, to measure the first voltage V1; Then, control module 24 makes pin position PE keep high-potential voltage but pin position PS is transferred to has high-potential voltage, makes the switch S 1 of winning for opening, and second switch S2 is for closing, to measure the second voltage V2.But in the situation of weld pad 22 normal operations, its test result is also shown in Fig. 3 (A).Then, in the test process after weld pad 22 is connected to the external voltage feed end through the overlap joint line, control module 24 same control pin position PE and pin position PS are to reach the purpose of measuring the first voltage V1 and the second voltage V2.Do not come off and under the situation of contactless bad problem, its test result is then shown in Fig. 3 (B) at overlap joint line 32.
After accomplishing test, when this IC chip is in a normal operation pattern, control module 24 can all be closed first switch S 1 with second switch S2, makes 22 of weld pads see through overlap joint line 32 and receives the control voltage that external voltage feed ends 34 provide.When adopting this connected mode, do not have leakage path between weld pad 22 and feeder ear VDD or earth terminal GND, therefore can avoid having in the prior art problem of fixedly power consumption.
Another specific embodiment according to the present invention is a kind of method of testing that is implemented in the IC chip shown in Fig. 2 (A) and Fig. 2 (B).Fig. 4 is the process flow diagram of this method of testing.This method is execution in step S42 at first, after opening first switch S 1 and closing second switch S2, measures relevant with weld pad 22 one and receives measuring point, produces one first tested result.Then, this method is carried out another measuring process S44, after opening second switch S2 and closing first switch S 1, measures this once more and receives measuring point, produces one second tested result.Thereafter, this method is promptly carried out a determining step S46, judges according to this first tested result and this second tested result whether overlap joint line 32 exists a connection error.With regard to the example shown in Fig. 2 (B), if this first tested result is different from this second tested result, erroneous condition is judged as existence.
What must explain is that the execution sequence of step S42 and step S44 is interchangeable.In addition, the measuring point that receives that adopts in the above-mentioned method of testing also itself does not exceed with weld pad 22, and weld pad 22 does not also exceed to engage the final election pad.Easy speech, above-mentioned method of testing also can be used for testing various data inputs/output weld pad or whether the electric power supply weld pad correctly is connected with external circuit.
As stated, by in test process, optionally weld pad being connected to different reference voltages and more corresponding test result, IC chip according to the present invention can judge effectively with method of testing whether the electric connection relevant with this weld pad be normal.Because when chip is in the normal operation pattern, can be controlled as between weld pad and the feeder ear/earth terminal and do not have leakage path, can avoid prior art to use resistance to cause the problem of fixedly power consumption according to IC chip of the present invention.Compared to prior art, method of testing according to the present invention and IC chip have low power consumption and can effectively confirm whether to exist the advantage of connection error.
By the detailed description of above preferred embodiment, hope can be known description characteristic of the present invention and spirit more, and is not to come category of the present invention is limited with the above-mentioned preferred embodiment that is disclosed.On the contrary, its objective is that hope can contain in the category of claim of being arranged in of various changes and tool equality institute of the present invention desire application.
Claims (16)
1. IC chip comprises:
One weld pad;
One first resistance and one first switch are serially connected with between this weld pad and one first reference voltage end;
One second resistance and a second switch are serially connected with between this weld pad and one second reference voltage end; And
This first switch and this second switch are opened or closed to one control module in order to cooperate false judgment mechanism, and wherein this false judgment mechanism is in order to judge whether an erroneous condition relevant with this weld pad exists;
Wherein, the voltage of this second reference voltage end is different from the voltage of this first reference voltage end.
2. IC chip as claimed in claim 1 is characterized in that, in this false judgment mechanism, when this control module is opened this first switch and closed this second switch, relevant with this weld pad one receives measuring point to have one first tested result; Open this second switch and close this first switch when this control module, this receives measuring point to have one second tested result; This first tested result and this second tested result are in order to judge whether this erroneous condition relevant with this weld pad exists.
3. IC chip as claimed in claim 2; It is characterized in that; Before this weld pad receives an external voltage through an overlap joint line; When this first tested result points out roughly equipotential of this weld pad and this first reference voltage end, and this second tested result points out roughly equipotential of this weld pad and this second reference voltage end, and this erroneous condition is judged as and does not exist.
4. IC chip as claimed in claim 2 is characterized in that, has seen through after an overlap joint line receives an external voltage at this weld pad, and when this first tested result is different from this second tested result, this erroneous condition is judged as existence.
5. IC chip as claimed in claim 2 is characterized in that, this first reference voltage end is a power source supply end, and this second reference voltage end is an earth terminal.
6. IC chip as claimed in claim 2 is characterized in that, this receives measuring point is this weld pad itself.
7. IC chip as claimed in claim 2 is characterized in that, this first switch and this second switch comprise a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) respectively.
8. IC chip as claimed in claim 7 is characterized in that, this first resistance and this second resistance are respectively the interior resistance of this MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) that this first switch and this second switch comprised.
9. IC chip as claimed in claim 2 is characterized in that, when this IC chip is in a normal operation pattern, this control module is closed this first switch and this second switch.
10. chip detecting method; In order to test an IC chip; It comprises a weld pad, one first resistance, one first switch, one second resistance, a second switch, and this first resistance and this first switch series are connected between this weld pad and one first reference voltage end, and this second resistance and this second switch are serially connected with between this weld pad and one second reference voltage end; The voltage of this second reference voltage end is different from the voltage of this first reference voltage end, and this method of testing comprises:
After opening this first switch and closing this second switch, measure relevant with this weld pad one and receive measuring point, produce one first tested result;
After opening this second switch and closing this first switch, measure this and receive measuring point, produce one second tested result; And
Judge according to this first tested result and this second tested result whether an erroneous condition exists.
11. chip detecting method as claimed in claim 10; It is characterized in that; Before this weld pad receives an external voltage through an overlap joint line; If this first tested result points out roughly equipotential of this weld pad and this first reference voltage end, and this second tested result points out roughly equipotential of this weld pad and this second reference voltage end, and this erroneous condition is judged as and does not exist.
12. chip detecting method as claimed in claim 10 is characterized in that, after this weld pad received an external voltage through an overlap joint line, if this first tested result is different from this second tested result, this erroneous condition was judged as existence.
13. chip detecting method as claimed in claim 10 is characterized in that, this first reference voltage end is a power source supply end, and this second reference voltage end is an earth terminal.
14. chip detecting method as claimed in claim 10 is characterized in that, this receives measuring point is this weld pad itself.
15. chip detecting method as claimed in claim 10 is characterized in that, if this first tested result is different from this second tested result, this erroneous condition is judged as existence.
16. chip detecting method as claimed in claim 10 is characterized in that, when this IC chip is in a normal operation pattern, this first switch and this second switch are closed.
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| CN201110134113.7A CN102778628B (en) | 2011-05-13 | 2011-05-13 | Integrated circuit chip and testing method thereof |
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| CN201110134113.7A CN102778628B (en) | 2011-05-13 | 2011-05-13 | Integrated circuit chip and testing method thereof |
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| CN103809111A (en) * | 2014-03-05 | 2014-05-21 | 上海华虹宏力半导体制造有限公司 | Chip test circuit and test method thereof |
| CN104076271A (en) * | 2013-03-27 | 2014-10-01 | 上海宏测半导体科技有限公司 | Lithium battery protection circuit testing method and system |
| CN105143896A (en) * | 2013-03-13 | 2015-12-09 | 格伦·J·利迪 | Configurable vertical integration |
| CN104201167B (en) * | 2014-07-31 | 2017-03-15 | 京东方科技集团股份有限公司 | A kind of welding pad structure and display device |
| CN113436562A (en) * | 2021-06-24 | 2021-09-24 | 京东方科技集团股份有限公司 | Display panel, test method and display device |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105143896A (en) * | 2013-03-13 | 2015-12-09 | 格伦·J·利迪 | Configurable vertical integration |
| CN104076271A (en) * | 2013-03-27 | 2014-10-01 | 上海宏测半导体科技有限公司 | Lithium battery protection circuit testing method and system |
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| CN113436562A (en) * | 2021-06-24 | 2021-09-24 | 京东方科技集团股份有限公司 | Display panel, test method and display device |
| CN113436562B (en) * | 2021-06-24 | 2023-12-19 | 京东方科技集团股份有限公司 | Display panel, testing method and display device |
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| CN102778628B (en) | 2015-07-08 |
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