CN102778628B - Integrated circuit chip and testing method thereof - Google Patents
Integrated circuit chip and testing method thereof Download PDFInfo
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- CN102778628B CN102778628B CN201110134113.7A CN201110134113A CN102778628B CN 102778628 B CN102778628 B CN 102778628B CN 201110134113 A CN201110134113 A CN 201110134113A CN 102778628 B CN102778628 B CN 102778628B
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Abstract
The invention relates to an integrated circuit chip and a testing method of the integrated circuit chip. The integrated circuit chip comprises a welding pad, a first resistor, a first switch, a second resistor, a second switch and a control module, wherein the first resistor and the first switch are connected between the welding pad and a first reference voltage end in series; the second resistor and the second switch are connected between the welding pad and a second reference voltage end in series; the control module is used for selectively opening or closing the first switch and the second switch by being matched with an error judgment mechanism; and the error judgment mechanism is used for judging whether the error conditions related to the welding pad exist or not.
Description
Technical field
The present invention is relevant to integrated circuit, and especially relevant to the method for testing integrated circuit chip.
Background technology
In order to retain the utilization elasticity of integrated circuit (IC) chip under different situation, many chips are designed to comprise one or more joint final election pad (bonding option pad) in order to receive External Control Voltage, through overlap joint line (bonding wire), different control voltages is provided to this weld pad, chip operation can be made in different mode of operations.For video signal process chip, joint final election pad is wherein connected to power source supply end or earth terminal, may represent the video signal that this chip is set to receive different size.In practice, joint final election pad also may be the demand according to back-end client, in order to select the specific function of opening or closing in chip.
As shown in Fig. 1 (A) and Fig. 1 (B); engage final election pad can be solidly connected to chip internal usually voltage feed end or earth terminal through a resistance R, its object is to avoid engaging final election pad and enter suspension joint (floating) state.For Fig. 1 (A), if weld pad 10 itself is damaged or the overlap joint line 12 being connected to weld pad 10 comes off, weld pad 10 is made cannot really to receive this external voltage, the voltage of the internal circuit contact be connected with weld pad 10 maintains high potential state to I haven't seen you for ages, instead of is in floating.Relatively, in the situation that weld pad 10, overlap joint line 12, external voltage feed end 14 three normally connect, the voltage of weld pad 10 all can be substantially equal to the voltage of external voltage feed end 14.
After chip manufacturing completes, chip maker must be tested chip usually, and whether wherein comprising test, to engage the connection that the functioning condition of final election advance capital for body and test engage between final election pad and external voltage feed end normal.For Fig. 1 (A), first, before overlap joint line 12 is connected to weld pad 10, tester first can judge that whether the function of weld pad 10 is normal.After line 12 is connected to weld pad 10 to overlap joint, tester is then can detection welding pad 10, overlap joint line 12, external voltage feed end 14 three whether exact connect ion again.
For the connected mode shown in Fig. 1 (A), before overlap joint line 12 is connected to weld pad 10, if tester finds that the voltage of weld pad 10 is not noble potential, then can judge the defectiveness of weld pad 10 own, and then judge that this chip is as defective products (bad die).On the other hand, after weld pad 10 is connected to external voltage feed end 14 through overlap joint line 12, if external voltage feed end 14 is earth terminal, test result but points out that weld pad 10 has high-potential voltage, tester can infer that the overlap joint line 12 that should be connected to weld pad 10 may come off, also judges that this chip is as defective products.
If do not have resistance R, once above-mentioned damage occur or is electrically connected the error situations such as abnormal, namely the internal circuit contact be connected with weld pad 10 is in floating, that is its voltage may be noble potential, also may be electronegative potential.For Fig. 1 (A), if external voltage feed end 14 is earth terminal, and this suspension joint point by chance has low-potential voltage, and namely tester cannot detect erroneous condition by test result.It can thus be appreciated that the necessity that resistance R exists.
But, when the external voltage feed end 14 in Fig. 1 (A) is earth terminal, when normal operation, fixing power consumption will be there is in resistance R.Similarly, if the external voltage feed end 14 in Fig. 1 (B) is power source supply end, when normal operation, also fixing power consumption can be there is in resistance R.For quite paying attention to the running gear of power supply endurance, the negative effect that above-mentioned fixing power consumption brings is especially great.
In addition, with regard to test aspect, the connected mode that Fig. 1 (A) and Fig. 1 (B) adopts there is no the test correctness that method provides complete.For Fig. 1 (A) those shown, under the test pattern that overlap joint line 12 is connected to after weld pad 10, if external voltage feed end 14 is power source supply end, even if overlap joint line 12 comes off, weld pad 10 still can have high-potential voltage because resistance R is connected to internal electric source feed end VDD, therefore tester cannot detect the existence of erroneous condition, and can not improve as quickly as possible may Problems existing in overlap joint line 12 welding sequence.Similarly, with regard to Fig. 1 (B) those shown, under the test pattern that overlap joint line 12 is connected to after weld pad 10, if external voltage feed end 14 is earth terminal, even if overlap joint line 12 comes off, weld pad 10 still can have low-potential voltage because resistance R is connected to inner ground end GND, and tester also cannot detect the existence of erroneous condition.
Summary of the invention
For solving the problem, the present invention proposes a kind of integrated circuit (IC) chip and method of testing thereof.By optionally weld pad being connected to different reference voltage and more corresponding test result in test process, integrated circuit (IC) chip according to the present invention and method of testing effectively can judge that whether the electric connection relevant to this weld pad be normal.Due to when chip is in normal operation mode, can be controlled as between weld pad and feeder ear/earth terminal and there is not leakage path, resistance in prior art can be avoided to cause the problem of fixing power consumption according to integrated circuit (IC) chip of the present invention.
A specific embodiment according to the present invention is a kind of integrated circuit (IC) chip, wherein comprises weld pad, the first resistance, the first switch, the second resistance, second switch, control module.First resistance and the first switch series are connected between this weld pad and the first reference voltage end.Second resistance and second switch are serially connected with between this weld pad and the second reference voltage end.This control module coordinates a false judgment mechanism optionally to open or close this first switch and this second switch.This false judgment mechanism system is in order to judge whether an erroneous condition relevant to this weld pad exists.
Another specific embodiment according to the present invention is a kind of IC chip test method.One integrated circuit (IC) chip comprises weld pad, the first resistance, the first switch, the second resistance, second switch.This first resistance and this first open relation are serially connected with between this weld pad and one first reference voltage end.This second resistance and this second switch are serially connected with between this weld pad and one second reference voltage end.First the method performs a measuring process, at unlatching this first switch after closing this second switch, measures relevant to this weld pad one and is subject to measuring point, generation one first tested result.Then, the method performs another measuring process, is opening this second switch and after closing this first switch, is again measuring and by measuring point, should produce one second tested result.Thereafter, namely the method performs a determining step, judges whether an erroneous condition exists according to this first tested result and this second tested result.
Compared to prior art, according to method of testing of the present invention and integrated circuit (IC) chip, there is low power consumption and can effectively be confirmed whether to exist the advantage of connection error.Can be further understood by following detailed Description Of The Invention and institute figure about the advantages and spirit of the present invention.
Accompanying drawing explanation
The present invention, by following accompanying drawing and explanation, obtains more deep understanding:
The weld pad connected mode schematic diagram of Fig. 1 (A) and Fig. 1 (B) for adopting in prior art.
Fig. 2 (A) and Fig. 2 (B) is according to the integrated circuit (IC) chip partial schematic diagram in a specific embodiment of the present invention.
The sorting table that Fig. 3 (A) and Fig. 3 (B) is test status and test result.
Fig. 4 is according to the IC chip test method flow diagram in a specific embodiment of the present invention.
Main element symbol description
The each element comprised in accompanying drawing of the present invention lists as follows:
10,22: weld pad 12,32: overlap joint line
14,34: external voltage feed end R, R1, R2: resistance
S1, S2: switch 24: control module
Embodiment
A specific embodiment according to the present invention is a kind of integrated circuit (IC) chip, the partial schematic diagram that Fig. 2 (A) is this integrated circuit (IC) chip.This integrated circuit (IC) chip comprises weld pad 22, a 1 first resistance R1, one first switch S 1,1 second resistance R2, a second switch S2 and a control module 24.For example, weld pad 22 can be a joint final election pad, but not as limit.
As shown in Fig. 2 (A), the first resistance R1 and the first switch S 1 are serially connected with weld pad 22 and one first reference voltage end V
ref1between, the second resistance R2 and second switch S2 is serially connected with weld pad 22 and one second reference voltage end V
ref2between.Wherein, the first reference voltage end V
ref1with the second reference voltage end V
ref2the voltage that both provide is different.In practice, the first switch S 1 and the first resistance S1 can realize by a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) CMOS1; In like manner, second switch S2 and the second resistance S2 can also realize by another MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) CMOS2.Wherein, the first resistance R1 and the second resistance R2 is respectively the interior resistance of MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) CMOS1 and CMOS2.Certainly, the first switch S 1 and second switch S2 also can realize with a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) respectively.In actual applications, the first reference voltage end V
ref1with the second reference voltage end V
ref2the voltage feed end of integrated circuit (IC) chip inside can be respectively.Below illustrating will with the first reference voltage end V
ref1for power source supply end VDD and the second reference voltage end V
ref2situation for earth terminal GND is example.
Coordinate a false judgment mechanism, control module 24 optionally opens (turn-on) or closedown (turn-off) first switch S 1 and second switch S2.This false judgment mechanism can be in test process in order to judge the program whether one of relevant to this weld pad 22 erroneous condition exists.In test process, first control module 24 can open the first switch S 1 and close second switch S2, makes weld pad 22 be connected to the first reference voltage end V through the first resistance R1
ref1.After control module 24 is opened the first switch S 1 and closed second switch S2, tester can utilize external instrument to measure the voltage of weld pad 22, as the first voltage V1.
Then, control module 24 can be opened second switch S2 and be closed the first switch S 1, makes weld pad 22 be connected to the second reference voltage end V through the second resistance R2
ref2.After control module 24 is opened second switch S2 and closed the first switch S 1, tester can measure the voltage of weld pad 22 again, as the second voltage V2.
First discuss and be not connected to the test before external voltage feed end through overlap joint line at weld pad 22.If the first voltage V1 and power source supply end VDD is equipotential (that is weld pad 22 and the first reference voltage end V roughly
ref1voltage roughly equipotential), and the second voltage V2 and earth terminal GND roughly equipotential (that is weld pad 22 and the second reference voltage end V
ref2voltage roughly equipotential), represent that the function of weld pad 22 is normal, can decision error situation not exist.
Refer to the sorting table shown in Fig. 3 (A).If the function of weld pad 22 is normal, when the first switch S 1 open, second switch S2 close time the first measured voltage V1 should be noble potential, and when the first switch S 1 close, second switch S2 unlatching time the second measured voltage V should be electronegative potential.In other words, if test result is different from shown in Fig. 3 (A), represent that weld pad 22 cannot normal operation, namely weld pad 22 may damage.
Then discuss and be connected to the test after external voltage feed end through overlap joint line at weld pad 22.As shown in Fig. 2 (B), weld pad 22 can pass through an overlap joint line 32 and receives the external voltage provided by external voltage feed end 34.For the circuit shown in Fig. 2 (B), tester can open the first switch S 1 and second switch S2 equally respectively, measures above-mentioned first voltage V1 and the second voltage V2.
Open the first switch S 1 when control module 24 and close second switch S2, if weld pad 22, overlap joint line 32 and external voltage feed end 34 between electric connection normal, the voltage no matter external voltage feed end 34 provides equals the voltage of power source supply end VDD, the voltage of earth terminal GND, or other voltage potentials, the voltage that weld pad 22 has all can be substantially equal to this external voltage.Relatively, if overlap joint line 32 exists come off or the problem of loose contact, no matter this external voltage why, and the voltage of weld pad 22 all can be substantially equal to the voltage of power source supply end VDD.
Close the first switch S 1 when control module 24 and open second switch S2, if weld pad 22, overlap joint line 32 and external voltage feed end 34 between electric connection normal, the voltage no matter external voltage feed end 34 provides equals the voltage of power source supply end VDD, the voltage of earth terminal GND, or other voltage potentials, the voltage that weld pad 22 has all can be substantially equal to this external voltage.Relatively, if overlap joint line 32 exists come off or the problem of loose contact, no matter this external voltage why, and the voltage of weld pad 22 all can be substantially equal to the voltage of earth terminal GND.
In sum, if weld pad 22, electric connection between overlap joint line 32 and external voltage feed end 34 are normal, the first voltage V1 and the second voltage V2 can be substantially equal to this external voltage.Relatively, if there is erroneous condition, the first voltage V1 can be substantially equal to the voltage of power source supply end VDD, and the second voltage V2 can be substantially equal to the voltage of earth terminal GND.It can thus be appreciated that by comparison first voltage V1 and the second voltage V2, tester can judge weld pad 22, whether the connection overlapped between line 32 and external voltage feed end 34 exists erroneous condition.More particularly, if the first voltage V1 is different from the second voltage V2, erroneous condition is judged as existence.
Refer to the sorting table shown in Fig. 3 (B).If inerrancy situation and external voltage has noble potential, no matter be that the first switch S 1 is opened or second switch S2 opens, the first voltage V1 and the second voltage V2 can be high-potential voltage.Relatively, if inerrancy situation and external voltage has electronegative potential, no matter be that the first switch S 1 is opened or second switch S2 opens, the first voltage V1 and the second voltage V2 can be low-potential voltage.But if there is erroneous condition, the first voltage V1 will be different from the second voltage V2.
In the various embodiments described above, measuring object is the voltage of weld pad 22.Should be noted that, in actual applications, can be this integrated circuit (IC) chip other electrical end points relevant to weld pad 22 inner or outside by measuring point.For example, suppose that this integrated circuit (IC) chip separately has an output pin position (not being shown in figure), its output signal can be different along with the change of the voltage of weld pad 22, then in the present embodiment, tester also can determine whether existence one erroneous condition according to the output signal of this output pin position.For example, when weld pad 22 has the first voltage V1, this output signal is A; When weld pad 22 has the second voltage V2, this output signal is that B, A are different from B.For the test status of Fig. 2 (B), if tester finds under aforementioned two kinds of different connected modes, the output signal of this output pin position is different, then also can it is determined that the presence of erroneous condition accordingly.
In another embodiment, this integrated circuit (IC) chip has two input pin positions PE and PS (not being shown in figure), and the voltage of pin position PE and PS is controlled by control module 24, in order to indicate the first switch S 1 and second switch S2 for opening or closing.Wherein, when pin position, PE has a high-potential voltage, and represent that the first switch S 1 and second switch S2 one are for opening, another is for closing.In addition, when pin position, PS has a low-potential voltage, and represent that the first switch S 1 is for closing, second switch S2 is for opening; Otherwise PS has a high-potential voltage when pin position, represent that the first switch S 1 is for opening, second switch is for closing.In other words, weld pad 22 in not through overlap joint line 32 be connected to external voltage feed end before test process in, control module 24 first makes pin position PE have high-potential voltage and pin position PS has low-potential voltage, make the first switch S 1 for closing, second switch is unlatching, to measure the first voltage V1; Then, control module 24 makes pin position PE maintenance high-potential voltage but pin position PS is transferred to have high-potential voltage, and make the first switch S 1 for opening, second switch S2 is closedown, to measure the second voltage V2.Can the situation of normal operation in weld pad 22, its test result is also as shown in Fig. 3 (A).Then, be connected in the test process after external voltage feed end through overlap joint line in weld pad 22, the same control pin position PE and pin position PS of control module 24 is to reach the object of measurement first voltage V1 and the second voltage V2.Not come off and under the situation of contactless bad problem, its test result is then as shown in Fig. 3 (B) at overlap joint line 32.
After completion of testing, when this integrated circuit (IC) chip is in a normal operation mode, the first switch S 1 can all be closed with second switch S2 by control module 24, makes weld pad 22 only receive through overlap joint line 32 control voltage that external voltage feed end 34 provides.When adopting this connected mode, between weld pad 22 and feeder ear VDD or earth terminal GND, do not have leakage path, therefore can avoid the problem having fixing power consumption in prior art.
Another specific embodiment according to the present invention can realize the method for testing of the integrated circuit (IC) chip shown in Fig. 2 (A) and Fig. 2 (B) for one.Fig. 4 is the process flow diagram of this method of testing.First the method performs step S42, in unlatching first switch S 1 and after closing second switch S2, measures relevant to weld pad 22 one by measuring point, produces one first tested result.Then, the method performs another measuring process S44, is opening second switch S2 and after closing the first switch S 1, is again measuring and by measuring point, should produce one second tested result.Thereafter, namely the method performs a determining step S46, judges whether overlap joint line 32 exists a connection error according to this first tested result and this second tested result.With regard to the example shown in Fig. 2 (B), if this first tested result is different from this second tested result, erroneous condition is judged as existence.
Should be noted that, the execution sequence of step S42 and step S44 is interchangeable.In addition, what adopt in above-mentioned method of testing also itself is not limited with weld pad 22 by measuring point, and weld pad 22 is not also limited to engage final election pad.Easy speech it, above-mentioned method of testing also can be used for testing various data input/output weld pad or electric power supply weld pad whether with external circuit exact connect ion.
As mentioned above, by optionally weld pad being connected to different reference voltage and more corresponding test result in test process, integrated circuit (IC) chip according to the present invention and method of testing effectively can judge that whether the electric connection relevant to this weld pad be normal.Due to when chip is in normal operation mode, can be controlled as between weld pad and feeder ear/earth terminal and there is not leakage path, prior art can be avoided to use resistance to cause the problem of fixing power consumption according to integrated circuit (IC) chip of the present invention.Compared to prior art, there is low power consumption according to the method for testing of the present invention and integrated circuit (IC) chip and can effectively be confirmed whether to exist the advantage of connection error.
By the above detailed description of preferred embodiments, it is desirable to clearly to describe feature of the present invention and spirit, and not with above-mentioned disclosed preferred embodiment, category of the present invention is limited.On the contrary, its objective is wish to contain various change and tool equality be arranged in the present invention institute in the category of the scope of the claims applied for.
Claims (12)
1. an integrated circuit (IC) chip, comprises:
One weld pad;
One first resistance and one first switch, be serially connected with between this weld pad and one first reference voltage end;
One second resistance and a second switch, be serially connected with between this weld pad and one second reference voltage end; And
One control module, in order to coordinate a false judgment mechanism open or close this first switch and this second switch, wherein this false judgment mechanism is in order to judge whether an erroneous condition relevant to this weld pad exists;
Wherein, the voltage of this second reference voltage end is different from the voltage of this first reference voltage end,
Wherein, in this false judgment mechanism, open this first switch and close this second switch when this control module, relevant to this weld pad one has one first tested result by measuring point; Open this second switch when this control module and close this first switch, one second tested result should be had by measuring point; Whether this first tested result and this second tested result exist in order to judgement this erroneous condition relevant to this weld pad,
Wherein, before this weld pad receives an external voltage by an overlap joint line, when this first tested result points out this weld pad and this first reference voltage end roughly equipotential, and this second tested result points out this weld pad and this second reference voltage end roughly equipotential, this erroneous condition is judged as not to be existed.
2. integrated circuit (IC) chip as claimed in claim 1, is characterized in that, after this weld pad receives an external voltage by an overlap joint line, when this first tested result is different from this second tested result, this erroneous condition is judged as existence.
3. integrated circuit (IC) chip as claimed in claim 1, it is characterized in that, this first reference voltage end is a power source supply end, and this second reference voltage end is an earth terminal.
4. integrated circuit (IC) chip as claimed in claim 1, is characterized in that, should be this weld pad itself by measuring point.
5. integrated circuit (IC) chip as claimed in claim 1, it is characterized in that, this first switch and this second switch comprise a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) respectively.
6. integrated circuit (IC) chip as claimed in claim 5, is characterized in that, this first resistance and this second resistance are respectively the interior resistance of this MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) that this first switch and this second switch comprise.
7. integrated circuit (IC) chip as claimed in claim 1, it is characterized in that, when this integrated circuit (IC) chip is in a normal operation mode, this control module closes this first switch and this second switch.
8. a chip detecting method, in order to test an integrated circuit (IC) chip, it comprises a weld pad, one first resistance, one first switch, one second resistance, a second switch, this first resistance and this first switch series are connected between this weld pad and one first reference voltage end, this second resistance and this second switch are serially connected with between this weld pad and one second reference voltage end, the voltage of this second reference voltage end is different from the voltage of this first reference voltage end, and this method of testing comprises:
Open this first switch and after closing this second switch, measure relevant to this weld pad one by measuring point, produce one first tested result;
Open this second switch and after closing this first switch, measure and by measuring point, one second tested result should be produced; And
Judge whether an erroneous condition exists according to this first tested result and this second tested result,
Wherein, before this weld pad receives an external voltage by an overlap joint line, if this first tested result points out this weld pad and this first reference voltage end roughly equipotential, and this second tested result points out this weld pad and this second reference voltage end roughly equipotential, this erroneous condition is judged as not to be existed.
9. chip detecting method as claimed in claim 8, is characterized in that, after this weld pad receives an external voltage by an overlap joint line, if this first tested result is different from this second tested result, this erroneous condition is judged as existence.
10. chip detecting method as claimed in claim 8, it is characterized in that, this first reference voltage end is a power source supply end, and this second reference voltage end is an earth terminal.
11. chip detecting methods as claimed in claim 8, is characterized in that, should be this weld pad itself by measuring point.
12. chip detecting methods as claimed in claim 8, is characterized in that, when this integrated circuit (IC) chip is in a normal operation mode, this first switch and this second switch are closed.
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| CN201110134113.7A CN102778628B (en) | 2011-05-13 | 2011-05-13 | Integrated circuit chip and testing method thereof |
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| CN201110134113.7A CN102778628B (en) | 2011-05-13 | 2011-05-13 | Integrated circuit chip and testing method thereof |
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| US8933715B2 (en) * | 2012-04-08 | 2015-01-13 | Elm Technology Corporation | Configurable vertical integration |
| CN104076271B (en) * | 2013-03-27 | 2018-05-01 | 上海宏测半导体科技有限公司 | The test method and system of lithium battery protection circuit |
| CN103809111B (en) * | 2014-03-05 | 2016-04-06 | 上海华虹宏力半导体制造有限公司 | The test circuit of chip and method of testing thereof |
| CN104201167B (en) * | 2014-07-31 | 2017-03-15 | 京东方科技集团股份有限公司 | A kind of welding pad structure and display device |
| CN113436562B (en) * | 2021-06-24 | 2023-12-19 | 京东方科技集团股份有限公司 | Display panel, testing method and display device |
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| CN1632605A (en) * | 2003-12-22 | 2005-06-29 | 威宇科技测试封装有限公司 | Chip pin open circuit and short circuit tester and method therefor |
| TW200941014A (en) * | 2008-03-25 | 2009-10-01 | Sitronix Technology Corp | Circuit for connection pad test |
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| US6503765B1 (en) * | 2001-07-31 | 2003-01-07 | Xilinx, Inc. | Testing vias and contacts in integrated circuit fabrication |
| KR100703886B1 (en) * | 2005-09-15 | 2007-04-06 | 삼성전자주식회사 | Apparatus for protecting electrical-fuse and semiconductor device comprising the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1632605A (en) * | 2003-12-22 | 2005-06-29 | 威宇科技测试封装有限公司 | Chip pin open circuit and short circuit tester and method therefor |
| TW200941014A (en) * | 2008-03-25 | 2009-10-01 | Sitronix Technology Corp | Circuit for connection pad test |
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