CN102739195A - Processing method, device and system of FIR (finite impulse response) filter - Google Patents
Processing method, device and system of FIR (finite impulse response) filter Download PDFInfo
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Abstract
The embodiment of the invention discloses a processing method, a device and a system of an FIR (finite impulse response) filter. The processing method comprises the following steps: obtaining input signals, storing the input signals in an SRAM (static random access memory) of the FIR filter to enable each input signal to obtain N+1 signal data, then sequentially reading out the N+1 signal data corresponding to one input signal from the SRAM, updating a reading identification once when reading out one signal datum, obtaining a filter coefficient corresponding to the current signal datum according to the reading identification, conducting multiplication of the current signal datum and the obtained filter coefficient to obtain a multiplication result of the current signal datum, accumulating the multiplication results obtained by the N+1 signal data corresponding to one input signal to obtain an addition result, and outputting the addition result. Efficient real-time filtering can be realized so as to save resources and reduce the power consumption.
Description
Technical field
The present invention relates to the communications field, relate in particular to a kind of processing method, device and system of FIR filter.
Background technology
Finite impulse response (FIR; Finite Impulse Response) filter is an element the most basic in the digital information processing system, at present; In digital communication system; Increasing employing FIR filter is realized digital signal filter, and the FIR filter has stable and has strict remarkable advantages such as linear phase-frequency characteristic, and its transfer function can be expressed as:
Wherein, b
iBe filter coefficient, N is the exponent number of filter, z
-iSignal data for input.
At present; The FIR filter generally is made up of a plurality of registers, a plurality of multiplier and a plurality of adder, mainly according to FIR filter amplitude-frequency (FIR filter passband type, cut-off frequency, passband gain and stop band gain) or phase-frequency response requirement etc. through calculating filter coefficient b
iExponent number N with filter.
As shown in Figure 1, Fig. 1 is the implementation structure of FIR filter of the prior art, and wherein, register is used for buffer memory input data, and multiplier is used for input data and filter coefficient are multiplied each other, and adder is used for the output result of multiplier is added up.During filtering,, need a N+1 multiplier and N+1 adder to carry out add operation and multiplying concurrently for a N rank filter.Wherein, for N rank, the input data are the M bit, filter coefficient b
iQuantified precision be the FIR filter of X bit, need the memory cell of N * M bit, N+1 2 input multiplication units, N 2 input adder units.
In research and practice process to prior art, inventor of the present invention finds that FIR filter of the prior art need carry out buffer memory to the input data; And multiplier and adder are concurrently input signal to be carried out filtering; When the input signal bit wide bigger, exponent number more for a long time, treatment effeciency is low; And need take a large amount of logics, cost and power consumption are all very high.
Summary of the invention
The embodiment of the invention provides a kind of processing method, device and system of FIR filter, and filtering efficiently and in real time economizes on resources, and reduces power consumption.
A kind of processing method of FIR filter comprises:
Obtain input signal;
Input signal is stored among the memory SRAM of FIR filter, makes each input signal obtain N+1 signal data, N is the maximum order of FIR filter;
From SRAM, read the pairing N+1 of an input signal signal data successively, and when whenever reading a signal data, upgrade and once read sign;
Obtain the pairing filter coefficient of current demand signal data according to reading sign;
Current demand signal data and the filter coefficient that gets access to are carried out multiplying, obtain the multiplication result of current demand signal data;
A resulting multiplication result of the pairing N+1 of an input signal signal data is added up, obtain the add operation result;
Output add operation result.
A kind of filter comprises:
First acquiring unit is used to obtain input signal;
Storage element is used for the input signal that first acquiring unit gets access to is stored in the memory SRAM of FIR filter, makes each input signal obtain N+1 signal data, and N is the maximum order of FIR filter;
Reading unit is used for reading the pairing N+1 of an input signal signal data successively from SRAM, and when whenever reading a signal data, upgrades and once read sign;
Second acquisition unit is used for obtaining the pairing filter coefficient of current demand signal data according to the sign of reading that reading unit upgrades;
The multiplying unit, the filter coefficient that current demand signal data that are used for reading unit is read and second acquisition unit get access to carries out multiplying, obtains the multiplication result of current demand signal data;
The add operation unit is used for the pairing N+1 of an input signal signal data is added up through the multiplication result that the multiplying unit obtains, and obtains the add operation result;
Output unit is used to export the add operation result that the add operation unit obtains.
A kind of filtering system comprises: above-mentioned any filter.
A kind of FIR filter comprises:
SRAM; Be used to obtain input signal; And, making each input signal obtain N+1 signal data with the input signal storage, N is the maximum order of FIR filter; And read the pairing N+1 of an input signal signal data successively, when whenever reading a signal data, upgrade and once read sign;
MUX is used for identifying the pairing filter coefficient of current demand signal data that output and SRAM read according to reading of upgrading of SRAM;
Multiplier, the filter coefficient of current demand signal data that are used for SRAM is read and MUX output carries out multiplying, obtains the multiplication result of current demand signal data;
Adder is used for the pairing N+1 of an input signal signal data is added up through the multiplication result that multiplier obtains, and obtains the add operation result, and output add operation result.
Can find out that from above technical scheme the embodiment of the invention has the following advantages:
The embodiment of the invention adopts obtains input signal earlier; The input signal that gets access to is stored among the SRAM of FIR filter; Make each input signal obtain N+1 signal data, N is the maximum order of FIR filter, from SRAM, reads the pairing N+1 of an input signal signal data then successively; And when whenever reading a signal data, upgrade and once read sign; Read sign according to this then and obtain the pairing filter coefficient of current demand signal data, current demand signal data and the filter coefficient that gets access to are carried out multiplying, obtain the multiplication result of current demand signal data; Again a resulting multiplication result of the pairing N+1 of an input signal signal data is added up, obtain add operation result and output.Present embodiment is owing to be stored in the input signal that obtains among the very high SRAM of density; And can from SRAM, read the pairing N+1 of an input signal signal data successively; And when whenever reading a signal data, upgrade once to read to identify and obtain the pairing filter coefficient of current demand signal data; The filtration efficiency that can avoid buffer memory to cause is low, efficiently and in real time filtering; In the present embodiment current demand signal data and the filter coefficient that gets access to are carried out multiplying; Again a resulting multiplication result of the pairing N+1 of an input signal signal data is added up; Be to carry out Filtering Processing through adder of time-sharing multiplex and a multiplier; Can economize on resources, reduce power consumption.
Description of drawings
In order to be illustrated more clearly in the technical scheme of the embodiment of the invention; The accompanying drawing of required use is done to introduce simply in will describing embodiment below; Obviously, the accompanying drawing in describing below only is some embodiments of the present invention, to those skilled in the art; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the implementation structure sketch map of FIR filter in the prior art;
Fig. 2 is the flow chart of the processing method of FIR filter in the embodiment of the invention;
Fig. 3 is a sketch map of filter in the embodiment of the invention;
Fig. 4 is another sketch map of filter in the embodiment of the invention;
Fig. 5 is a sketch map of FIR filter in the embodiment of the invention;
Fig. 6 is another sketch map of FIR filter in the embodiment of the invention;
Fig. 7 is the implementation structure sketch map of FIR filter in the embodiment of the invention.
Embodiment
To combine the accompanying drawing in the embodiment of the invention below, the technical scheme in the embodiment of the invention is carried out clear, intactly description, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those skilled in the art are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the present invention's protection.
The embodiment of the invention provides a kind of processing method of FIR filter, is used for filtering efficiently and in real time, can also economize on resources, and reduces power consumption.The embodiment of the invention also provides corresponding filter, and filtering system.Below specify respectively.
Embodiment one
Present embodiment will be described from the angle of filter, and wherein, this filter can be N rank, and input signal is the M bit, filter coefficient b
iQuantified precision be the FIR filter (hereinafter to be referred as the FIR filter) of X bit.What need explanation is that the transfer function of the FIR filter in the present embodiment can be expressed as:
Wherein, b
iBe filter coefficient, N is the exponent number of FIR filter, z
-iSignal data for input.
A kind of processing method of FIR filter comprises:
Obtain input signal earlier; The input signal that gets access to is stored in the holder (SRAM, Static Random Access Memory) of FIR filter, makes each input signal obtain N+1 signal data; N is the maximum order of FIR filter; From SRAM, read the pairing N+1 of an input signal signal data then successively, and when whenever reading a signal data, upgrade and once read sign, read sign according to this then and obtain the pairing filter coefficient of current demand signal data; Current demand signal data and the filter coefficient that gets access to are carried out multiplying; Obtain the multiplication result of current demand signal data, a more resulting multiplication result of the pairing N+1 of an input signal signal data is added up, obtain add operation result and output.
As shown in Figure 2, idiographic flow can be following:
101, obtain input signal;
Wherein, the filter in the present embodiment generally has two ports, and a port is used to obtain input signal, and a port is used to export signal.
Wherein, for a N rank FIR filter, an input signal comprises N+1 signal data.For example, for one 3 rank FIR filter, an input signal comprises 4 signal datas.
102, the input signal that gets access in the step 101 is stored among the memory SRAM of FIR filter, makes each input signal obtain N+1 signal data; For example, specifically can be following:
Optional; Input signal is stored among the memory SRAM of FIR filter; Specifically can realize through following steps: when the input signal that gets access in the step 101 is effective, obtain the write address of this input signal, the write address according to this input signal writes input signal among the SRAM then.
Thus, each input signal can obtain N+1 signal data, and wherein, N is the maximum order of FIR filter.For example, one 3 rank FIR filter, each input signal includes 4 signal datas.
What need explanation is that the write address that the next effectively write address of input signal is previous input signal adds 1, by that analogy, thereby all input signals is write among the SRAM successively.In like manner, each input signal can obtain N+1 signal data.
Wherein, SRAM is a static random access memory, and this SRAM is a kind of internal memory with static access facility, does not need refresh circuit can preserve the data of its storage inside, and density is high, and speed is fast, and performance is good.Compare prior art, the signal data in the present embodiment is stored among the SRAM, has avoided using register to carry out problems such as filtration efficiency that buffer memory causes is low.
Should be understood that for N rank, input signal is the M bit, filter coefficient b
iQuantified precision be the FIR filter of X bit, the SRAM of FIR filter is of a size of (N+1) * M.
103, from SRAM, read the pairing N+1 of an input signal signal data successively, and when whenever reading a signal data, upgrade and once read sign; For example, specifically can be following:
At first, confirm the input signal that current needs read, and obtain the address of reading of input signal that current needs read.
Wherein, when supposing to get access to 10 input signals, need these 10 input signals be carried out filtering and output successively.For example, the input signal that current needs read is second, at first confirms the input signal that current needs read, and at first confirms the input signal that current needs read, and obtains the address of reading of input signal that current needs read.
Preferably, obtain the address of reading of input signal that current needs read, the input signal assignment that specifically can read for current needs according to the write address of input signal obtains the address of reading of input signal that current needs read.Wherein, can be known by step 102 that when an input signal is effective, can obtain N+1 signal data, this N+1 signal data is stored in certain address of SRAM, wherein, the storage address of this input signal promptly is the write address of this signal data.
Then, can from SRAM, read the pairing N+1 of the input signal signal data that current needs read successively, and startup is used to indicate the counter of reading to identify according to the address of reading of input signal.
Wherein, Obtain input signal that current needs read read the address after; Just can read the address according to it N+1 corresponding signal data of input signal that current needs read read out successively, and read with this each signal data that all input signals that need read are corresponding.
Meanwhile, can start one and be used to indicate the counter of reading to identify, this counter is used for the signal data of reading is counted, and when whenever reading a signal data, this counter adds 1, reads up to N+1 signal data.
The counter that preferably, can start one 0 to N is counted the signal data of reading.After N+1 signal data read, can be 0 with counter reset.
Wherein, read to identify the exponent number that can reflect the pairing FIR filter of current demand signal data, therefore, according to reading to identify the exponent number that can confirm the pairing FIR filter of current demand signal data.Should be understood that, the corresponding various signals data of the exponent number of different FIR filters, the exponent number of FIR filter and the corresponding relation of signal data can be through reading the sign reflection.
For example, for one 3 rank FIR filter, an input signal of this FIR filter comprises 4 signal datas when effective, can be Z respectively
-0, Z
-1, Z
-2And Z
-3Wherein, first signal data of reading is Z
-0, what need explanation is this Z
-0Be the current input signal data, this hour counter is 0; When input signal passed through the 1st rank of FIR filter, reading second signal data was Z
-1, upgrade this moment and read to be designated 1; When input signal passed through the 2nd rank of FIR filter, reading the 3rd signal data was Z
-2, this hour counter is 1, and upgrades and read to be designated 2; When input signal passed through the 3rd rank of FIR filter, reading the 4th signal data was Z
-3, this hour counter is 2, and upgrades and read to be designated 3.FIR filter for other exponent numbers by that analogy, repeats no more here.
104, obtain the pairing filter coefficient of current demand signal data according to reading sign;
Optional, at first can with filter coefficient be stored in multiplexer (MUX, multiplexer) in.Should be understood that MUX can export input data wherein as required successively, convenient transmission.
Should be understood that, the exponent number respective filter coefficient of FIR filter, for a N rank FIR filter, its filter coefficient has N+1.For example, for one 3 rank FIR filter, filter coefficient has 4, can be b respectively
0, b
1, b
2And b
3
Wherein, read to identify the exponent number that can reflect the pairing FIR filter of current demand signal data.Therefore, according to reading to identify the exponent number that to confirm the pairing FIR filter of current demand signal data, can obtain the pairing filter coefficient of current demand signal data according to the exponent number of the FIR filter of confirming then.And counter can indicate read the sign.For example, reading first signal data is Z
-0The time, counter is 0, it can be 0 that corresponding reading identifies, and 0 rank of corresponding FIR filter, this moment, filter coefficient was b
0, what need explanation is this Z
-0Be the current input signal data; Reading second signal data is Z
-1The time, counter is 1 o'clock, it can be 1 that corresponding reading identifies, and 1 rank of corresponding FIR filter, this moment, filter coefficient was b
1, by that analogy, repeat no more here.Should be understood that reading to identify with the exponent number of FIR filter can also be the corresponding of other modes, differ one here for example.
Optional, also can from MUX, obtain corresponding filter coefficient according to reading sign through mapping table.Wherein, this mapping table is mapped through exponent number and the filter coefficient of reading to identify signal data, FIR filter one by one, then whenever reads a signal data, can obtain corresponding filter coefficient according to mapping table.
105, the filter coefficient that gets access in current demand signal data of reading in the step 103 and the step 104 is carried out multiplying, obtain the multiplication result of current demand signal data;
Wherein, by before can know, when an input signal is effective, can read N+1 signal data, optional, whenever read a signal data, can be earlier in the multiplier with this signal data of reading input FIR filter.And since whenever read a signal data can upgrade once read the sign; Can read to identify through renewal and obtain the pairing filter coefficient of the current signal data of reading; In the multiplier of the filter coefficient input FIR filter corresponding that will get access to then, carry out multiplying with the signal data that is input in the multiplier with the current signal data that reads.For example, as read output signal data Z
-1The time, at first with Z
-1In the input multiplier, and start a counter, this moment, this counter was 1, and upgraded and read to be designated 1, can be b through reading to identify the corresponding filter coefficient of 1 acquisition
1, and with b
1Be input to and carry out multiplying in the multiplier, obtaining multiplication result is Z
-1* b
1, at last with this multiplication result Z
-1* b
1In the input summer; As read output signal data Z
-2The time, at first with Z
-2Be input in the multiplier, this hour counter is 2, and upgrades and read to be designated 2, can be b through reading to identify the corresponding filter coefficient of 21 acquisitions
2, and with b
2Be input to and carry out multiplying in the multiplier, obtaining multiplication result is Z
-2* b
2, at last with this multiplication result Z
-2* b
2In the input summer, by that analogy, be input in the multiplier and accomplish multiplying up to N+1 signal data.
What need explanation is that an input signal in the present embodiment comprises N+1 signal data, to N+1 filter coefficient should be arranged, needs to carry out N+1 multiplying.
Wherein, because filter coefficient b
iBe decimal, and have:
Optional, generally filter coefficient multiply by gain 2
M, so that filter coefficient is turned to integer, to make things convenient for logical operation, then in final output result divided by the gain 2
M, be 0dB with the center frequency point gain that guarantees the FIR filter.
106, resulting multiplication result of the pairing N+1 of an input signal signal data in the step 105 is added up, obtain the add operation result;
Present embodiment through serial carry out multiplying and filtering is carried out in add operation.Wherein, corresponding N+1 the signal data of input signal can obtain multiplication result successively according to step 105, and multiplication result imported successively in the adder of FIR filter and add up.This elder generation carries out multiplying through a multiplier; The method that through an adder result of multiplying is added up again is called the filtering method of time-sharing multiplex adder and multiplier; Realize filtering through adder of time-sharing multiplex and a multiplier; Can reduce power consumption, improve filtration efficiency.
For example; In the multiplication result input summer of first signal data that will obtain earlier; When obtaining the multiplication result of next signal data; Again with adding up with previous multiplication result in the multiplication result input summer of next signal data, up to N+1 signal data output with an input signal.
For example, can obtain the multiplication result of N+1 corresponding signal data of an input signal according to step 105, the multiplication result that obtains is successively: b
0* Z
-0, Z
-1* b
1, Z
-2* b
2Z
-N* b
N, and with adding up in this multiplication result input summer successively, obtain accumulation result and be: b
0* Z
-0+ Z
-1* b
1+ Z
-2* b
2+ ... + Z
-N* b
N
What need explanation is that an input signal in the present embodiment comprises N+1 signal data, to N+1 filter coefficient should be arranged, needs to carry out N+1 multiplying, and needs to carry out the computing of N+1 sub-addition.
107, the add operation result in the output step 106.
Wherein, the output signal of the filter in the present embodiment is the add operation result in the step 106, is: b
0* Z
-0+ Z
-1* b
1+ Z
-2* b
2+ ... + Z
-N* b
N
Optional, if in step 104, according to after reading to identify the step of obtaining the pairing filter coefficient of current demand signal data filter coefficient being multiply by gain 2
M, make filter coefficient turn to integer, then step 107 is specially:
Add operation result in the step 106 is imported in the divider of FIR filter divided by gain 2
M, make the gain of FIR filter center frequency be 0dB, export the merchant of division arithmetic then.
Wherein, if this division arithmetic is not divided exactly, then in the remainder input summer with this division arithmetic, this remainder and multiplication result in the input summer are next time added up.
By on can know; The present invention adopts and obtains input signal earlier, input signal is stored among the SRAM of FIR filter, makes each input signal obtain N+1 signal data; N is the maximum order of FIR filter; From SRAM, read the pairing N+1 of an input signal signal data then successively, and when whenever reading a signal data, upgrade and once read sign, read sign according to this then and obtain the pairing filter coefficient of current demand signal data; Current demand signal data and the filter coefficient that gets access to are carried out multiplying; Obtain the multiplication result of current demand signal data, a more resulting multiplication result of the pairing N+1 of an input signal signal data is added up, obtain add operation result and output.Present embodiment is owing to being stored in input signal among the very high SRAM of density and can reading the pairing signal data of each input signal successively; The filtration efficiency that can avoid buffer memory to cause is low; Filtering efficiently and in real time, and present embodiment can according to read the sign obtain the pairing filter coefficient of current demand signal data, can carry out Filtering Processing through adder of time-sharing multiplex and a multiplier thus; Can economize on resources, reduce power consumption.
Embodiment two
For the above method of better implement; The embodiment of the invention also provides corresponding filter; As the device of realizing this method in the embodiment of the invention, this filter specifically can comprise first acquiring unit 201, storage element 202, reading unit 203, second acquisition unit 204, multiplying unit 205, add operation unit 206 and output unit 207.See also Fig. 3:
First acquiring unit 201 is used to obtain input signal.Wherein, the filter in the present embodiment generally has two ports, and a port is used to obtain input signal, and a port is used to export signal, therefore, can obtain input signal by a port of this filter.
Wherein, storage element 202 specifically is used for when input signal is effective, the write address of the input signal that acquiring unit gets access to, and according to the write address of input signal input signal is write among the SRAM.
Reading unit 203 is used for reading the pairing N+1 of an input signal signal data successively from SRAM, and when whenever reading a signal data, upgrades and once read sign;
Wherein, Reading unit 203; Specifically be used for the input signal of confirming that current needs read, and obtain the address of reading of input signal that current needs read, and from SRAM, read the pairing N+1 of the input signal signal data that current needs read successively according to the address of reading of input signal.
Wherein, second acquisition unit 204 specifically is used for the exponent number of confirming the pairing FIR filter of current demand signal data according to reading to identify, obtains the pairing filter coefficient of current demand signal data according to the exponent number of the FIR filter of confirming.
Multiplying unit 205, the filter coefficient that current demand signal data that are used for reading unit 203 is read and second acquisition unit 204 get access to carries out multiplying, obtains the multiplication result of current demand signal data.
Add operation unit 206 is used for the pairing N+1 of an input signal signal data is added up through all multiplication results that the multiplying unit obtains, and obtains the add operation result.
Earlier carry out multiplying in the present embodiment through multiplying unit 205; Obtain to export the result through add operation unit 206 with what the result of multiplying added up again; Promptly through time-sharing multiplex multiplying unit 205 and add operation unit 206; Can reduce power consumption, improve filtration efficiency.
Preferably, in order better to realize the function of filter in the present embodiment, the filter in the present embodiment also comprises: counting unit 208 and reset unit 209.Specifically can consult Fig. 4:
Wherein, counting unit 208 is used for indication and reads sign, and when reading unit 203 whenever read a signal data, counting unit 208 added 1.
In addition, multiplying unit 205 also is used for filter coefficient multiply by gain 2
M, make filter coefficient turn to integer; Then filter also comprises: division arithmetic unit 210.Division arithmetic unit 210 is used for the add operation result divided by gain 2
M, obtain the quotient and the remainder of division arithmetic, and with adding up with the multiplication result of next input signal in the adder of the remainder input FIR filter of division arithmetic.
What need explanation is that practical implementation can be consulted embodiment one, repeats no more here.
By on can know; The present invention adopts first acquiring unit 201 to obtain input signal earlier; And be stored among the memory SRAM of FIR filter by the input signal that storage element 202 gets access to first acquiring unit 201; Make each input signal obtain N+1 signal data; From SRAM, read the pairing N+1 of an input signal signal data successively by reading unit 203 then; And when whenever reading a signal data, upgrade and once read sign, obtaining the pairing filter coefficient of current demand signal data by second acquisition unit 204 according to the sign of reading that reading unit 203 upgrades again, the filter coefficient that current demand signal data that then reading unit 203 read and second acquisition unit 204 get access to is imported respectively and is carried out multiplying in the multiplying unit 205; And the result of multiplying imported in the add operation unit 206 add up, at last by output unit 207 input accumulation results.Because can being stored in input signal among the very high SRAM of density, storage element 202 also can read the pairing signal data of each input signal successively in the present embodiment by reading unit 203; The filtration efficiency that can avoid buffer memory to cause is low; Filtering efficiently and in real time; And present embodiment can obtain the pairing filter coefficient of current demand signal data by second acquisition unit 204 according to reading sign; Can carry out Filtering Processing through add operation unit of time-sharing multiplex and a multiplying unit thus, can economize on resources, reduce power consumption.
Embodiment three
Accordingly, the embodiment of the invention also provides a kind of filtering system, and wherein, this filtering system comprises filter.
Wherein, This filter is used to obtain input signal, input signal is stored among the SRAM of FIR filter, makes each input signal obtain N+1 signal data; N is the maximum order of FIR filter; From SRAM, read the pairing N+1 of an input signal signal data successively, and when whenever reading a signal data, upgrade and once read sign, read sign according to this and obtain the pairing filter coefficient of current demand signal data; Current demand signal data and the filter coefficient that gets access to are carried out multiplying; Obtain the multiplication result of current demand signal data, a resulting multiplication result of the pairing N+1 of an input signal signal data is added up, obtain add operation result and output.
What need explanation is, the filter of present embodiment can be any filter among the embodiment two, and practical implementation can be referring to previous embodiment two, and present embodiment repeats no more.
Embodiment four
Present embodiment also provides a kind of FIR filter, and this FIR filter specifically can comprise SRAM401, MUX402, multiplier 403 and adder 404.Specifically can see also Fig. 5:
SRAM401; Be used to obtain input signal; And, making each input signal obtain N+1 signal data with the input signal storage, N is the maximum order of FIR filter; And read the pairing N+1 of an input signal signal data successively, when whenever reading a signal data, upgrade and once read sign.
Wherein, SRAM401 specifically is used for when input signal is effective, obtaining the write address of input signal; And write input signal according to the write address of input signal; Confirm the input signal that current needs read, and obtain input signal that current needs read read read the pairing N+1 of the input signal signal data that current needs read successively according to the address of reading of input signal in the address.
MUX402 is used for identifying the pairing filter coefficient of current demand signal data that output and SRAM read according to reading of upgrading of SRAM.
Wherein, MUX402 specifically is used for the exponent number of reading to identify definite pairing FIR filter of current demand signal data according to the SRAM renewal, according to the pairing filter coefficient of exponent number output current demand signal data of the FIR filter of confirming.
Wherein, Earlier carry out multiplying in the present embodiment, obtain to export the result through adder 404 with what the result of multiplying added up again, promptly through time-sharing multiplex multiplier 403 and adder 404 through multiplier 403; Can reduce power consumption, improve filtration efficiency.
In order better to realize the function of FIR filter in the present embodiment, the FIR filter in the present embodiment also comprises: counter 405 and restorer 406 specifically can see also Fig. 6:
In addition, multiplier 403 also is used for filter coefficient multiply by gain 2
M, make filter coefficient turn to integer.Meanwhile, the FIR filter in the present embodiment also comprises: divider 407.Divider 407 is used for the add operation result divided by gain 2
M, obtain the quotient and the remainder of division arithmetic, with adding up with the multiplication result of next input signal in the remainder input summer of division arithmetic, and the merchant of output division arithmetic.Wherein, this divider 407 is the division arithmetic unit in the filter.
By on can know; The present invention can obtain input signal owing to SRAM401, and the input signal that gets access to is stored, and can read the pairing N+1 of each an input signal signal data successively; The filtration efficiency that can avoid buffer memory to cause is low; Filtering efficiently and in real time reduces power consumption, and the MUX402 in the present embodiment can identify the pairing filter coefficient of current demand signal data that output and SRAM read according to reading of upgrading of SRAM401; Can carry out Filtering Processing through adder 403 of time-sharing multiplex and a multiplier 404 thus, can economize on resources.
Embodiment five
With a concrete application examples embodiment of the invention is described in detail below, sees also Fig. 7, Fig. 7 is the implementation structure sketch map of FIR filter in the embodiment of the invention:
Wherein, the FIR filter of the embodiment of the invention can be N rank, and input signal is the M bit, filter coefficient b
iQuantified precision be the FIR filter (hereinafter to be referred as the FIR filter) of X bit.
Wherein, present embodiment completion multiplication operation or add operation need Min (M, X) individual system clock cycle; By working as input signal effectively once; Can read N+1 signal data can know, FIR filter input data break need be greater than (N+1) Min (M, X) individual system clock cycle.
Wherein, see also Fig. 7, data_in is an input signal; Din_vld is effective input signal, and wr_cnt is the write operation counter, and rd_cnt is the read operation counter; Wr_addr is a write address, and rd_addr is for reading the address, and divider is a divider; Data_out is the output signal, and gain is the gain of FIR filter.
Be that example describes with one of them the effective input signal din_vld among the input signal data_in below:
At first, obtain input signal by SRAM, wherein, din_vld is an input signal when din_in is effective, and SRAM gets access to din_vld, and din_vld is stored; Concrete, SRAM can obtain the write address wr_addr of din_vld earlier, according to wr_addr din_vld is write among the SRAM then.Can obtain N+1 the signal data of din_vld thus; And the wr_addr of this N+1 signal data; Then can be through giving rd_addr to obtain the rd_addr of din_vld the wr_addr assignment of din_vld, the rd_addr according to din_vld reads this N+1 signal data successively then.Wherein, this N+1 signal data is respectively: Z
-0, Z
-1, Z
-2, Z
-3Z
-N
Secondly, read N+1 the signal data of din_vld successively according to the rd_addr of din_vld.Wherein, when the read output signal data, can start one 0 to N be used to indicate the counter rd_cnt that reads to identify; Signal data to reading is counted, and whenever reads a signal data, upgrades and once reads sign; And rd_cnt added 1, read up to N+1 signal data.
Then, can be according to reading to identify N+1 the pairing filter coefficient of signal data that obtains din_vld.Wherein, Read to identify the exponent number that can reflect the pairing FIR filter of current demand signal data; Therefore can obtain the pairing filter coefficient of current demand signal data according to the exponent number of the FIR filter of confirming, and the rd_cnt that is used for that the signal data of reading is counted can indicate and reads sign.Therefore, the signal data of reading successively: 1, Z
-1, Z
-2, Z
-3Z
-NCorresponding respectively filter coefficient is: b
0, b
1, b
2, b
3B
NWhenever read a signal data, with carrying out multiplying with corresponding filter coefficient in this signal data of reading input multiplier, obtaining multiplication result successively be: b
0* Z
-0, Z
-1* b
1, Z
-2* b
2Z
-N* b
N
Then, whenever obtain a multiplication result, this is added up in input summer as a result, therefore, obtain accumulation result and be: b
0* Z
-0+ Z
-1* b
1+ Z
-2* b
2+ ... + Z
-N* b
N
At last, this accumulation result is exported as output signal data_out.
What need explanation is, but multiplier and adder time-sharing multiplex promptly whenever obtain a multiplication result, can carry out an add operation, and multiplying and add operation can be carried out simultaneously, can economize on resources, and lowers power consumption, improves filtration efficiency.
What need explanation is, when gain, at last divided by gain gain, with the signal output of gain for 0dB.
What need explanation is, because filter coefficient b
iBe decimal, generally with b
iMultiply by gain gain, with b
iTurn to integer, then after obtaining accumulation result, divided by gain gain, to guarantee that the FIR filter gain is 0dB, last export structure is the merchant of division arithmetic with this accumulation result.What need explanation is if do not divide exactly when this division arithmetic, then in the remainder input summer with this division arithmetic, the multiplication result in this remainder and the next input signal to be added up.
In like manner; When the input of next input signal, obtain this input signal earlier and it is stored among the SRAM, from SRAM, read N+1 corresponding signal data of this input signal then successively; And when whenever reading a signal data, upgrade and once read sign; Obtain the corresponding filter coefficient of signal data that current needs read through reading to identify, then current signal data of reading and the filter coefficient corresponding with it are carried out multiplying, and multiplication result is added up; Obtain accumulation result and output, up to the input signal output that all is needed filtering.
What need explanation is that practical implementation can be repeated no more referring to the foregoing description here.
One of ordinary skill in the art will appreciate that all or part of step that realizes in the foregoing description method is to instruct relevant hardware to accomplish through program; Described program can be stored in a kind of computer-readable recording medium; The above-mentioned storage medium of mentioning can be a read-only memory, disk or CD etc.
More than processing method, device and the system of a kind of FIR filter provided by the present invention carried out detailed introduction; Used concrete example among this paper principle of the present invention and execution mode are set forth, the explanation of above embodiment just is used for helping to understand method of the present invention and core concept thereof; Simultaneously, for those skilled in the art, according to the thought of the embodiment of the invention, the part that on embodiment and range of application, all can change, in sum, this description should not be construed as limitation of the present invention.
Claims (17)
1. the processing method of a FIR filter is characterized in that, comprising:
Obtain input signal;
Said input signal is stored among the memory SRAM of said FIR filter, makes each input signal obtain N+1 signal data, N is the maximum order of said FIR filter;
From SRAM, read the pairing N+1 of an input signal signal data successively, and when whenever reading a signal data, upgrade and once read sign;
Obtain the pairing filter coefficient of current demand signal data according to the said sign of reading;
Said current demand signal data and the filter coefficient that gets access to are carried out multiplying, obtain the multiplication result of current demand signal data;
A resulting multiplication result of the pairing N+1 of an input signal signal data is added up, obtain the add operation result;
Export said add operation result.
2. method according to claim 1 is characterized in that, among the said memory SRAM that said input signal is stored in said FIR filter, comprising:
When said input signal is effective, obtain the write address of said input signal;
Write address according to said input signal writes said input signal among the said SRAM.
3. method according to claim 2 is characterized in that, saidly from SRAM, reads the pairing N+1 of an input signal signal data successively, and when whenever reading a signal data, upgrades and once read sign, comprising:
Confirm the input signal that current needs read, and obtain the address of reading of input signal that said current needs read;
The address of reading according to said input signal is read the pairing N+1 of the input signal signal data that said current needs read successively from said SRAM, and startup is used to indicate the counter of reading to identify;
When whenever reading a signal data, said counter is added 1.
4. method according to claim 3 is characterized in that, the reading of the input signal that the said current needs of said acquisition read comprises the address:
According to the input signal assignment that the write address of said input signal reads for said current needs, obtain the address of reading of input signal that said current needs read.
5. according to claim 3 or 4 described methods, it is characterized in that, after the said add operation result of said output, also comprise:
With said counter reset is 0.
6. according to each described method in the claim 1 to 4, it is characterized in that,
The said exponent number of reading to identify the pairing FIR filter of reflection current demand signal data then saidly obtains the pairing filter coefficient of current demand signal data according to the said sign of reading, and comprising:
According to the said exponent number of reading to identify definite pairing FIR filter of current demand signal data;
Exponent number according to the FIR filter of confirming obtains the pairing filter coefficient of current demand signal data.
7. according to each described method in the claim 1 to 4, it is characterized in that, said said current demand signal data and the filter coefficient that gets access to carried out also comprising before the step of multiplying:
Said filter coefficient multiply by gain 2
M, make said filter coefficient turn to integer.
8. method according to claim 7 is characterized in that, the said add operation result of said output comprises:
With said add operation result divided by the gain 2
M, obtain the quotient and the remainder of division arithmetic, wherein, the multiplication result of the remainder of said division arithmetic being imported in the adder of said FIR filter with the signal data of next input signal adds up;
Export the merchant of said division arithmetic.
9. a filter is characterized in that, comprising:
First acquiring unit is used to obtain input signal;
Storage element is used for the input signal that said first acquiring unit gets access to is stored in the memory SRAM of said FIR filter, makes each input signal obtain N+1 signal data, and N is the maximum order of said FIR filter;
Reading unit is used for reading the pairing N+1 of an input signal signal data successively from SRAM, and when whenever reading a signal data, upgrades and once read sign;
Second acquisition unit is used for obtaining the pairing filter coefficient of current demand signal data according to the sign of reading that said reading unit upgrades;
The multiplying unit, the filter coefficient that current demand signal data that are used for said reading unit is read and said second acquisition unit get access to carries out multiplying, obtains the multiplication result of current demand signal data;
The add operation unit is used for the pairing N+1 of an input signal signal data is added up through the multiplication result that said multiplying unit obtains, and obtains the add operation result;
Output unit is used to export the add operation result that said add operation unit obtains.
10. filter according to claim 9 is characterized in that,
Said storage element is used for when input signal is effective, obtains the write address of the input signal that said acquiring unit gets access to, and according to the write address of said input signal said input signal is write among the SRAM;
Said reading unit; Be used for the input signal that definite current needs read; And obtain the address of reading of input signal that said current needs read, and from SRAM, read the pairing N+1 of the input signal signal data that said current needs read successively according to the address of reading of said input signal;
Said second acquisition unit is used for reading to identify the exponent number of confirming the pairing FIR filter of current demand signal data according to said, obtains the pairing filter coefficient of current demand signal data according to the exponent number of the FIR filter of confirming.
11. according to claim 9 or 10 described filters, it is characterized in that, also comprise:
Counting unit is used for indication and reads sign, and when reading unit whenever read a signal data, said counting unit added 1;
Reset unit is used for after output unit output add operation result, said counting unit being reset to 0.
12. according to claim 9 or 10 described filters, it is characterized in that,
Said multiplying unit also is used for said filter coefficient multiply by gain 2
M, make said filter coefficient turn to integer; Then said filter also comprises:
The division arithmetic unit is used for said add operation result divided by gain 2
M, obtain the quotient and the remainder of division arithmetic, and the multiplication result that the remainder of said division arithmetic is imported in the said add operation unit with next input signal adds up.
13. a filtering system is characterized in that, comprising:
Like each described filter in the claim 9 to 12.
14. a FIR filter is characterized in that, comprising:
SRAM; Be used to obtain input signal; And, making each input signal obtain N+1 signal data with said input signal storage, said N is the maximum order of said FIR filter; And read the pairing N+1 of an input signal signal data successively, when whenever reading a signal data, upgrade and once read sign;
MUX is used for identifying the pairing filter coefficient of current demand signal data that output and said SRAM read according to reading of upgrading of said SRAM;
Multiplier, the filter coefficient of current demand signal data that are used for said SRAM is read and said MUX output carries out multiplying, obtains the multiplication result of current demand signal data;
Adder is used for the pairing N+1 of an input signal signal data is added up through the multiplication result that said multiplier obtains, and obtains the add operation result, and exports said add operation result.
15. FIR filter according to claim 14 is characterized in that,
Said SRAM; Be used for when input signal is effective; Obtain the write address of input signal, and write said input signal, confirm the input signal that current needs read according to the write address of said input signal; And obtain input signal that said current needs read read read the pairing N+1 of the input signal signal data that said current needs read successively according to the address of reading of said input signal in the address;
Said MUX is used for the exponent number of reading to identify definite pairing FIR filter of current demand signal data according to said SRAM renewal, according to the pairing filter coefficient of exponent number output current demand signal data of the FIR filter of confirming.
16. according to claim 14 or 15 described FIR filters, it is characterized in that, also comprise:
Counter is used for indication and reads sign, and when said SRAM whenever read a signal data, said counter added 1;
Restorer, being used for after said adder output add operation result said counter reset is 0.
17. according to claim 14 or 15 described FIR filters, it is characterized in that,
Said multiplier also is used for said filter coefficient multiply by gain 2
M, make said filter coefficient turn to integer; Then said FIR filter also comprises:
Divider is used for said add operation result divided by gain 2
M, obtaining the quotient and the remainder of division arithmetic, the multiplication result that the remainder of said division arithmetic is imported in the said adder with next input signal adds up, and the merchant of output division arithmetic.
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