CN102709326B - Thin film transistor (TFT) and its manufacture method, array base palte and display device - Google Patents

Thin film transistor (TFT) and its manufacture method, array base palte and display device Download PDF

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Publication number
CN102709326B
CN102709326B CN201210133357.8A CN201210133357A CN102709326B CN 102709326 B CN102709326 B CN 102709326B CN 201210133357 A CN201210133357 A CN 201210133357A CN 102709326 B CN102709326 B CN 102709326B
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layer
thin film
active layer
film transistor
tft
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CN102709326A (en
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阎长江
李田生
徐少颖
谢振宇
陈旭
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Beijing BOE Optoelectronics Technology Co Ltd
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Beijing BOE Optoelectronics Technology Co Ltd
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Priority to PCT/CN2012/085212 priority patent/WO2013159513A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78609Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing leakage current
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H01L29/78693Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device

Abstract

The invention discloses a kind of thin film transistor (TFT) and its manufacture method, array base palte and display device, it is related to display technology field, to reduce the leakage current of thin film transistor (TFT), improves TFT stability.A kind of thin film transistor (TFT), including grid, gate insulation layer, active layer and the source-drain electrode layer being formed on substrate, the source-drain electrode layer include source electrode and the drain electrode of the thin film transistor (TFT);Wherein, the active layer uses metal-oxide semiconductor (MOS), and metal layer is equipped between the active layer and the gate insulation layer, to reduce the carrier capture effect between the active layer and gate insulation layer.The scheme that the embodiment of the present invention is provided is suitable for arbitrarily needing the display device being driven using thin film transistor (TFT).

Description

Thin film transistor (TFT) and its manufacture method, array base palte and display device
Technical field
The present invention relates to display technology field, more particularly to a kind of thin film transistor (TFT) and its manufacture method, array base palte and Display device.
Background technology
Thin Film Transistor-LCD (Thin Film Transistor-Liquid relatively common at present CrystalDisplay, TFT-LCD) it is broadly divided into active matrix liquid crystal display (AM-LCD) and passive matrix liquid crystal display (PM-LCD).Wherein, the active layer of active matrix liquid crystal display is mainly made of non-crystalline silicon (a-Si) or polysilicon (p-Si).
For a-Si TFT, shortcoming is relatively low mobility and stability be affected by temperature it is larger;For p-Si TFT, shortcoming be deposition film homogeneity difference and polycrystalline crystal boundary distribution difference and caused by display performance difference it is big.By In it is above-mentioned using present in silicon substrate as the thin film transistor (TFT) of active layer the defects of restrict the development of liquid crystal display always, gradually not It can meet current needs.
Wherein, substitute silicon substrate brilliant as film using metal-oxide semiconductor (MOS)s such as a-IGZO (amorphous-indium gallium zinc oxide) The active layer of body pipe, since its design change of original structure to TFT is smaller, and the corresponding technological process of remaining structure is substantially not Change, therefore scrap build is relatively easy;Mostly important, the thin film transistor (TFT) based on metal-oxide semiconductor (MOS)s such as a-IGZO Performance is significantly improved, and causes the concern of display field, substitutes silicon-based film transistor and becomes follow-on mainstream Technology.
However, the thin film transistor (TFT) based on metal-oxide semiconductor (MOS)s such as a-IGZO is touching the water and oxygen of external environment During gas, or during deposition forms etching barrier layer SiO2, oxygen atom can pass through a-IGZO TFT active layers and penetrate into To gate insulation layer;At the same time in working status, when the light of backlight is irradiated to array base palte, external environment can be activated and produced Shallow energy level defect state, occurs carrier capture effect in the interface of active layer and gate insulation layer, in turn results in relatively large Leakage current, have impact on TFT stability.
The content of the invention
The embodiment of the present invention provides a kind of thin film transistor (TFT) and its manufacture method, array base palte and display device, to The leakage current of thin film transistor (TFT) is reduced, improves TFT stability.
To reach above-mentioned purpose, the embodiment of the present invention adopts the following technical scheme that:
A kind of thin film transistor (TFT), including grid, gate insulation layer, active layer and the source-drain electrode layer being formed on substrate, institute Stating source-drain electrode layer includes source electrode and the drain electrode of the thin film transistor (TFT);Wherein, the active layer is partly led using metal oxide Body, is equipped with metal layer between the active layer and the gate insulation layer, to reduce between the active layer and gate insulation layer Carrier capture effect.
A kind of method for fabricating thin film transistor, is included on substrate and forms grid, gate insulation layer, active layer and source-drain electrode The process of layer;Wherein, the source-drain electrode layer includes source electrode and the drain electrode of the thin film transistor (TFT);The active layer uses metal Oxide semiconductor;Moreover,
Between form the gate insulation layer the step of and the step of forming the active layer, further include:Formed between institute State the metal layer between gate insulation layer and the active layer.
A kind of array base palte, including above-mentioned thin film transistor (TFT).
A kind of display device, including above-mentioned array base palte.
Thin film transistor (TFT) provided in an embodiment of the present invention and its manufacture method, array base palte and display device, by oxygen Metal layer is set between the active layer and gate insulation layer of compound thin film transistor (TFT), so as to form between active layer and metal layer Contact surface between contact surface and metal layer and gate insulation layer;And the contact surface between the metal layer and gate insulation layer Place, can be provided substantial amounts of carrier by the metal layer, the carrier capture effect at effective compensation gate insulator layer interface, because The carrier capture effect of this interface can be ignored;Compared with existing oxide thin film transistor, provided in this programme Thin film transistor (TFT) can effectively reduce the leakage current of thin film transistor (TFT), improve TFT stability.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, embodiment will be described below Needed in attached drawing be briefly described, it should be apparent that, drawings in the following description be only the present invention some Embodiment, for those of ordinary skill in the art, without creative efforts, can also be attached according to these Figure obtains other attached drawings.
Fig. 1 is the structure diagram of the thin film transistor (TFT) provided in the embodiment of the present invention;
Fig. 2 is the position view one of the metal layer 7 in Fig. 1;
Fig. 3 is the position view two of the metal layer 7 in Fig. 1;
Fig. 4~Fig. 7 is the flow diagram of thin film transistor (TFT) production method provided in an embodiment of the present invention;
Fig. 8 is a kind of structure diagram of array base palte provided in an embodiment of the present invention;
Reference numeral:1- substrates;2- grids;3- gate insulation layers;4- active layers;5- source electrodes;6- drains;7- metal layers;8- Etching barrier layer;9- passivation layers;10- pixel electrodes.
Embodiment
Below in conjunction with the attached drawing in the embodiment of the present invention, the technical solution in the embodiment of the present invention is carried out clear, complete Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, those of ordinary skill in the art are obtained every other without creative efforts Embodiment, belongs to the scope of protection of the invention.
Below in conjunction with the accompanying drawings to thin film transistor (TFT) provided in an embodiment of the present invention and its manufacture method, array base palte and display Device is described in detail.
As shown in Figure 1, thin film transistor (TFT) provided in an embodiment of the present invention, including the grid 2, the grid that are formed on substrate 1 are exhausted Edge layer 3, active layer 4 and source-drain electrode layer, the source-drain electrode layer include source electrode 5 and the drain electrode 6 of thin film transistor (TFT);Wherein, it is described Active layer 4 uses metal-oxide semiconductor (MOS), and metal layer 7 is equipped between active layer 4 and gate insulation layer 3, to reduce State the carrier capture effect between active layer 4 and gate insulation layer 3.
In the thin film transistor (TFT) shown in Fig. 1, metal-oxide semiconductor (MOS) can be but not limited to used by active layer 4 It is indium gallium zinc oxide a-IGZO;As long as the transparent oxide film for possessing good characteristic of semiconductor may be incorporated for active The making of layer.
It is to introduce film crystal provided by the present invention by taking bottom gate type TFT as an example in Fig. 1 and follow-up embodiment Pipe structure;For top gate type TFT, those skilled in the art can obtain in thought progress modification according to the present invention, herein no longer Repeat.But it should be noted that the top gate type TFT of thought is improved based on the present invention equally should also belong to protection model of the invention Within enclosing.
Preferably, the material of above-mentioned metal layer 7 can select Titanium Ti;In this way, between metal Ti and gate insulation layer 3 Contact surface at, substantial amounts of carrier can be provided by the Ti in metal layer 7, the carrier at effective compensation gate insulator layer interface Capture effect, therefore the carrier capture effect of interface can be ignored, and then the threshold voltage of TFT is reduced, increase ON state electricity Stream, while reduce power consumption.
Further, it is also formed with contact surface between above-mentioned metal layer 7 and active layer 4;Since active layer 4 employs metal Oxide semiconductor, by taking a-IGZO as an example, and the oxygen atom in a-IGZO materials is easily adsorbed by metal Ti, therefore in metal One layer of titanium oxide TiOx film (as shown in Figure 2) can be formed between Ti and active layer 4.The TiOx films can stop that a-IGZO has Oxygen atom in active layer penetrates further into gate insulation layer, and avoids the oxygen defect state V for causing gate insulation layer to produce shallow energy level [O], therefore can equally be effectively reduced the generation of thin film transistor (TFT) work leakage current.
Certainly, above-mentioned metal layer 7 can also select other metals, such as metallic aluminium Al;Similarly, in metal Al and grid gold On the contact surface for belonging to layer, Al can provide enough carriers to compensate carrier capture effect, at the same metal Al with it is active On the contact surface of layer, the Al2O3 that Al is oxidized to form can prevent the oxygen atom in a-IGZO from being spread to gate insulation layer, so as to drop The work leakage current of low TFT, lifts TFT stability.
In the present embodiment, metal layer 7 is completely covered in active layer 4.Specifically, it is referred to shown in Fig. 2 and Fig. 3 Two kinds of structures.From fig. 2 it can be seen that active layer 4 is coated on the top of metal layer 7, to avoid metal layer 7 and source electrode 5, drain electrode 6 directly contact and cause TFT to fail;In addition, metal layer 7 can also be embedded in gate insulation layer 3, be formed shown in Fig. 3 Structure.As long as metal layer is set between active layer 4 and gate insulation layer 3, to reduce the structure of TFT work leakage currents all It should belong within protection scope of the present invention.
In addition, in thin film transistor (TFT) provided in this embodiment, etching barrier layer is additionally provided with above the active layer (Etch Stop Layer, ESL) 8.
The thin film transistor (TFT) provided in the embodiment of the present invention, passes through the active layer and gate insulation in oxide thin film transistor Metal layer is set between layer, so as to form between the contact surface and metal layer and gate insulation layer between active layer and metal layer Contact surface.At contact surface between the metal layer and gate insulation layer, substantial amounts of current-carrying can be provided by the metal layer Son, the carrier capture effect at effective compensation gate insulator layer interface, therefore the carrier capture effect of interface can be ignored, ON state current can effectively be increased, reduce the power consumption of thin film transistor (TFT);Meanwhile the contact between the active layer and metal layer At face, metal layer adsorbs the oxygen atom in the active layer and forms one layer of metal-oxide film, stops the oxygen in active layer Atom penetrates further into gate insulation layer, avoids the oxygen atom in gate insulation layer and deep energy level transition occurs because of illumination, equally The work leakage current of TFT can be reduced.
Compared with existing oxide thin film transistor, the thin film transistor (TFT) provided in this programme effectively reduces leakage current Generation, reduce threshold voltage, increase ON state current, reduce power consumption;Possess individual layer a-IGZO active layers with existing Thin film transistor (TFT) compare, the thin film transistor (TFT) in the present embodiment greatly improves TFT stability.
Corresponding to above-mentioned thin film transistor (TFT), the embodiment of the present invention additionally provides a kind of manufacture method of thin film transistor (TFT), bag Include the process that grid, gate insulation layer, active layer and source-drain electrode layer are sequentially formed on substrate;The source-drain electrode layer includes institute State source electrode and the drain electrode of thin film transistor (TFT);Wherein, the active layer uses metal-oxide semiconductor (MOS);Moreover,
After the gate insulation layer is formed and before the active layer is formed, further include:On the gate insulation layer The square metal layer between the gate insulation layer and the active layer.
Above-mentioned method for fabricating thin film transistor is further described below.In follow-up description, still with bottom gate Exemplified by type TFT, specifically it can refer to shown in Fig. 4 to Fig. 7.
Method for fabricating thin film transistor in the present embodiment, specifically includes following steps:
S1, deposit grid metal film on substrate 1, and forms grid line (not shown) and grid 2 by patterning processes, As shown in Figure 4;
Wherein, substrate 1 can be but not limited to glass substrate, quartz base plate or the substrate base formed by organic material Plate.
S2, deposit gate insulation layer 3 on the substrate formed with grid line and grid 2, as shown in Figure 5;
S3, deposit one layer of metallic film, such as metal Ti on gate insulation layer 3, and forms metal layer 7 by patterning processes Pattern, as shown in fig. 6, alloing metal layer 7 to be folded between gate insulation layer 3 and active layer 4;
S4, under Ar/O2 atmosphere, in 7 disposed thereon oxide semiconductor thin-film of metal layer, such as a-IGZO, and pass through Patterning processes form the pattern of active layer 4;
Wherein, the metal layer 7 is completely covered in active layer 4.As shown in fig. 7, active layer 4 can be coated on the metal The top of layer 7 so that the both sides of metal layer 7 will not be connected due to the source electrode with thin film transistor (TFT), drain electrode and cause TFT to fail.
Wherein, the pattern of active layer 4 is formed by patterning processes, is specially:Above the oxide semiconductor thin-film Photoresist is coated, and is exposed, developing process, forms the figure of active layer 4 on oxide semiconductor layer by wet etching afterwards Case.
In addition, after step S4 is completed, etching barrier layer 8 can also be formed in the top of active layer 4, to follow-up Technical process in active layer 4 is protected.
S5, make annealing treatment the active layer 4 under oxygen atmosphere;
Under Ar/O2 atmosphere, the oxygen atom in the metal oxide such as a-IGZO in active layer 4 is relatively low towards oxygen content Regional diffusion, i.e., spread into metal layer 7.
In the present embodiment, the metal layer 7 can use metal Ti, and the oxygen easily adsorbed due to Ti in active layer is former Son, therefore after the annealing process, the titanium at the contact surface of active layer 4 and metal layer 7, which is partially oxidized, is just easy to shape Into one layer of TiOx sull.
Specifically, in annealing process, the metal-oxide film such as a-IGZO in active layer can be subject to temperature Influence, valence link activates and produces certain oxygen effusion;Since annealing is carried out under oxygen atmosphere, extraneous oxygen concentration, which is more than, to be had The oxygen concentration of active layer, the oxygen for having part are spread to active layer.Both of the aforesaid process exists at the same time in annealing, passes through control Oxygen-supply quantity processed, can adjust the effusion of oxygen and the equilibrium state diffused into.Therefore, above-mentioned annealing process, in active layer 4 The metal oxide such as a-IGZO influence of oxygen content it is little.
In addition, heating annealing can make a-IGZO active layers reduce defect state, interface is set to connect interface by coarse smoothened It is good to touch property.
S6, one layer of drain metallic film of disposed thereon in active layer 4, and form thin film transistor (TFT) by patterning processes Source electrode 5 and drain electrode 6;Finally formed thin-film transistor structure is as shown in Figure 1.
The making of thin film transistor (TFT) can be completed by above step.
If array base palte production process, then need to only be continuously formed on the substrate for having formd above-mentioned thin film transistor (TFT) The structures such as passivation layer, pixel electrode layer.It is no longer superfluous herein since subsequent technique is similar with existing array base palte manufacture craft State.
Although above method description is by taking bottom gate type TFT as an example, it will be apparent to those skilled in the art that can be very Easily above-mentioned improvement thought is combined with top gate type TFT, and the making of top gate type TFT is realized by specific steps Journey.Process for improving thought making top gate type TFT using the present invention, details are not described herein again;But, improved based on the present invention The top gate type TFT production methods of thought should belong within protection scope of the present invention.
Scheme in the embodiment of the present invention is by by semiconductor a-IGZO films, being designed as the covering of a-IGZO thin film actives layer Metal layer Ti, so as to form twin-channel active layer, has not only reached oxygen atom in barrier oxide semiconductor active layer Gate insulator is crossed into, reduces work leakage current, while effectively provide a large amount of carriers to compensate interfacial dielectric layer current-carrying Sub- capture effect, so as to solve the technical problem that oxide bulk transistor drain current is larger and stability is poor.
In addition, additionally providing a kind of array base palte in embodiments of the present invention, which is included in above-described embodiment Described thin film transistor (TFT).
Fig. 8 show a kind of array base-plate structure provided in the embodiment of the present invention, it includes substrate 1, and shape successively Into grid 2 on substrate 1, gate insulation layer 3, active layer 4 and source-drain electrode layer, which includes thin film transistor (TFT) Source electrode 5 and drain electrode 6;Passivation layer 9 is also formed with above the gate insulation layer 3 and source-drain electrode layer, and above passivation layer 9 Pixel electrode 10 is also formed with, which is electrically connected by passivation layer via hole with the drain electrode 6;
Wherein, the active layer 4 uses metal-oxide semiconductor (MOS), and is equipped between active layer 4 and gate insulation layer 3 Metal layer 7, to reduce the carrier capture effect between the active layer 4 and gate insulation layer 3.
Array base-plate structure shown in Fig. 8 is only a kind of form in array base palte provided by the present invention;The present invention's Protection domain is not limited to this.Such as array base palte provided by the present invention can also be based on IPS (plane in conversion) type or The array base palte of ADS (advanced super dimension switch) type dot structure.
Further, a kind of display device is additionally provided in embodiments of the present invention, which includes above-mentioned array Substrate.
Above-mentioned display device can be liquid crystal display device or other kinds of display device.Wherein, liquid crystal display fills It can be liquid crystal panel, LCD TV, mobile phone, liquid crystal display etc. to put, it is included in color membrane substrates and above-described embodiment Array base palte.Above-mentioned other types display device, such as Electronic Paper, it does not include color membrane substrates, but including above-described embodiment In array base palte.
By including institute in above-described embodiment in the array base palte provided in the embodiment of the present invention and display device The thin film transistor (TFT) of offer, therefore array base palte in the present embodiment and display device are also provided simultaneously with above-mentioned thin film transistor (TFT) institute The beneficial effect brought;That is, the generation of leakage current can be effectively reduced, reduces threshold voltage, increases ON state current, reduces work( Consumption.
The above description is merely a specific embodiment, but protection scope of the present invention is not limited thereto, any Those familiar with the art the invention discloses technical scope in, the change or replacement that can readily occur in, all should It is included within the scope of the present invention.Therefore, protection scope of the present invention should be subject to scope of the claims.

Claims (10)

1. a kind of thin film transistor (TFT), including grid, gate insulation layer, active layer and the source-drain electrode layer being formed on substrate, described Source-drain electrode layer includes source electrode and the drain electrode of the thin film transistor (TFT);It is characterized in that, the active layer uses metal oxide Semiconductor, is equipped with metal layer between the active layer and the gate insulation layer, with reduce the active layer and gate insulation layer it Between carrier capture effect;
Wherein, formed with one layer of metal-oxide film at the contact surface between the active layer and metal layer.
2. thin film transistor (TFT) according to claim 1, it is characterised in that the metal layer is completely covered in the active layer.
3. thin film transistor (TFT) according to claim 1 or 2, it is characterised in that the material of the metal layer uses Titanium.
4. thin film transistor (TFT) according to claim 3, it is characterised in that the shape between the metal layer and the active layer Into there is thin film of titanium oxide.
5. a kind of method for fabricating thin film transistor, is included on substrate and forms grid, gate insulation layer, active layer and source-drain electrode layer Process;Wherein, the source-drain electrode layer includes source electrode and the drain electrode of the thin film transistor (TFT);It is it is characterized in that, described active Layer uses metal-oxide semiconductor (MOS);Moreover,
Between form the gate insulation layer the step of and the step of forming the active layer, this method further includes:Formed between Metal layer between the gate insulation layer and the active layer;
Wherein, formed with one layer of metal-oxide film at the contact surface between the active layer and metal layer.
6. method for fabricating thin film transistor according to claim 5, it is characterised in that
The process of metal layer of the formation between the gate insulation layer and the active layer includes:In the gate insulation layer Disposed thereon metallic film, and form the metal layer between the gate insulation layer and the active layer by patterning processes;
The process for forming active layer includes:In Ar/O2Under atmosphere, in the metal layer deposition oxide semiconductor film Film, and pass through the pattern of patterning processes formation active layer;The metal layer is completely covered in the active layer.
7. the method for fabricating thin film transistor according to claim 5 or 6, it is characterised in that formed the active layer it Afterwards, this method further includes:
In Ar/O2Under atmosphere, the active layer is made annealing treatment.
8. method for fabricating thin film transistor according to claim 7, it is characterised in that the material selection gold of the metal layer Belong to titanium;Moreover,
After the annealing process, the titanium coating at the contact surface of the active layer and the metal layer is partially oxidized to form oxidation Titanium film.
9. a kind of array base palte, including Claims 1-4 any one of them thin film transistor (TFT).
10. a kind of display device, including the array base palte described in claim 9.
CN201210133357.8A 2012-04-28 2012-04-28 Thin film transistor (TFT) and its manufacture method, array base palte and display device Active CN102709326B (en)

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PCT/CN2012/085212 WO2013159513A1 (en) 2012-04-28 2012-11-23 Thin film transistor, and manufacturing method, array substrate and display device thereof

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