CN102709326A - Thin film transistor and manufacturing method thereof as well as array substrate and display device - Google Patents
Thin film transistor and manufacturing method thereof as well as array substrate and display device Download PDFInfo
- Publication number
- CN102709326A CN102709326A CN 201210133357 CN201210133357A CN102709326A CN 102709326 A CN102709326 A CN 102709326A CN 201210133357 CN201210133357 CN 201210133357 CN 201210133357 A CN201210133357 A CN 201210133357A CN 102709326 A CN102709326 A CN 102709326A
- Authority
- CN
- China
- Prior art keywords
- active layer
- film transistor
- layer
- metal level
- thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 73
- 239000000758 substrate Substances 0.000 title claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 title abstract description 12
- 229910052751 metal Inorganic materials 0.000 claims abstract description 63
- 239000002184 metal Substances 0.000 claims abstract description 63
- 239000004065 semiconductor Substances 0.000 claims abstract description 18
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 16
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 16
- 230000000694 effects Effects 0.000 claims abstract description 14
- 238000005516 engineering process Methods 0.000 claims abstract description 10
- 238000009413 insulation Methods 0.000 claims description 46
- 238000000034 method Methods 0.000 claims description 37
- 230000008569 process Effects 0.000 claims description 22
- 239000010936 titanium Substances 0.000 claims description 14
- 239000010408 film Substances 0.000 claims description 12
- 238000000137 annealing Methods 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 7
- 239000000203 mixture Substances 0.000 claims description 7
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 5
- 229910052719 titanium Inorganic materials 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 3
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 2
- 238000007254 oxidation reaction Methods 0.000 claims description 2
- 239000011248 coating agent Substances 0.000 claims 1
- 238000000576 coating method Methods 0.000 claims 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 11
- 229910052760 oxygen Inorganic materials 0.000 description 11
- 239000001301 oxygen Substances 0.000 description 11
- 125000004430 oxygen atom Chemical group O* 0.000 description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 238000013459 approach Methods 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 5
- 239000002800 charge carrier Substances 0.000 description 5
- 239000004973 liquid crystal related substance Substances 0.000 description 5
- 238000002161 passivation Methods 0.000 description 5
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 229910003087 TiOx Inorganic materials 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- HLLICFJUWSZHRJ-UHFFFAOYSA-N tioxidazole Chemical compound CCCOC1=CC=C2N=C(NC(=O)OC)SC2=C1 HLLICFJUWSZHRJ-UHFFFAOYSA-N 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000011787 zinc oxide Substances 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78609—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing leakage current
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
- H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
Abstract
The invention discloses a thin film transistor and a manufacturing method thereof as well as an array substrate and a display device and relates to the field of a display technology, aiming at reducing the current leakage of the thin film transistor and improving the stability of the TFT (Thin Film Transistor). The thin film transistor comprises a grid electrode, a grid insulating layer, an active layer and a source leakage electrode layer which are formed on the substrate; the source leakage electrode layer comprises the source electrode and the drain electrode of the thin film transistor; the active layer adopts a metal oxide semiconductor; and a metal layer is arranged between the active layer and the grid insulating layer so as to reduce a current carrier capturing effect between the active layer and the grid insulating layer. The scheme disclosed by the embodiment of the invention is applicable to any display equipment which is driven by utilizing the thin film transistor.
Description
Technical field
The present invention relates to the Display Technique field, relate in particular to a kind of thin-film transistor and manufacturing approach thereof, array base palte and display unit.
Background technology
(Thin Film Transistor-Liquid CrystalDisplay TFT-LCD) mainly is divided into AMLCD (AM-LCD) and passive matrix liquid crystal display (PM-LCD) to more common Thin Film Transistor-LCD at present.Wherein, the active layer of AMLCD mainly is made up of amorphous silicon (a-Si) or polysilicon (p-Si).
For a-Si TFT, weak point is that lower mobility and stable temperature influence is bigger; For p-Si TFT, weak point is distribute different of homogeneity difference and the polycrystalline crystal boundary of deposit film and display performance difference that cause is big.Owing to above-mentionedly restricting the development of liquid crystal display, can not satisfy current needs gradually always with the existing defective of silica-based thin-film transistor as active layer.
Wherein, Replace silica-based active layer with a-IGZO metal-oxide semiconductor (MOS)s such as (amorphous-indium gallium zinc oxide) as thin-film transistor; Design changes lessly because it is to original structure of TFT, and the corresponding technological process of all the other structures do not change basically, so scrap build is simple relatively; Of paramount importance, be significantly improved based on the thin-film transistor performance of metal-oxide semiconductor (MOS)s such as a-IGZO, caused the concern that shows the field, replace the silica-base film transistor and become follow-on mainstream technology.
Yet,, perhaps forming in the process of etching barrier layer SiO2 when water that touches external environment and the oxygen based on the thin-film transistor of metal-oxide semiconductor (MOS)s such as a-IGZO in deposition, oxygen atom can pass through a-IGZO TFT active layer and penetrate into gate insulation layer; Simultaneously in working order the time; The irradiate light of backlight can activate external environment and produces the shallow energy level defect state when the array base palte, in the effect of generation carrier capture at the interface of active layer and gate insulation layer; And then cause relatively large leakage current, influenced TFT stability.
Summary of the invention
Embodiments of the invention provide a kind of thin-film transistor and manufacturing approach, array base palte and display unit, in order to reduce the leakage current of thin-film transistor, improve TFT stability.
For achieving the above object, embodiments of the invention adopt following technical scheme:
A kind of thin-film transistor comprises the grid, gate insulation layer, active layer and the source-drain electrode layer that are formed on the substrate, and said source-drain electrode layer comprises the source electrode and the drain electrode of said thin-film transistor; Wherein, said active layer adopts metal-oxide semiconductor (MOS), between said active layer and said gate insulation layer, is provided with metal level, to reduce the carrier capture effect between said active layer and the gate insulation layer.
A kind of method for fabricating thin film transistor is included in the process that forms grid, gate insulation layer, active layer and source-drain electrode layer on the substrate; Wherein, said source-drain electrode layer comprises the source electrode and the drain electrode of said thin-film transistor; Said active layer adopts metal-oxide semiconductor (MOS); And,
In the step that forms said gate insulation layer with form between the step of said active layer, also comprise: form the metal level between said gate insulation layer and said active layer.
A kind of array base palte comprises above-mentioned thin-film transistor.
A kind of display unit comprises above-mentioned array base palte.
Thin-film transistor that the embodiment of the invention provides and manufacturing approach thereof, array base palte and display unit; Through between the active layer of oxide thin film transistor and gate insulation layer, metal level being set, thereby formed contact-making surface and the contact-making surface between metal level and the gate insulation layer between active layer and the metal level; And the contact-making surface place between said metal level and gate insulation layer can provide a large amount of charge carriers by said metal level, the carrier capture effect at effective offset gate interfacial dielectric layer place, so carrier capture effect at the interface can be ignored; Compare with existing oxide thin film transistor, the thin-film transistor that provides in this programme can effectively reduce the leakage current of thin-film transistor, improves TFT stability.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art; The accompanying drawing of required use is done to introduce simply in will describing embodiment below; Obviously, the accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the structural representation of the thin-film transistor that provides in the embodiment of the invention;
Fig. 2 is the position view one of the metal level 7 among Fig. 1;
Fig. 3 is the position view two of the metal level 7 among Fig. 1;
The schematic flow sheet of the thin-film transistor manufacture method that Fig. 4～Fig. 7 provides for the embodiment of the invention;
The structural representation of a kind of array base palte that Fig. 8 provides for the embodiment of the invention;
Reference numeral: 1-substrate; The 2-grid; The 3-gate insulation layer; The 4-active layer; The 5-source electrode; The 6-drain electrode; The 7-metal level; The 8-etching barrier layer; The 9-passivation layer; The 10-pixel electrode.
Embodiment
To combine the accompanying drawing in the embodiment of the invention below, the technical scheme in the embodiment of the invention is carried out clear, intactly description, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the present invention's protection.
Below in conjunction with accompanying drawing thin-film transistor and manufacturing approach, array base palte and the display unit that the embodiment of the invention provides is described in detail.
Thin-film transistor as shown in Figure 1, that the embodiment of the invention provides comprises the grid 2, gate insulation layer 3, active layer 4 and the source-drain electrode layer that are formed on the substrate 1, and this source-drain electrode layer comprises the source electrode 5 and drain electrode 6 of thin-film transistor; Wherein, said active layer 4 adopts metal-oxide semiconductor (MOS), and between active layer 4 and gate insulation layer 3, is provided with metal level 7, to reduce the carrier capture effect between said active layer 4 and the gate insulation layer 3.
In thin-film transistor shown in Figure 1, the metal-oxide semiconductor (MOS) that active layer 4 is adopted can be but be not limited to be indium gallium zinc oxide a-IGZO; So long as possess the making that the transparent oxide film of good characteristic of semiconductor all can be used for active layer.
In Fig. 1 and follow-up embodiment, all be to be that example is introduced thin-film transistor structure provided by the present invention with bottom gate type TFT; For top gate type TFT, those skilled in the art can carry out modification according to thought of the present invention and obtain, and repeat no more here.But need to prove that the top gate type TFT that improves thought based on the present invention equally also should belong within protection scope of the present invention.
Preferably, the material of above-mentioned metal level 7 can be selected Titanium Ti for use; Like this; Contact-making surface place between metal Ti and gate insulation layer 3 can be provided a large amount of charge carriers by the Ti in the metal level 7, effectively the carrier capture effect at offset gate interfacial dielectric layer place; So carrier capture effect at the interface can be ignored; And then the threshold voltage of reduction TFT, increase ON state current, reduced power consumption simultaneously.
Further, also be formed with contact-making surface between above-mentioned metal level 7 and the active layer 4; Because active layer 4 has adopted metal-oxide semiconductor (MOS), be example with a-IGZO, and the oxygen atom in the a-IGZO material is adsorbed by metal Ti easily, therefore between metal Ti and active layer 4, can form one deck titanium oxide TiOx film (as shown in Figure 2).This TiOx film can stop that the oxygen atom in the a-IGZO active layer further penetrates into gate insulation layer, and has avoided causing gate insulation layer to produce the oxygen defect attitude V [O] of shallow energy level, therefore can reduce the generation of thin-film transistor work leakage current equally effectively.
Certainly, above-mentioned metal level 7 can also be selected other metals for use, such as metallic aluminium Al; Likewise; On the contact-making surface of metal A l and grid metal level; Al can provide the charge carrier of capacity with compensation carrier capture effect, and on the contact-making surface of metal A l and active layer, the Al2O3 of the oxidized formation of Al can stop the oxygen atom among the a-IGZO to spread to gate insulation layer simultaneously; Thereby reduce the work leakage current of TFT, promote TFT stability.
In the present embodiment, active layer 4 is to cover metal level 7 fully.Concrete, can be with reference to Fig. 2 and two kinds of structures shown in Figure 3.Can see that from Fig. 2 active layer 4 is coated on the top of metal level 7, directly contact and cause TFT to lose efficacy with source electrode 5, drain electrode 6 to avoid metal level 7; In addition, also can metal level 7 be embedded in gate insulation layer 3, form structure shown in Figure 3.So long as between active layer 4 and gate insulation layer 3, metal level is set, all should belong within protection scope of the present invention in order to the structure that reduces TFT work leakage current.
In addition, in the thin-film transistor that present embodiment provides, above said active layer, also be provided with etching barrier layer (Etch Stop Layer, ESL) 8.
The thin-film transistor that provides in the embodiment of the invention through between the active layer of oxide thin film transistor and gate insulation layer, metal level being set, thereby has formed contact-making surface and the contact-making surface between metal level and the gate insulation layer between active layer and the metal level.Contact-making surface place between said metal level and gate insulation layer; Can a large amount of charge carriers be provided by said metal level; The carrier capture effect at effective offset gate interfacial dielectric layer place; Therefore at the interface carrier capture effect can be ignored, and can increase ON state current effectively, reduces the power consumption of thin-film transistor; Simultaneously; Contact-making surface place between said active layer and metal level; Metal level adsorbs the oxygen atom in the said active layer and forms the layer of metal sull; Stop that the oxygen atom in the active layer further penetrates into gate insulation layer, avoided the oxygen atom in the gate insulation layer deep energy level transition to take place, can reduce the work leakage current of TFT equally because of illumination.
Compare with existing oxide thin film transistor, the thin-film transistor that provides in this programme has effectively reduced the generation of leakage current, has reduced threshold voltage, has increased ON state current, has reduced power consumption; Compare with the existing thin-film transistor that possesses individual layer a-IGZO active layer, the thin-film transistor in the present embodiment has promoted TFT stability greatly.
Corresponding to above-mentioned thin-film transistor, the embodiment of the invention also provides a kind of method of manufacturing thin film transistor, is included in the process that forms grid, gate insulation layer, active layer and source-drain electrode layer on the substrate successively; Said source-drain electrode layer comprises the source electrode and the drain electrode of said thin-film transistor; Wherein, said active layer adopts metal-oxide semiconductor (MOS); And,
After forming said gate insulation layer and before forming said active layer, also comprise: at the metal level that forms above the said gate insulation layer between said gate insulation layer and said active layer.
Down in the face of above-mentioned method for fabricating thin film transistor further explain.In follow-up description, be example still with bottom gate type TFT, specifically can be with reference to Fig. 4 to shown in Figure 7.
Method for fabricating thin film transistor in the present embodiment specifically may further comprise the steps:
S1, on substrate 1 deposition grid metallic film, and form grid line (not shown) and grid 2 through composition technology, as shown in Figure 4;
Wherein, substrate 1 can be but be not limited to be the underlay substrate that glass substrate, quartz base plate are perhaps formed by organic material.
S2, on the substrate that is formed with grid line and grid 2 deposition gate insulation layer 3, as shown in Figure 5;
S3, on gate insulation layer 3 deposition layer of metal film, metal Ti for example, and form the pattern of metal level 7 through composition technology, as shown in Figure 6, metal level 7 can be folded between gate insulation layer 3 and the active layer 4;
S4, under the Ar/O2 atmosphere, deposition oxide semiconductive thin film above metal level 7 such as a-IGZO, and forms the pattern of active layer 4 through composition technology;
Wherein, active layer 4 covers said metal level 7 fully.As shown in Figure 7, active layer 4 can be the top that is coated on said metal level 7, makes the both sides of metal level 7 can not cause TFT to lose efficacy owing to joining with source electrode, the drain electrode of thin-film transistor.
Wherein, form the pattern of active layer 4, be specially through composition technology: above said oxide semiconductor thin-film, apply photoresist, and make public, developing process, afterwards through the wet pattern that forms active layer 4 on the oxide semiconductor layer that is engraved in.
In addition, after completing steps S4, etching barrier layer 8 can also above active layer 4, be formed, in order in follow-up technical process, active layer 4 is protected.
S5, under the oxygen atmosphere, said active layer 4 is carried out annealing in process;
Under the Ar/O2 atmosphere, the oxygen atom in the metal oxides such as a-IGZO in the active layer 4 is towards the lower zone diffusion of oxygen content, i.e. diffusion in metal level 7.
In the present embodiment; Said metal level 7 can adopt metal Ti; Because Ti adsorbs the oxygen atom in the active layer easily, therefore after annealing in process, the titanium at the contact-making surface place of active layer 4 and metal level 7 just is easy to form one deck TiOx sull by partial oxidation.
Particularly, in the annealing in process process, metal-oxide films such as the a-IGZO in the active layer can receive Influence of Temperature, and valence link activates and produces certain oxygen and overflow; Because annealing in process is under the oxygen atmosphere, to carry out, extraneous oxygen concentration is greater than the oxygen concentration of active layer, and the oxygen that has part spreads to active layer.Aforementioned two processes exist when annealing in process simultaneously, through the control oxygen-supply quantity, can regulate the effusion of oxygen and the equilibrium state that diffuses into.Therefore, above-mentioned annealing in process process, little to the oxygen content influence of the metal oxides such as a-IGZO in the active layer 4.
In addition, the annealing that heats up can make the a-IGZO active layer reduce defect state, makes the interface become level and smooth by coarse, makes the interface contact good.
S6, metallic film is leaked in deposition one deck source above active layer 4, and forms the source electrode 5 and drain electrode 6 of thin-film transistor through composition technology; The final thin-film transistor structure that forms is as shown in Figure 1.
Can accomplish the making of thin-film transistor through above step.
If array base palte is made flow process, then only need on the substrate that has formed above-mentioned thin-film transistor, to continue to form structures such as passivation layer, pixel electrode layer.Because subsequent technique and existing array base palte manufacture craft are similar, repeat no more here.
Though it all is to be example with bottom gate type TFT that said method is described, and to those skilled in the art, can at an easy rate above-mentioned improvement thought be combined with top gate type TFT, and realize the manufacturing process of top gate type TFT through concrete steps.For adopting the present invention to improve the process that thought is made top gate type TFT, repeat no more here; But, the top gate type TFT manufacture method of improving thought based on the present invention should belong within protection scope of the present invention.
Scheme in the embodiment of the invention is passed through semiconductor a-IGZO film; Be designed to a-IGZO film active layer and cover metal level Ti; Thereby form twin-channel active layer, what not only reached oxygen atom in the barrier oxide semiconductor active layer passes through the entering gate insulator, reduces the work leakage current; Simultaneously effectively provide a large amount of charge carriers to compensate interfacial dielectric layer carrier capture effect, thereby solved the technical problem of oxide bulk transistor drain current than big and poor stability.
In addition, a kind of array base palte is provided also in embodiments of the present invention, this array base palte comprises the thin-film transistor described in the foregoing description.
A kind of array base-plate structure for providing in the embodiment of the invention shown in Figure 8; It comprises substrate 1; And being formed on grid 2, gate insulation layer 3, active layer 4 and the source-drain electrode layer on the substrate 1 successively, this source-drain electrode layer comprises the source electrode 5 and drain electrode 6 of thin-film transistor; Above said gate insulation layer 3 and source-drain electrode layer, also be formed with passivation layer 9, and above passivation layer 9, also be formed with pixel electrode 10, this pixel electrode 10 is electrically connected with said drain electrode 6 through passivation layer via hole;
Wherein, said active layer 4 adopts metal-oxide semiconductor (MOS), and between active layer 4 and gate insulation layer 3, is provided with metal level 7, to reduce the carrier capture effect between said active layer 4 and the gate insulation layer 3.
Array base-plate structure shown in Figure 8 only is a kind of form in the array base palte provided by the present invention; Protection scope of the present invention is not limited to this.Such as, array base palte provided by the present invention can also be based on the array base palte of IPS (plane internal conversion) type or ADS (senior ultra Wei Chang conversion) type dot structure.
Further, a kind of display unit is provided also in embodiments of the present invention, this display unit comprises above-mentioned array base palte.
Above-mentioned display unit can be the display unit of liquid crystal indicator or other types.Wherein, liquid crystal indicator can be liquid crystal panel, LCD TV, mobile phone, LCD etc., and it comprises the array base palte in color membrane substrates and the foregoing description.Above-mentioned other types display unit, such as Electronic Paper, it does not comprise color membrane substrates, but comprises the array base palte in the foregoing description.
Because the thin-film transistor that all includes in the foregoing description in array base palte that is provided in the embodiment of the invention and the display unit to be provided, so the array base palte in the present embodiment and the display unit beneficial effect that also possesses above-mentioned thin-film transistor simultaneously and brought; That is, can effectively reduce the generation of leakage current, reduce threshold voltage, increase ON state current, reduce power consumption.
The above; Be merely embodiment of the present invention, but protection scope of the present invention is not limited thereto, any technical staff who is familiar with the present technique field is in the technical scope that the present invention discloses; The variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claim.
Claims (10)
1. a thin-film transistor comprises the grid, gate insulation layer, active layer and the source-drain electrode layer that are formed on the substrate, and said source-drain electrode layer comprises the source electrode and the drain electrode of said thin-film transistor; It is characterized in that said active layer adopts metal-oxide semiconductor (MOS), between said active layer and said gate insulation layer, is provided with metal level, to reduce the carrier capture effect between said active layer and the gate insulation layer.
2. thin-film transistor according to claim 1 is characterized in that said active layer covers said metal level fully.
3. thin-film transistor according to claim 1 and 2 is characterized in that, the material of said metal level adopts Titanium.
4. thin-film transistor according to claim 3 is characterized in that, between said metal level and said active layer, is formed with thin film of titanium oxide.
5. a method for fabricating thin film transistor is included in the process that forms grid, gate insulation layer, active layer and source-drain electrode layer on the substrate; Wherein, said source-drain electrode layer comprises the source electrode and the drain electrode of said thin-film transistor; It is characterized in that said active layer adopts metal-oxide semiconductor (MOS); And,
In the step that forms said gate insulation layer with form between the step of said active layer, this method also comprises: form the metal level between said gate insulation layer and said active layer.
6. method for fabricating thin film transistor according to claim 5 is characterized in that,
The process of the metal level of said formation between said gate insulation layer and said active layer comprises: depositing metal films above said gate insulation layer, and through the metal level of composition technology formation between said gate insulation layer and said active layer;
The process of said formation active layer comprises: at Ar/O
2Under the atmosphere, deposition oxide semiconductive thin film above said metal level, and pass through the pattern that composition technology forms active layer; Said active layer covers said metal level fully.
7. according to claim 5 or 6 described method for fabricating thin film transistor, it is characterized in that after forming said active layer, this method also comprises:
At Ar/O
2Under the atmosphere, said active layer is carried out annealing in process.
8. method for fabricating thin film transistor according to claim 7 is characterized in that, the material selection Titanium of said metal level; And,
After annealing in process, the titanium coating at the contact-making surface place of said active layer and said metal level is formed thin film of titanium oxide by partial oxidation.
9. an array base palte comprises each described thin-film transistor of claim 1 to 4.
10. a display unit comprises the described array base palte of claim 9.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210133357.8A CN102709326B (en) | 2012-04-28 | 2012-04-28 | Thin film transistor (TFT) and its manufacture method, array base palte and display device |
| PCT/CN2012/085212 WO2013159513A1 (en) | 2012-04-28 | 2012-11-23 | Thin film transistor, and manufacturing method, array substrate and display device thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210133357.8A CN102709326B (en) | 2012-04-28 | 2012-04-28 | Thin film transistor (TFT) and its manufacture method, array base palte and display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102709326A true CN102709326A (en) | 2012-10-03 |
| CN102709326B CN102709326B (en) | 2018-04-17 |
Family
ID=46901973
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210133357.8A Active CN102709326B (en) | 2012-04-28 | 2012-04-28 | Thin film transistor (TFT) and its manufacture method, array base palte and display device |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN102709326B (en) |
| WO (1) | WO2013159513A1 (en) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102945807A (en) * | 2012-11-15 | 2013-02-27 | 京东方科技集团股份有限公司 | TFT (Thin Film Transistor) and preparation method thereof |
| WO2013159513A1 (en) * | 2012-04-28 | 2013-10-31 | 北京京东方光电科技有限公司 | Thin film transistor, and manufacturing method, array substrate and display device thereof |
| CN103545378A (en) * | 2013-11-05 | 2014-01-29 | 京东方科技集团股份有限公司 | Oxide thin film transistor, manufacturing method thereof, array substrate and display device |
| CN103904125A (en) * | 2012-12-26 | 2014-07-02 | 鸿富锦精密工业（深圳）有限公司 | Thin-film transistor |
| CN104779299A (en) * | 2015-04-16 | 2015-07-15 | 京东方科技集团股份有限公司 | Metal oxide thin film transistor, preparation method of transistor, display substrate and display device |
| CN106298961A (en) * | 2016-11-11 | 2017-01-04 | 河南大学 | Thin film transistor (TFT) and preparation method thereof |
| CN107799605A (en) * | 2017-10-27 | 2018-03-13 | 合肥鑫晟光电科技有限公司 | A kind of thin film transistor (TFT) and preparation method thereof, array base palte, display device |
| CN109192704A (en) * | 2018-09-05 | 2019-01-11 | 京东方科技集团股份有限公司 | Array substrate and its manufacturing method, display device |
| WO2020211118A1 (en) * | 2019-04-18 | 2020-10-22 | 武汉华星光电半导体显示技术有限公司 | Array substrate and fabricating method therefor, and display panel |
| WO2023240715A1 (en) * | 2022-06-15 | 2023-12-21 | 武汉华星光电半导体显示技术有限公司 | Display panel, display apparatus, and manufacturing method |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5339825B2 (en) * | 2008-09-09 | 2013-11-13 | 富士フイルム株式会社 | Thin film field effect transistor and display device using the same |
| TWI567829B (en) * | 2008-10-31 | 2017-01-21 | 半導體能源研究所股份有限公司 | Semiconductor device and method for manufacturing the same |
| US8436350B2 (en) * | 2009-01-30 | 2013-05-07 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device using an oxide semiconductor with a plurality of metal clusters |
| JP4752925B2 (en) * | 2009-02-04 | 2011-08-17 | ソニー株式会社 | Thin film transistor and display device |
| CN102709326B (en) * | 2012-04-28 | 2018-04-17 | 北京京东方光电科技有限公司 | Thin film transistor (TFT) and its manufacture method, array base palte and display device |
-
2012
- 2012-04-28 CN CN201210133357.8A patent/CN102709326B/en active Active
- 2012-11-23 WO PCT/CN2012/085212 patent/WO2013159513A1/en active Application Filing
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013159513A1 (en) * | 2012-04-28 | 2013-10-31 | 北京京东方光电科技有限公司 | Thin film transistor, and manufacturing method, array substrate and display device thereof |
| CN102945807B (en) * | 2012-11-15 | 2015-11-25 | 京东方科技集团股份有限公司 | A kind of preparation method of thin-film transistor and thin-film transistor |
| US9620606B2 (en) | 2012-11-15 | 2017-04-11 | Boe Technology Group Co., Ltd. | Method for manufacturing thin film transistor, and thin film transistor thereof |
| CN102945807A (en) * | 2012-11-15 | 2013-02-27 | 京东方科技集团股份有限公司 | TFT (Thin Film Transistor) and preparation method thereof |
| CN103904125A (en) * | 2012-12-26 | 2014-07-02 | 鸿富锦精密工业（深圳）有限公司 | Thin-film transistor |
| US9520422B2 (en) | 2013-11-05 | 2016-12-13 | Boe Technology Group Co., Ltd. | Oxide thin film transistor and manufacturing method thereof, array substrate and display device |
| CN103545378B (en) * | 2013-11-05 | 2016-09-07 | 京东方科技集团股份有限公司 | Oxide thin film transistor and preparation method thereof, array base palte, display device |
| WO2015067148A1 (en) * | 2013-11-05 | 2015-05-14 | 京东方科技集团股份有限公司 | Oxide thin film transistor and manufacturing method therefor, array substrate, display device |
| CN103545378A (en) * | 2013-11-05 | 2014-01-29 | 京东方科技集团股份有限公司 | Oxide thin film transistor, manufacturing method thereof, array substrate and display device |
| CN104779299A (en) * | 2015-04-16 | 2015-07-15 | 京东方科技集团股份有限公司 | Metal oxide thin film transistor, preparation method of transistor, display substrate and display device |
| US10199395B2 (en) | 2015-04-16 | 2019-02-05 | Boe Technology Group Co., Ltd. | Metal oxide thin film transistor and manufacturing method thereof, display substrate and display device |
| CN106298961A (en) * | 2016-11-11 | 2017-01-04 | 河南大学 | Thin film transistor (TFT) and preparation method thereof |
| CN107799605A (en) * | 2017-10-27 | 2018-03-13 | 合肥鑫晟光电科技有限公司 | A kind of thin film transistor (TFT) and preparation method thereof, array base palte, display device |
| US10615051B2 (en) | 2017-10-27 | 2020-04-07 | Boe Technology Group Co., Ltd. | Thin-film transistor and method of manufacturing the same, array substrate, and display apparatus |
| CN107799605B (en) * | 2017-10-27 | 2020-07-31 | 合肥鑫晟光电科技有限公司 | Thin film transistor, preparation method thereof, array substrate and display device |
| CN109192704A (en) * | 2018-09-05 | 2019-01-11 | 京东方科技集团股份有限公司 | Array substrate and its manufacturing method, display device |
| WO2020211118A1 (en) * | 2019-04-18 | 2020-10-22 | 武汉华星光电半导体显示技术有限公司 | Array substrate and fabricating method therefor, and display panel |
| WO2023240715A1 (en) * | 2022-06-15 | 2023-12-21 | 武汉华星光电半导体显示技术有限公司 | Display panel, display apparatus, and manufacturing method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102709326B (en) | 2018-04-17 |
| WO2013159513A1 (en) | 2013-10-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102709326A (en) | Thin film transistor and manufacturing method thereof as well as array substrate and display device | |
| CN103268878B (en) | The manufacture method of tft array substrate, tft array substrate and display unit | |
| CN105489552B (en) | The production method of LTPS array substrates | |
| US10304860B2 (en) | Array substrate and method of forming the same | |
| CN102955312B (en) | Array substrate and manufacture method thereof and display device | |
| US9070605B2 (en) | Display apparatus and method of manufacturing the display apparatus | |
| CN103311310A (en) | Thin film transistor, preparation method for same and array substrate | |
| KR20190086587A (en) | Method of making oxide thin film transistor array, and device incorporating the same | |
| CN107425044B (en) | Flexible display panel, manufacturing method thereof and display device | |
| CN103227147A (en) | TFT-LCD (Thin-film transistor liquid crystal display) array base plate, manufacturing method and LCD | |
| CN105161503A (en) | Amorphous silicon semiconductor thin film transistor (TFT) backboard structure | |
| CN103765597A (en) | TFT (Thin Film Transistor), manufacturing method thereof, array substrate, display device and barrier layer | |
| CN102956713A (en) | Thin film transistor, manufacturing method thereof, array substrate and display device | |
| CN104091831A (en) | Thin film transistor, array substrate and display device | |
| US10121883B2 (en) | Manufacturing method of top gate thin-film transistor | |
| CN203480182U (en) | Array substrate and display device | |
| CN107799466A (en) | TFT substrate and preparation method thereof | |
| CN101644862A (en) | Display device and manufacturing method thereof | |
| CN104505372A (en) | Manufacturing method of metal oxide thin film transistor array substrate | |
| CN105870132A (en) | TFT (thin film transistor) array substrate and manufacturing method therefor | |
| CN104319261B (en) | A kind of preparation method of array base palte, array base palte and display device | |
| CN102723365A (en) | TFT (Thin Film Transistor), manufacturing method thereof, array substrate and display device | |
| CN102956715A (en) | TFT (Thin Film Transistor), manufacturing method thereof, array substrate and display device | |
| CN103779421A (en) | Thin film transistor structure and manufacturing method thereof | |
| CN103022083A (en) | Array substrate, display device and preparing method of array substrate |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |