WO2020211118A1 - Array substrate and fabricating method therefor, and display panel - Google Patents

Array substrate and fabricating method therefor, and display panel Download PDF

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Publication number
WO2020211118A1
WO2020211118A1 PCT/CN2019/084883 CN2019084883W WO2020211118A1 WO 2020211118 A1 WO2020211118 A1 WO 2020211118A1 CN 2019084883 W CN2019084883 W CN 2019084883W WO 2020211118 A1 WO2020211118 A1 WO 2020211118A1
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array substrate
ti3o5
crystal material
active layer
sides
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PCT/CN2019/084883
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French (fr)
Chinese (zh)
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柴国庆
陈思
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武汉华星光电半导体显示技术有限公司
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Publication of WO2020211118A1 publication Critical patent/WO2020211118A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1229—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with different crystal properties within a device or between different devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
    • H01L27/1285—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs

Definitions

  • the invention relates to the field of display technology, in particular to an array substrate, a preparation method thereof, and a display panel.
  • Organic Light-Emitting Display Device (Full English Name: Organic Light-Emitting Diode, OLED for short) is also known as organic electro-laser display device and organic light-emitting semiconductor.
  • the basic structure of OLED is a thin, transparent, semiconductor-like indium tin oxide (ITO) connected to the positive electrode of electricity, plus another metal cathode, wrapped in a sandwich structure.
  • the entire structure layer includes: hole transport layer (HTL), light emitting layer (EL) and electron transport layer (ETL).
  • the positive electrode holes and the negative electrode charges When the power is supplied to an appropriate voltage, the positive electrode holes and the negative electrode charges will combine in the light-emitting layer, and under the action of the Coulomb force, they will recombine with a certain probability to form excitons (electron-hole pairs) in an excited state, and this excitation
  • the state is unstable in the normal environment.
  • the excitons in the excited state recombine and transfer energy to the luminescent material, making it transition from the ground state energy level to the excited state.
  • the excited state energy generates photons through the radiation relaxation process, releasing light energy .
  • To produce light according to its different formulations to produce red, green and blue RGB three primary colors, constitute the basic color.
  • OLED the characteristic of OLED is that it emits light by itself, unlike thin film transistor liquid crystal display devices (Thin film transistor-liquid crystal display, abbreviated as TFT-LCD), which requires backlight, so both visibility and brightness are high.
  • TFT-LCD thin film transistor liquid crystal display
  • OLED has the advantages of low voltage demand, high power saving efficiency, fast response, light weight, thin thickness, simple structure, low cost, wide viewing angle, almost infinitely high contrast, low power consumption, and extremely high response speed. It has become One of today's most important display technologies is gradually replacing TFT-LCD and is expected to become the next-generation mainstream display technology after LCD.
  • the active layer in the array substrate of the OLED display device is usually made of Poly-Si.
  • the preparation method of the active layer is to deposit A-Si by PECVD, then crystallize it by methods such as ELA, and finally by P+ doping to meet its technical requirements.
  • PECVD PECVD
  • ELA electrospray vapor deposition
  • P+ doping P+ doping
  • An object of the present invention is to provide an array substrate, a preparation method thereof, and a display panel, which can solve the high technical requirements for the production of Poly-Si materials in the current array substrate, complex procedures, and high film-forming temperature of P-Si materials , Susceptible to visible light, produce photocurrent, affect the off-state current of the TFT switch, and affect the picture quality and other issues.
  • an embodiment of the present invention provides an array substrate, which includes a substrate and an active layer disposed on the substrate, wherein the material used for the active layer includes ⁇ -Ti3O5 crystal material.
  • the active layer includes: a main body and two sides.
  • the material used in the main body includes ⁇ -Ti3O5 crystal material; the material used in the two sides includes ⁇ -Ti3O5 crystal material.
  • Another embodiment of the present invention provides a method for preparing the array substrate of the present invention, which includes:
  • Step S1 providing a substrate, and forming a layer of ⁇ -Ti3O5 crystal material on the substrate;
  • Step S2 annealing the ⁇ -Ti3O5 crystal material to form the active layer.
  • a layer of ⁇ -Ti3O5 crystal material is formed on the substrate by evaporation.
  • the annealing includes one or more of laser annealing and low temperature annealing.
  • the temperature range of the low-temperature annealing is 100-300°C.
  • the method for preparing the array substrate further includes: step S3, defining the active layer formed in step S2 to define a main body and two sides, irradiating the two sides with laser, and removing the material on both sides from ⁇ -Ti3O5 crystal material is converted to ⁇ -Ti3O5 crystal material.
  • the wavelength range of the laser light irradiated by the laser light is 500-550 nm.
  • the preparation method of the array substrate further includes: step S3, defining the active layer formed in step S2 to define a main body and two sides, and etching the two sides by dry etching to remove the ⁇ -Ti3O5 crystalline material, and then vapor-deposit ⁇ -Ti3O5 crystalline material at the positions of the two sides by vapor deposition.
  • Another embodiment of the present invention provides a display panel including the above-mentioned array substrate.
  • the present invention relates to an array substrate, a preparation method thereof, and a display panel.
  • the present invention uses ⁇ -Ti3O5 crystal material instead of Poly-Si material to prepare the active layer in the array substrate, avoiding the high film forming temperature of P-Si material, It is susceptible to visible light to generate photocurrent, which affects the off-state current of the TFT switch, thereby affecting picture quality and other issues;
  • the present invention also uses dry etching or laser irradiation to remove the two sides of the active layer.
  • the material is converted from ⁇ -Ti3O5 crystal material to ⁇ -Ti3O5 crystal material, thereby increasing the mobility, reducing the photosensitive current, and improving its electrical performance.
  • FIG. 1 is a schematic diagram of the structure of the array substrate of the present invention.
  • Fig. 2 is an XRD pattern of the ⁇ -Ti3O5 crystal material used in the array substrate of the present invention.
  • Fig. 3 is an XRD pattern of ⁇ -Ti3O5 crystal material used in the array substrate of the present invention.
  • Fig. 4 is a diagram of the preparation steps of the array substrate of the present invention.
  • the first buffer layer 3.
  • the second buffer layer 4.
  • the active layer 5.
  • the first gate layer 7.
  • the second gate layer 9.
  • the first source drain 15. The second source and drain
  • the component can be directly placed on the other component; there may also be an intermediate component on which the component is placed , And the intermediate component is placed on another component.
  • a component is described as “installed to” or “connected to” another component, both can be understood as directly “installed” or “connected”, or a component is “installed to” or “connected to” through an intermediate component Another component.
  • this embodiment provides an array substrate 100.
  • the array substrate 100 includes a substrate and an active layer 4 disposed on the substrate, wherein the substrate includes: a substrate 1, The first buffer layer 2 and the second buffer layer 3.
  • the array substrate 100 further includes: a first gate insulating layer 5, a first gate layer 6, a second gate insulating layer 7, a second gate layer 8, a first interlayer insulating layer 9, and a second layer
  • the inter-insulating layer 10 the passivation layer 11, the first flat layer 12, the second flat layer 13, the pixel definition layer 16 and the isolation pillar 17.
  • the second interlayer insulating layer 10 is further provided with a first source and drain 14, the first source and drain 14 are connected to the active layer 4, and the first flat layer 12 is provided with a second A source drain 15, and the second source drain 15 is connected to the first source drain 14.
  • the first gate insulating layer 5 is mainly used for insulation, preventing the first gate layer 6 from directly contacting the active layer 4 and preventing short circuit.
  • the second gate insulating layer 7 mainly functions as an insulation, preventing the first gate layer 6 from directly contacting the second gate layer 8 and preventing a short circuit.
  • the first interlayer insulating layer 9 and the second interlayer insulating layer 10 mainly prevent short circuits between the first source and drain electrodes 14 and the second gate layer 8 and the first gate layer 6 .
  • the passivation layer 11 is mainly used to prevent water and oxygen corrosion, reduce the aging degree of the array substrate 100, and increase its service life.
  • the material used for the active layer 4 includes ⁇ -Ti3O5 crystal material.
  • the active layer 4 in the array substrate is prepared with ⁇ -Ti3O5 crystal material instead of Poly-Si material to avoid the high film forming temperature of P-Si material, which is easily affected by visible light, generates photocurrent, and affects the off-state current of the TFT switch, thus Affect the picture quality and other issues.
  • the active layer 4 includes a main body 41 and two sides 42.
  • the material used for the main body portion 41 includes a ⁇ -Ti3O5 crystal material; the material used for the two side portions 42 includes a ⁇ -Ti3O5 crystal material.
  • Figures 2 and 3 are XRD patterns of ⁇ -Ti3O5 crystalline material and ⁇ -Ti3O5 crystalline material, respectively.
  • the material used in the two sides 42 is converted from a ⁇ -Ti3O5 crystal material to a ⁇ -Ti3O5 crystal material, which mainly improves the mobility of the active layer 4, reduces the photo-induced current, and improves its electrical performance.
  • another embodiment of the present invention provides a method for preparing the array substrate 100 involved in Example 1, which includes:
  • Step S1 providing a substrate, and forming a layer of ⁇ -Ti3O5 crystal material on the substrate;
  • Step S2 annealing the ⁇ -Ti3O5 crystal material to form the active layer 4.
  • step S3 the active layer 4 formed in step S2 is defined as the main body 41 and the side portions 42, and the material of the side portions 42 is converted from ⁇ -Ti3O5 crystal material to ⁇ -Ti3O5 crystal material.
  • step S1 a layer of ⁇ -Ti3O5 crystal material can be formed on the substrate by evaporation, and in step S2, one or more of laser annealing and low temperature annealing can be used to treat the ⁇ -Ti3O5
  • the crystal material is annealed to form the active layer 4.
  • the temperature range of low-temperature annealing is 100-300°C.
  • a laser with a wavelength range of 500-550 nm can be used to irradiate the two sides 42 with laser, so as to convert the material of the two sides 42 from ⁇ -Ti3O5 crystal material to ⁇ -Ti3O5 crystal material.
  • the laser wavelength range of the laser irradiation is 500-550nm.
  • the two sides 42 can also be etched by dry etching to remove the ⁇ -Ti3O5 crystal material, and then the ⁇ -Ti3O5 crystal material can be evaporated at the position of the two sides 42 by evaporation. Finally, the material of the two sides 42 is converted from ⁇ -Ti3O5 crystal material to ⁇ -Ti3O5 crystal material.
  • the present invention also provides a display panel, which includes the above-mentioned array substrate 100.
  • the display panel may be an OLED display panel.

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Abstract

An array substrate (100), a display panel comprising same, and a fabricating method for the array substrate (100). The array substrate (100) comprises a substrate and an active layer (4) provided on the substrate, wherein the material of the active layer (4) comprises λ-Ti3O5 crystal material. First, the λ-Ti3O5 crystal material is used to replace P-Si material to fabricate the active layer (4) in the array substrate (100), so as to avoid problem that the quality of images is affected because the off-state current of a TFT switch is affected by the photocurrent generated because the film formation by P-Si material requires a high temperature and is susceptible to visible light. Furthermore, the material on both side portions (42) of the active layer (4) can be converted from λ-Ti3O5 crystal material to β-Ti3O5 crystal material by means of dry etching or laser irradiation, thereby improving the mobility, reducing the photocurrent, and improving electrical performance.

Description

一种阵列基板及其制备方法、显示面板Array substrate, preparation method thereof, and display panel 技术领域Technical field
本发明涉及显示技术领域，具体涉及一种阵列基板及其制备方法、显示面板。The invention relates to the field of display technology, in particular to an array substrate, a preparation method thereof, and a display panel.
背景技术Background technique
有机发光显示装置(英文全称：Organic Light-Emitting Diode, 简称OLED)又称为有机电激光显示装置、有机发光半导体。OLED的基本结构是由一薄而透明具有半导体特性的铟锡氧化物(ITO)与电力之正极相连，再加上另一个金属阴极，包成如三明治的结构。整个结构层中包括了:空穴传输层(HTL)、发光层(EL)与电子传输层(ETL)。当电力供应至适当电压时，正极空穴与阴极电荷就会在发光层中结合，在库伦力的作用下以一定几率复合形成处于激发态的激子（电子-空穴对），而此激发态在通常的环境中是不稳定的，激发态的激子复合并将能量传递给发光材料，使其从基态能级跃迁为激发态，激发态能量通过辐射驰豫过程产生光子，释放出光能，产生光亮，依其配方不同产生红、绿和蓝RGB三基色，构成基本色彩。Organic Light-Emitting Display Device (Full English Name: Organic Light-Emitting Diode, OLED for short) is also known as organic electro-laser display device and organic light-emitting semiconductor. The basic structure of OLED is a thin, transparent, semiconductor-like indium tin oxide (ITO) connected to the positive electrode of electricity, plus another metal cathode, wrapped in a sandwich structure. The entire structure layer includes: hole transport layer (HTL), light emitting layer (EL) and electron transport layer (ETL). When the power is supplied to an appropriate voltage, the positive electrode holes and the negative electrode charges will combine in the light-emitting layer, and under the action of the Coulomb force, they will recombine with a certain probability to form excitons (electron-hole pairs) in an excited state, and this excitation The state is unstable in the normal environment. The excitons in the excited state recombine and transfer energy to the luminescent material, making it transition from the ground state energy level to the excited state. The excited state energy generates photons through the radiation relaxation process, releasing light energy , To produce light, according to its different formulations to produce red, green and blue RGB three primary colors, constitute the basic color.
首先OLED的特性是自己发光，不像薄膜晶体管液晶显示装置（英文全称：Thin film transistor-liquid crystal display，简称TFT-LCD）需要背光，因此可视度和亮度均高。其次OLED具有电压需求低、省电效率高、反应快、重量轻、厚度薄，构造简单，成本低、广视角、几乎无穷高的对比度、较低耗电、极高反应速度等优点，已经成为当今最重要的显示技术之一，正在逐步替代 TFT-LCD，有望成为继LCD之后的下一代主流显示技术。First of all, the characteristic of OLED is that it emits light by itself, unlike thin film transistor liquid crystal display devices (Thin film transistor-liquid crystal display, abbreviated as TFT-LCD), which requires backlight, so both visibility and brightness are high. Secondly, OLED has the advantages of low voltage demand, high power saving efficiency, fast response, light weight, thin thickness, simple structure, low cost, wide viewing angle, almost infinitely high contrast, low power consumption, and extremely high response speed. It has become One of today's most important display technologies is gradually replacing TFT-LCD and is expected to become the next-generation mainstream display technology after LCD.
技术问题technical problem
目前OLED显示装置的阵列基板中的有源层通常采用Poly –Si制成。具体的，有源层的制备方法为PECVD方式沉积A-Si,然后通过ELA等方法使其晶体化，最后通过P+掺杂以达到其技术要求。由此可见Poly –Si的制作技术要求高、工序复杂、且P-Si成膜温度较高，易受可见光影响，产生光电流，影响TFT开关关态电流大小，从而影响画面质量。因此需要寻求一种新型的有源层已解决上述问题。Currently, the active layer in the array substrate of the OLED display device is usually made of Poly-Si. Specifically, the preparation method of the active layer is to deposit A-Si by PECVD, then crystallize it by methods such as ELA, and finally by P+ doping to meet its technical requirements. It can be seen that Poly-Si has high production technology requirements, complex processes, and high P-Si film formation temperature, which is easily affected by visible light and generates photocurrent, which affects the off-state current of the TFT switch, thereby affecting the picture quality. Therefore, a new type of active layer is needed to solve the above problems.
技术解决方案Technical solutions
本发明的一个目的是提供一种阵列基板及其制备方法、显示面板，其能够解决目前的阵列基板中Poly –Si材料的制作技术要求高、工序复杂、且P-Si材料成膜温度较高，易受可见光影响，产生光电流，影响TFT开关关态电流大小，从而影响画面质量等问题。An object of the present invention is to provide an array substrate, a preparation method thereof, and a display panel, which can solve the high technical requirements for the production of Poly-Si materials in the current array substrate, complex procedures, and high film-forming temperature of P-Si materials , Susceptible to visible light, produce photocurrent, affect the off-state current of the TFT switch, and affect the picture quality and other issues.
为了解决上述问题，本发明的一个实施方式提供了一种阵列基板，其中包括衬底以及设置于所述衬上的有源层，其中所述有源层采用的材料包括λ-Ti3O5晶体材料。In order to solve the above-mentioned problems, an embodiment of the present invention provides an array substrate, which includes a substrate and an active layer disposed on the substrate, wherein the material used for the active layer includes λ-Ti3O5 crystal material.
进一步的，其中所述有源层包括：主体部和两侧部。其中所述主体部采用的材料包括λ-Ti3O5晶体材料；所述两侧部采用的材料包括β-Ti3O5晶体材料。Further, wherein the active layer includes: a main body and two sides. Wherein, the material used in the main body includes λ-Ti3O5 crystal material; the material used in the two sides includes β-Ti3O5 crystal material.
本发明的另一个实施方式提供了一种制备本发明所涉及的阵列基板的制备方法，其中包括：Another embodiment of the present invention provides a method for preparing the array substrate of the present invention, which includes:
步骤S1，提供一衬底，在所述衬底形成一层λ-Ti3O5晶体材料；Step S1, providing a substrate, and forming a layer of λ-Ti3O5 crystal material on the substrate;
步骤S2，对所述λ-Ti3O5晶体材料进行退火处理进而形成所述有源层。Step S2, annealing the λ-Ti3O5 crystal material to form the active layer.
进一步的，其中所述步骤S1中，通过蒸镀方式在所述衬底上形成一层λ-Ti3O5晶体材料。Further, in the step S1, a layer of λ-Ti3O5 crystal material is formed on the substrate by evaporation.
进一步的，其中所述步骤S2中，所述退火包括激光退火、低温退火中的一种或多种。Further, in the step S2, the annealing includes one or more of laser annealing and low temperature annealing.
进一步的，其中所述低温退火的温度范围为100-300℃。Further, the temperature range of the low-temperature annealing is 100-300°C.
进一步的，其中所述阵列基板的制备方法还包括：步骤S3，将步骤S2形成的有源层定义出主体部及两侧部，对两侧部进行激光辐照，将两侧部的材料由λ-Ti3O5晶体材料转换为β-Ti3O5晶体材料。Further, the method for preparing the array substrate further includes: step S3, defining the active layer formed in step S2 to define a main body and two sides, irradiating the two sides with laser, and removing the material on both sides from λ-Ti3O5 crystal material is converted to β-Ti3O5 crystal material.
进一步的，其中所述激光辐照的激光波长范围为500-550nm。Further, the wavelength range of the laser light irradiated by the laser light is 500-550 nm.
进一步的，其中所述阵列基板的制备方法还包括：步骤S3，将步骤S2形成的有源层定义出主体部及两侧部，通过干法刻蚀对两侧部进行刻蚀去除所述λ-Ti3O5晶体材料，再通过蒸镀方式在所述两侧部的位置处蒸镀β-Ti3O5晶体材料。Further, the preparation method of the array substrate further includes: step S3, defining the active layer formed in step S2 to define a main body and two sides, and etching the two sides by dry etching to remove the λ -Ti3O5 crystalline material, and then vapor-deposit β-Ti3O5 crystalline material at the positions of the two sides by vapor deposition.
本发明的另一个实施方式提供了一种显示面板，其中包括上述阵列基板。Another embodiment of the present invention provides a display panel including the above-mentioned array substrate.
有益效果Beneficial effect
本发明涉及一种阵列基板及其制备方法、显示面板，首先，本发明采用λ-Ti3O5晶体材料替代Poly–Si材料制备阵列基板中的有源层，避免P-Si材料成膜温度较高，易受可见光影响，产生光电流，影响TFT开关关态电流大小，从而影响画面质量等问题；更进一步的，本发明还通过干法刻蚀或者激光辐照的方式将有源层的两侧部的材料由λ-Ti3O5晶体材料转换成β-Ti3O5晶体材料，从而提升迁移率，降低光感电流，提高其电学性能。The present invention relates to an array substrate, a preparation method thereof, and a display panel. Firstly, the present invention uses λ-Ti3O5 crystal material instead of Poly-Si material to prepare the active layer in the array substrate, avoiding the high film forming temperature of P-Si material, It is susceptible to visible light to generate photocurrent, which affects the off-state current of the TFT switch, thereby affecting picture quality and other issues; further, the present invention also uses dry etching or laser irradiation to remove the two sides of the active layer. The material is converted from λ-Ti3O5 crystal material to β-Ti3O5 crystal material, thereby increasing the mobility, reducing the photosensitive current, and improving its electrical performance.
附图说明Description of the drawings
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。In order to more clearly describe the technical solutions in the embodiments of the present invention, the following will briefly introduce the accompanying drawings used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
图1是本发明阵列基板的结构示意图。FIG. 1 is a schematic diagram of the structure of the array substrate of the present invention.
图2是本发明阵列基板采用的λ-Ti3O5晶体材料的XRD图。Fig. 2 is an XRD pattern of the λ-Ti3O5 crystal material used in the array substrate of the present invention.
图3是本发明阵列基板采用的β-Ti3O5晶体材料的XRD图。Fig. 3 is an XRD pattern of β-Ti3O5 crystal material used in the array substrate of the present invention.
图4是本发明阵列基板的制备步骤图。Fig. 4 is a diagram of the preparation steps of the array substrate of the present invention.
图中部件标识如下：The components in the figure are identified as follows:
100、阵列基板                   1、基板100. Array substrate 1. Substrate
2、第一缓冲层                   3、第二缓冲层2. The first buffer layer 3. The second buffer layer
4、有源层                       5、第一栅极绝缘层4. The active layer 5. The first gate insulating layer
6、第一栅极层                   7、第二栅极绝缘层6. The first gate layer 7. The second gate insulating layer
8、第二栅极层                   9、第一层间绝缘层8. The second gate layer 9. The first interlayer insulating layer
10、第二层间绝缘层              11、钝化层10. The second interlayer insulation layer 11. Passivation layer
12、第一平坦层                  13、第二平坦层12. The first flat layer 13, the second flat layer
14、第一源漏极                  15、第二源漏极14. The first source drain 15. The second source and drain
16、像素定义层                  17、隔离柱 16. Pixel definition layer 17, isolation column
41、主体部                      42、两侧部41. Main body department 42. Both sides
具体实施方式detailed description
以下结合说明书附图详细说明本发明的优选实施例，以向本领域中的技术人员完整介绍本发明的技术内容，以举例证明本发明可以实施，使得本发明公开的技术内容更加清楚，使得本领域的技术人员更容易理解如何实施本发明。然而本发明可以通过许多不同形式的实施例来得以体现，本发明的保护范围并非仅限于文中提到的实施例，下文实施例的说明并非用来限制本发明的范围。Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings in the specification, so as to fully introduce the technical content of the present invention to those skilled in the art, so as to demonstrate that the present invention can be implemented by examples, so that the technical content disclosed by the present invention is clearer and the Those skilled in the art can more easily understand how to implement the present invention. However, the present invention can be embodied by many different forms of embodiments. The protection scope of the present invention is not limited to the embodiments mentioned in the text, and the description of the following embodiments is not intended to limit the scope of the present invention.
本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是附图中的方向，本文所使用的方向用语是用来解释和说明本发明，而不是用来限定本发明的保护范围。The directional terms mentioned in the present invention, such as "up", "down", "front", "rear", "left", "right", "inner", "outer", "side", etc., are only attached The directions in the figures and the directional terms used herein are used to explain and describe the present invention, not to limit the protection scope of the present invention.
在附图中，结构相同的部件以相同数字标号表示，各处结构或功能相似的组件以相似数字标号表示。此外，为了便于理解和描述，附图所示的每一组件的尺寸和厚度是任意示出的 ，本发明并没有限定每个组件的尺寸和厚度。In the drawings, components with the same structure are represented by the same numerals, and components with similar structures or functions are represented by similar numerals. In addition, for ease of understanding and description, the size and thickness of each component shown in the drawings are arbitrarily shown The present invention does not limit the size and thickness of each component.
当某些组件，被描述为“在”另一组件“上”时，所述组件可以直接置于所述另一组件上；也可以存在一中间组件，所述组件置于所述中间组件上，且所述中间组件置于另一组件上。当一个组件被描述为“安装至”或“连接至”另一组件时，二者可以理解为直接“安装”或“连接”，或者一个组件通过一中间组件“安装至”或“连接至”另一个组件。When certain components are described as being "on" another component, the component can be directly placed on the other component; there may also be an intermediate component on which the component is placed , And the intermediate component is placed on another component. When a component is described as "installed to" or "connected to" another component, both can be understood as directly "installed" or "connected", or a component is "installed to" or "connected to" through an intermediate component Another component.
实施例1Example 1
如图1所示，本实施例提供了一种阵列基板100，所述阵列基板100包括：衬底以及设置于所述衬底上的有源层4，其中所述衬底包括：基板1、第一缓冲层2以及第二缓冲层3。其中所述阵列基板100还包括：第一栅极绝缘层5、第一栅极层6、第二栅极绝缘层7、第二栅极层8、第一层间绝缘层9、第二层间绝缘层10、钝化层11、第一平坦层12、第二平坦层13、像素定义层16以及隔离柱17。其中所述第二层间绝缘层10上还设有第一源漏极14，所述第一源漏极14连接至所述有源层4，所述第一平坦层12上设有第二源漏极15，所述第二源漏极15连接至所述第一源漏极14。As shown in FIG. 1, this embodiment provides an array substrate 100. The array substrate 100 includes a substrate and an active layer 4 disposed on the substrate, wherein the substrate includes: a substrate 1, The first buffer layer 2 and the second buffer layer 3. The array substrate 100 further includes: a first gate insulating layer 5, a first gate layer 6, a second gate insulating layer 7, a second gate layer 8, a first interlayer insulating layer 9, and a second layer The inter-insulating layer 10, the passivation layer 11, the first flat layer 12, the second flat layer 13, the pixel definition layer 16 and the isolation pillar 17. Wherein the second interlayer insulating layer 10 is further provided with a first source and drain 14, the first source and drain 14 are connected to the active layer 4, and the first flat layer 12 is provided with a second A source drain 15, and the second source drain 15 is connected to the first source drain 14.
其中所述第一栅极绝缘层5主要是起绝缘作用，防止第一栅极层6与所述有源层4直接接触，防止产生短路现象。The first gate insulating layer 5 is mainly used for insulation, preventing the first gate layer 6 from directly contacting the active layer 4 and preventing short circuit.
其中所述第二栅极绝缘层7主要是起绝缘作用，防止第一栅极层6与所述第二栅极层8直接接触，防止产生短路现象。The second gate insulating layer 7 mainly functions as an insulation, preventing the first gate layer 6 from directly contacting the second gate layer 8 and preventing a short circuit.
其中所述第一层间绝缘层9与所述第二层间绝缘层10主要是防止第一源漏极14与所述第二栅极层8以及第一栅极层6之间产生短路现象。The first interlayer insulating layer 9 and the second interlayer insulating layer 10 mainly prevent short circuits between the first source and drain electrodes 14 and the second gate layer 8 and the first gate layer 6 .
其中所述钝化层11主要是为了防止水氧侵蚀，降低阵列基板100的老化程度，提高其使用寿命。The passivation layer 11 is mainly used to prevent water and oxygen corrosion, reduce the aging degree of the array substrate 100, and increase its service life.
其中所述有源层4采用的材料包括λ-Ti3O5晶体材料。采用λ-Ti3O5晶体材料替代Poly–Si材料制备阵列基板中的有源层4，避免P-Si材料成膜温度较高，易受可见光影响，产生光电流，影响TFT开关关态电流大小，从而影响画面质量等问题。The material used for the active layer 4 includes λ-Ti3O5 crystal material. The active layer 4 in the array substrate is prepared with λ-Ti3O5 crystal material instead of Poly-Si material to avoid the high film forming temperature of P-Si material, which is easily affected by visible light, generates photocurrent, and affects the off-state current of the TFT switch, thus Affect the picture quality and other issues.
本实施例中所述有源层4包括主体部41和两侧部42。其中所述主体部41采用的材料包括λ-Ti3O5晶体材料；所述两侧部42采用的材料包括β-Ti3O5晶体材料。 In this embodiment, the active layer 4 includes a main body 41 and two sides 42. The material used for the main body portion 41 includes a λ-Ti3O5 crystal material; the material used for the two side portions 42 includes a β-Ti3O5 crystal material.
具体的，图2、3分别为λ-Ti3O5晶体材料和β-Ti3O5晶体材料的XRD图。其中将两侧部42采用的材料由λ-Ti3O5晶体材料转换成β-Ti3O5晶体材料，主要提高有源层4的迁移率，降低光感电流，提高其电学性能。Specifically, Figures 2 and 3 are XRD patterns of λ-Ti3O5 crystalline material and β-Ti3O5 crystalline material, respectively. The material used in the two sides 42 is converted from a λ-Ti3O5 crystal material to a β-Ti3O5 crystal material, which mainly improves the mobility of the active layer 4, reduces the photo-induced current, and improves its electrical performance.
实施例2Example 2
如图4所示，本发明的另一个实施方式提供了一种制备实施例1所涉及的阵列基板100的制备方法，其中包括：As shown in FIG. 4, another embodiment of the present invention provides a method for preparing the array substrate 100 involved in Example 1, which includes:
步骤S1，提供一衬底，在所述衬底上形成一层λ-Ti3O5晶体材料；Step S1, providing a substrate, and forming a layer of λ-Ti3O5 crystal material on the substrate;
步骤S2，对所述λ-Ti3O5晶体材料进行退火处理进而形成所述有源层4。Step S2, annealing the λ-Ti3O5 crystal material to form the active layer 4.
步骤S3，将步骤S2形成的有源层4定义出主体部41及两侧部42，将两侧部42的材料由λ-Ti3O5晶体材料转换为β-Ti3O5晶体材料。In step S3, the active layer 4 formed in step S2 is defined as the main body 41 and the side portions 42, and the material of the side portions 42 is converted from λ-Ti3O5 crystal material to β-Ti3O5 crystal material.
其中，步骤S1中，可以通过蒸镀方式在所述衬底上形成一层λ-Ti3O5晶体材料，步骤S2中，可以采用激光退火、低温退火中的一种或多种对所述λ-Ti3O5晶体材料进行退火处理进而形成所述有源层4。具体的，低温退火的温度范围为100-300℃。Wherein, in step S1, a layer of λ-Ti3O5 crystal material can be formed on the substrate by evaporation, and in step S2, one or more of laser annealing and low temperature annealing can be used to treat the λ-Ti3O5 The crystal material is annealed to form the active layer 4. Specifically, the temperature range of low-temperature annealing is 100-300°C.
其中步骤S3中，一方面，可以采用波长范围为500-550nm的激光对两侧部42进行激光辐照，从而将两侧部42的材料由λ-Ti3O5晶体材料转换为β-Ti3O5晶体材料，其中所述激光辐照的激光波长范围为500-550nm。另一方面，还可以通过干法刻蚀对两侧部42进行刻蚀去除所述λ-Ti3O5晶体材料，再通过蒸镀方式在所述两侧部42的位置处蒸镀β-Ti3O5晶体材料，最终将所述两侧部42的材料由λ-Ti3O5晶体材料转换为β-Ti3O5晶体材料。In step S3, on the one hand, a laser with a wavelength range of 500-550 nm can be used to irradiate the two sides 42 with laser, so as to convert the material of the two sides 42 from λ-Ti3O5 crystal material to β-Ti3O5 crystal material. The laser wavelength range of the laser irradiation is 500-550nm. On the other hand, the two sides 42 can also be etched by dry etching to remove the λ-Ti3O5 crystal material, and then the β-Ti3O5 crystal material can be evaporated at the position of the two sides 42 by evaporation. Finally, the material of the two sides 42 is converted from λ-Ti3O5 crystal material to β-Ti3O5 crystal material.
本发明还提供了一种显示面板，其中包括上述阵列基板100，具体的所述显示面板可以是OLED显示面板。The present invention also provides a display panel, which includes the above-mentioned array substrate 100. Specifically, the display panel may be an OLED display panel.
以上对本发明所提供的阵列基板及其制备方法、显示面板进行了详细介绍。应理解，本文所述的示例性实施方式应仅被认为是描述性的，用于帮助理解本发明的方法及其核心思想，而并不用于限制本发明。在每个示例性实施方式中对特征或方面的描述通常应被视作适用于其他示例性实施例中的类似特征或方面。尽管参考示例性实施例描述了本发明，但可建议所属领域的技术人员进行各种变化和更改。本发明意图涵盖所附权利要求书的范围内的这些变化和更改，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。The array substrate, the preparation method thereof, and the display panel provided by the present invention are described in detail above. It should be understood that the exemplary embodiments described herein should only be regarded as descriptive, used to help understand the method and core idea of the present invention, but not to limit the present invention. Descriptions of features or aspects in each exemplary embodiment should generally be considered as applicable to similar features or aspects in other exemplary embodiments. Although the present invention has been described with reference to exemplary embodiments, various changes and modifications can be suggested to those skilled in the art. The present invention intends to cover these changes and modifications within the scope of the appended claims. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention shall be included in the protection scope of the present invention .

Claims (10)

  1. 一种阵列基板，其中包括：An array substrate, which includes:
    衬底；Substrate
    有源层，所述有源层设置于所述衬底上；An active layer, the active layer being disposed on the substrate;
    其中所述有源层采用的材料包括λ-Ti3O5晶体材料。The material used in the active layer includes λ-Ti3O5 crystal material.
  2. 根据权利要求1所述的阵列基板，其中所述有源层包括：The array substrate according to claim 1, wherein the active layer comprises:
    主体部，所述主体部采用的材料包括λ-Ti3O5晶体材料；The main body, the material used in the main body includes λ-Ti3O5 crystal material;
    两侧部，所述两侧部采用的材料包括β-Ti3O5晶体材料。On both sides, the material used for the two sides includes β-Ti3O5 crystal material.
  3. 一种制备权利要求1所述的阵列基板的制备方法，其中包括：A method for preparing the array substrate according to claim 1, which comprises:
    步骤S1，提供一衬底，在所述衬底上形成一层λ-Ti3O5晶体材料；Step S1, providing a substrate, and forming a layer of λ-Ti3O5 crystal material on the substrate;
    步骤S2，对所述λ-Ti3O5晶体材料进行退火处理进而形成所述有源层。Step S2, annealing the λ-Ti3O5 crystal material to form the active layer.
  4. 根据权利要求3所述的阵列基板的制备方法，其中所述步骤S1中，通过蒸镀方式在所述衬底上形成一层λ-Ti3O5晶体材料。3. The method for manufacturing an array substrate according to claim 3, wherein in step S1, a layer of λ-Ti3O5 crystal material is formed on the substrate by evaporation.
  5. 根据权利要求3所述的阵列基板的制备方法，其中所述步骤S2中，所述退火包括激光退火、低温退火中的一种或多种。The method for manufacturing an array substrate according to claim 3, wherein in the step S2, the annealing includes one or more of laser annealing and low temperature annealing.
  6. 根据权利要求5所述的阵列基板的制备方法，其中所述低温退火的温度范围为100-300℃。The method for manufacturing the array substrate according to claim 5, wherein the temperature range of the low-temperature annealing is 100-300°C.
  7. 根据权利要求3所述的阵列基板的制备方法，其中还包括：4. The method of manufacturing an array substrate according to claim 3, further comprising:
    步骤S3，将步骤S2形成的有源层定义出主体部及两侧部，对两侧部进行激光辐照，将两侧部的材料由λ-Ti3O5晶体材料转换为β-Ti3O5晶体材料。In step S3, the active layer formed in step S2 is defined as the main body and the two sides, and the two sides are irradiated with laser to convert the material on the two sides from λ-Ti3O5 crystal material to β-Ti3O5 crystal material.
  8. 根据权利要求7所述的阵列基板的制备方法，其中所述激光辐照的激光波长范围为500-550nm。8. The method for manufacturing an array substrate according to claim 7, wherein the laser wavelength range of the laser irradiation is 500-550 nm.
  9. 根据权利要求3所述的阵列基板的制备方法，其中还包括：4. The method of manufacturing an array substrate according to claim 3, further comprising:
    步骤S3，将步骤S2形成的有源层定义出主体部及两侧部，通过干法刻蚀对两侧部进行刻蚀去除所述λ-Ti3O5晶体材料，再通过蒸镀方式在所述两侧部的位置处蒸镀β-Ti3O5晶体材料。In step S3, the active layer formed in step S2 is defined as the main body and the two sides, and the two sides are etched by dry etching to remove the λ-Ti3O5 crystal material, and then the two sides are deposited by evaporation. Β-Ti3O5 crystal material is vapor-deposited on the side position.
  10. 一种显示面板，其中包括权利要求1所述的阵列基板。A display panel comprising the array substrate according to claim 1.
PCT/CN2019/084883 2019-04-18 2019-04-29 Array substrate and fabricating method therefor, and display panel WO2020211118A1 (en)

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JPWO2023033182A1 (en) * 2021-09-06 2023-03-09

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101752426A (en) * 2008-12-03 2010-06-23 索尼株式会社 Thin film transistor, display unit, and method of manufacturing thin film transistor
US20120161098A1 (en) * 2009-08-20 2012-06-28 Nec Corporation Substrate, manufacturing method of substrate, semiconductor element, and manufacturing method of semiconductor element
CN102709326A (en) * 2012-04-28 2012-10-03 北京京东方光电科技有限公司 Thin film transistor and manufacturing method thereof as well as array substrate and display device
CN102906026A (en) * 2010-05-21 2013-01-30 国立大学法人东京大学 Titanium oxide particles, process for producing same, magnetic memory, optical information recording medium, and charge accumulation type memory
CN107305303A (en) * 2016-04-18 2017-10-31 三星显示有限公司 Liquid crystal display

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104973622B (en) * 2015-02-12 2017-03-22 四川大学 Preparation method of light-induced phase transition storage powdery material lamda-Ti3O5
KR102488857B1 (en) * 2016-04-08 2023-01-13 티씨엘 차이나 스타 옵토일렉트로닉스 테크놀로지 컴퍼니 리미티드 Display device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101752426A (en) * 2008-12-03 2010-06-23 索尼株式会社 Thin film transistor, display unit, and method of manufacturing thin film transistor
US20120161098A1 (en) * 2009-08-20 2012-06-28 Nec Corporation Substrate, manufacturing method of substrate, semiconductor element, and manufacturing method of semiconductor element
CN102906026A (en) * 2010-05-21 2013-01-30 国立大学法人东京大学 Titanium oxide particles, process for producing same, magnetic memory, optical information recording medium, and charge accumulation type memory
CN102709326A (en) * 2012-04-28 2012-10-03 北京京东方光电科技有限公司 Thin film transistor and manufacturing method thereof as well as array substrate and display device
CN107305303A (en) * 2016-04-18 2017-10-31 三星显示有限公司 Liquid crystal display

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
KOBAYASHI, KEISUKE ET AL.: "Electronic structure and correlation in β-Ti3O5 and λ-Ti3O5 studied by hard x-ray photoelectron spectroscopy", PHYSICAL REVIEW B, vol. 95, no. 8, 22 February 2017 (2017-02-22), XP055743597, DOI: 20200103170651Y *

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