CN203674269U - Thin film transistor, array substrate and organic light-emitting display panel - Google Patents
Thin film transistor, array substrate and organic light-emitting display panel Download PDFInfo
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- CN203674269U CN203674269U CN201420016475.5U CN201420016475U CN203674269U CN 203674269 U CN203674269 U CN 203674269U CN 201420016475 U CN201420016475 U CN 201420016475U CN 203674269 U CN203674269 U CN 203674269U
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Images
Abstract
The utility model discloses a thin film transistor, an array substrate and an organic light-emitting display panel, and aims to provide the thin film transistor which is simple in structure and manufacture process. The thin film transistor at least comprises an active layer, and the active layer is made from a carbon nano tube material possessing a semiconductor property or a graphene material possessing the semiconductor property. The thin film transistor also comprises a first conductive layer and a second conductive layer which are at the upper and lower two sides of the active layer and are contacted with the active layer, and the first conductive layer and the second conductive layer are composed of secondary electron emission layers possessing the electron multiplication functions.
Description
Technical field
The utility model relates to Display Technique field, relates in particular to a kind of thin-film transistor, array base palte and organic electroluminescence display panel.
Background technology
Organic electroluminescence display panel refers to and comprises organic light-emitting device panel, for example comprise OLED(Organic Light Emitting Diode, Organic Light Emitting Diode) or other organic electroluminescent devices EL (Electro Luminescent, electroluminescent cell).The most frequently used luminescent device is OLED.Organic electroluminescence display panel is to adopt the panel of organic light emitting display, and in this panel, each dot structure comprises an organic luminescent device, because organic luminescent device is a kind of self luminous display device, therefore, in this class panel without backlight.Organic luminescent device is thin because having, light, self-luminous, wide visual angle, high definition, high brightness, response fast, low energy consumption, the advantage such as serviceability temperature scope is wide, shock resistance is strong, become gradually the bright spot in flat panel display field, and will occupy consequence.
OLED luminescent device is current drive-type luminescent device, and the drive current needing while normally work is larger.The drive current that drive circuit provides for OLED more can guarantee more greatly the normal work of OLED, can also reduce the power consumption of organic electroluminescence display panel.The luminous thin-film transistor of driving OLED is extremely important, thin-film transistor TFT(Thin Film Transistor, thin-film transistor) in active layer carrier mobility higher, the luminous drive current of driving OLED is just larger.
At present, in organic electroluminescence display panel, thin-film transistor TFT mainly comprises non-crystalline silicon tft and low temperature polycrystalline silicon TFT.Mobility ratio non-crystalline silicon tft carrier mobility at least two orders of magnitude greatly of low temperature polycrystalline silicon TFT charge carrier.Therefore, the thin-film transistor in existing organic electroluminescence display panel uses low temperature polycrystalline silicon TFT mostly.
The condition of existing making low temperature polycrystalline silicon TFT is harsher, particularly, make and generally need first deposition of amorphous silicon for the TFT of low temperature polycrystalline silicon, and then carry out dehydrogenation, carry out again after treatment laser annealing, the etching of exposing again, this step at least needs the mask process through 3-4, and complex procedures and yield are lower.In addition, the temperature of making low temperature polycrystalline silicon TFT is higher, is not suitable for making on flexible base, board.
Utility model content
The utility model embodiment provides thin-film transistor, array base palte and organic electroluminescence display panel, in order to the better simply thin-film transistor of a kind of structure and fabrication processing, array base palte and organic electroluminescence display panel to be provided.
The thin-film transistor that the utility model embodiment provides at least comprises active layer, and described active layer is made up of the grapheme material that has the carbon nano-tube material of semiconductor property or have a semiconductor property; Also comprise and be positioned at the first conductive layer and the second conductive layer that the upper and lower both sides of described active layer contact with active layer; Described the first conductive layer and the second conductive layer are made up of the secondary electron emission layer with electron multiplication function.
The secondary electron emission layer preferably, with electron multiplication function is made up of metal oxide or metallo-organic compound material.
Preferably, the thickness of described the first conductive layer is 40-50nm, and the thickness of described the second conductive layer is 40-50nm.
Preferably, described in there is semiconductor property carbon nano-tube be oxide/carbon nanometer tube, described in there is semiconductor property Graphene be hydrogen Graphene.
Preferably, also comprise source electrode and drain electrode, described source electrode and drain electrode are made up of carbon nano-tube or the grapheme material with conductor nature; Described the second conductive layer between described source electrode and drain electrode and described active layer and with described source electrode and drain electrode corresponding setting.
The utility model embodiment provides a kind of array base palte, comprises substrate, is arranged at the multiple pixel cells that are matrix distribution on described substrate, and described each pixel cell comprises above-mentioned thin-film transistor.
Preferably, described array base palte also comprises the organic luminescent device that is positioned at each pixel cell, described organic luminescent device at least comprises negative electrode, anode and the luminescent layer between negative electrode and anode that lamination arranges, and described anode is connected with the drain electrode in described thin-film transistor;
Wherein, described negative electrode and anode one of are at least made up of carbon nano-tube or graphene conductive material.
Preferably, described anode also comprises and the conductive film layer with reflection action of described anode lamination setting; And/or
Described negative electrode also comprises the conductive film layer with reflection action with the setting of described negative electrode lamination.
Preferably, described substrate is flexible base, board.
The utility model embodiment provides a kind of organic electroluminescence display panel, comprises above-mentioned array base palte.
The thin-film transistor that the utility model embodiment provides, active layer is the Graphene that has the carbon nano-tube of semiconductor property or have semiconductor property, active layer, the first conductive layer and the second conductive layer only need to use the process conditions of similar chemical vapour deposition technique or cladding process just can prepare, and described the first conductive layer and the second conductive layer are the secondary electron emission layer with electron multiplication function, in the time of described thin-film transistor TFT energising work, electronics enters the first conductive layer by active layer and the second conductive layer conducts, because the first conductive layer and the second conductive layer have the characteristic of the secondary of electron multiplication function, electrons is rotation shape to accelerate to advance, in this process, can there is collision repeatedly, make electron production multiplication, finally the electronics of output becomes how much growths doubly, the mobility of electronics is increased, reach described thin-film transistor TFT carrier mobility and low temperature polycrystalline silicon carrier mobility comparable.
Accompanying drawing explanation
The thin-film transistor structure schematic diagram that Fig. 1 provides for the utility model embodiment mono-;
The array base-plate structure schematic diagram that Fig. 2 provides for the utility model embodiment bis-;
The manufacture method schematic flow sheet of the making thin-film transistor that Fig. 3 provides for the utility model embodiment;
The manufacture method schematic flow sheet of the making thin-film transistor that Fig. 4 provides for another embodiment of the utility model;
The thin-film transistor structure schematic diagram with passivation layer that Fig. 5 provides for the utility model embodiment;
The making organic light-emitting device idiographic flow schematic diagram that Fig. 6 provides for the utility model embodiment;
Fig. 7 is formed with thin-film transistor and organic light-emitting device organic electroluminescence display panel structural representation for what the utility model embodiment provided.
Embodiment
The utility model embodiment provides thin-film transistor and preparation method thereof, array base palte and organic electroluminescence display panel, in order to the better simply thin-film transistor of a kind of structure and fabrication processing, array base palte and organic electroluminescence display panel to be provided.
The thin-film transistor that the utility model embodiment provides only need to use the process conditions of similar chemical vapour deposition technique or cladding process just can prepare the TFT of the charge carrier high mobility characteristic that low temperature polycrystalline silicon possesses, and realizes the process complexity of preparation high performance TFT.
Illustrate thin-film transistor that the utility model embodiment provides and preparation method thereof, array base palte and display unit below with reference to accompanying drawing.
Embodiment mono-: thin-film transistor.
The thin-film transistor as an example of Fig. 1 example, the utility model embodiment being provided is below introduced, as shown in Figure 1, this thin-film transistor at least comprises active layer 35, also comprise be positioned at active layer Shang Xia 35, both sides contact with active layer 35 the first conductive layer 36 and the second conductive layer 37, that is to say that active layer 35 is located between the first conductive layer 36 and the second conductive layer 37; Wherein, active layer 35 is made up of the grapheme material that has the carbon nano-tube of semiconductor property or have a semiconductor property; The first conductive layer 36 and the second conductive layer 37 are made up of the secondary electron emission layer with electron multiplication function.
Certainly this thin-film transistor conventionally also comprise grid 31, be positioned at grid 31 tops gate insulator 32, be positioned at the active layer 35 of gate insulator 32 tops, be positioned at source electrode 33 and the drain electrode 34 etc. of active layer 35 tops.
The thin-film transistor that the utility model embodiment mono-provides, active layer is made up of the Graphene that has the carbon nano-tube of semiconductor property or have a semiconductor property, active layer, the first conductive layer and the second conductive layer only need to use the similar chemical vapour deposition technique of prior art maturation or the process conditions of cladding process just can prepare, reduce the number of times of deposition, reduce preparation technology's difference causes between layers damage and the difference of matching degree, therefore, preparation technology is simple, cost of manufacture is cheap, and yield is higher, and the first conductive layer and the second conductive layer are made up of the secondary electron emission layer with electron multiplication function, in the time of thin-film transistor TFT energising work, electronics enters the first conductive layer by active layer and the second conductive layer conducts, because the first conductive layer and the second conductive layer have the characteristic of the secondary of electron multiplication function, electrons is rotation shape to accelerate to advance, in this process, between electronics, can there is collision repeatedly, make electron production multiplication, finally the electronics of output becomes how much growths doubly, the mobility of electronics is increased, reach described thin-film transistor TFT carrier mobility and low temperature polycrystalline silicon carrier mobility comparable.
The secondary electron emission layer preferably, with electron multiplication function is made up of metal oxide or metallo-organic compound material.
Concrete, this metal oxide can be MgO(magnesium oxide) or BeO (beryllium oxide) etc.Described metallo-organic compound claims again organo-metallic compound, the alkyl that refers to alkyl (comprising methyl, ethyl, propyl group, butyl etc.) and aromatic radical (phenyl etc.) is combined the compound forming with metallic atom, and the general name of the material of carbon and the direct combination of metallic atom, for example, the metal such as lithium, sodium, magnesium, calcium, zinc, cadmium, mercury, beryllium, aluminium, tin, lead all can form more stable organo-metallic compound.Metal oxide and metallo-organic compound all have electron multiplication function, therefore, can be used as secondary electron emission layer, certainly, also can adopt other retes with electron multiplication function as secondary electron emission layer, do not limit at this.
The multiple of electron multiplication is relevant with the film thickness of secondary electron emission layer, by controlling the improvement degree of film thickness capable of regulating to TFT performance, generally the thickness of secondary electron emission layer is unsuitable blocked up also should not be excessively thin, the thickness (correspondence between 40-50nm respectively of preferred the first conductive layer described in the utility model and the second conductive layer
), can make the multiplication factor of electronics reach more than 150 times.
Due to the structure particularity of carbon nano-tube and grapheme material, it both can be used as conductor and had used, and also can, by becoming semiconductor after corresponding PROCESS FOR TREATMENT, for example, can make it to become semiconductor by UV-irradiation oxygen treatments applied carbon nano-tube, passed through H
2or Ar processing can make Graphene become semiconductor, in the present embodiment, preferred scheme is, the described carbon nano-tube with semiconductor property is through ultraviolet irradiation and the carbon nano-tube with semiconductor property after oxygen treatments applied, be called for short oxide/carbon nanometer tube, this oxide/carbon nanometer tube, as a kind of nano material, has lightweight and good mechanics, electricity and chemical property; The described Graphene with semiconductor property is the Graphene with semiconductor property of crossing through hydrogen treat, is called for short hydrogen Graphene, and this kind of hydrogen Graphene composition is purer, can bring into play better the characteristic of Graphene.The process of concrete processing carbon nano-tube and Graphene similarly to the prior art, repeats no more here.
Preferably, the source electrode that this thin-film transistor comprises and drain electrode formed by carbon nano-tube or the grapheme material with conductor nature, and, described the second conductive layer between described source electrode and drain electrode and described active layer and with described source electrode and drain corresponding setting.
Concrete, take the TFT of bottom gate type as example, as shown in Figure 1, this second conductive layer 37 is positioned at the below of described source electrode 33 and drain electrode 34, the second conductive layer 37 of described source electrode 33 belows and described drain electrode 34 below the second conductive layers 37 are oppositely arranged to form has the slit of width of setting, and described slit and described source electrode 33 are corresponding with the slit of formation that drains between 34.That is to say, source electrode 33 and drain electrode 34 belows are respectively arranged with the second conductive layer 37, the second conductive layer 37 has a slit, avoids source electrode 33 and drain electrode 34 to be electrical connected by the second conductive layer 37, and this kind of set-up mode can further guarantee that source electrode 33 and drain electrode 34 keep insulation.
It should be noted that, the TFT shown in Fig. 1 is bottom gate type TFT, and the utility model thin-film transistor can be also top gate type TFT, side grid type or double grid type etc., does not do concrete restriction here.
For example, in the time being top gate type TFT, the concrete structure of this type of TFT is that active layer below is source electrode and drain electrode, active layer top is gate insulation layer, and gate insulation layer top is grid, now, the first conductive layer and the second conductive layer are still positioned at the upper and lower both sides of active layer and contact with active layer, just the first conductive layer is positioned at active layer top, and the second conductive layer is positioned at active layer below, and the second conductive layer is positioned at the top of source electrode and drain electrode.
In the TFT of other patterns, the set-up mode of above-mentioned the first conductive layer and the second conductive layer and active layer, source electrode and drain electrode is similar to the aforementioned embodiment, repeats no more herein.
Embodiment bis-: array base palte.
The array base palte that the utility model embodiment bis-provides, similarly to the prior art, comprise substrate and be arranged at the multiple pixel cells that are matrix distribution on described substrate, described each pixel cell at least comprises a thin-film transistor, the thin-film transistor that this thin-film transistor provides for above-described embodiment.
Thin-film transistor in organic electroluminescence display panel and the setting of organic luminescent device OLED are below described.
Referring to Fig. 2, the array base palte that the utility model embodiment bis-provides also comprises the organic luminescent device OLED that is positioned at each pixel cell, described organic luminescent device at least comprises that the negative electrode 41 of lamination setting, anode 42(also claim pixel electrode) and luminescent layer 43 between negative electrode 41 and anode 42, anode 42 is connected with the drain electrode 34 in thin-film transistor; Wherein, negative electrode 41 and anode 42 one of are at least made up of carbon nano-tube or the grapheme material with conductor nature.
The above-mentioned array base palte that the utility model embodiment bis-provides, the negative electrode of organic luminescent device OLED and anode one of are at least made up of carbon nano-tube or the grapheme material with conductor nature, arrange because the atom of carbon nano-tube or Graphene presents long-range order, show good electric conductivity.
Compare existing metal or metal oxide as negative electrode 41 and the anode 42 of OLED, have the carbon nano-tube of conductor nature or the electric conductivity of Graphene is better, the carrier transport rate of OLED is higher, is conducive to improve the luminescent properties of OLED.
Preferably, the OLED that the utility model embodiment bis-provides, negative electrode, luminescent layer and anode successively lamination are arranged on substrate, and the position of anode and negative electrode can exchange, and no matter which kind of set-up mode, need to guarantee that anode is connected with the drain electrode in thin-film transistor.Shown in Fig. 2, the anode 42 of OLED is positioned on substrate 1, and luminescent layer 43 is positioned on anode 42, and negative electrode 41 is positioned on luminescent layer 43.Concrete set-up mode can be determined according to the actual requirements, does not do concrete restriction here.
Further, because carbon nano-tube or the graphene conductive rete with conductor nature are transparent conductive film layer, described anode also comprises the conductive film layer with reflection action with the setting of described anode lamination; And/or described negative electrode also comprises and the conductive film layer with reflection action of described negative electrode lamination setting, concrete, this conductive film layer can be served as reasons and be had the Mo(molybdenum of reflection action), Al(aluminium) or the rete that forms of molybdenum aluminium alloy etc.
Preferably, the anode of OLED comprises the conductive film layer with reflection action being positioned on described substrate, and described in being positioned at, has the carbon nano-tube with conductor nature or the graphene conductive rete as anode on the conductive film layer of reflection action.
The anode of the OLED that the utility model provides adopts double-deck conductive film layer, be that opaque conductive film layer combines with transparent conductive film layer, by effective the anode of TFT substrate and organic illuminating element combination, can reduce anode wiring and TFT underlay pattern to the blocking of a part of light, improve light-emitting area; And anode electrode employing is the design of double-level-metal, be that opaque metal combines with transparent conductive film, can effectively utilize the light of anode reflection, make reverberation pass through organic luminous layer, cause the luminous organic material of luminescent layer to realize luminescence generated by light, further improved organic light-emitting device luminous efficiency and brightness.Transparent conductive film layer can play a protective role to the conductive film layer of reflection action.Because OLED further improves the utilance of light, make in OLED to improve from the electronics of negative electrode with from the injection efficiency in the hole of anode, and then improved luminous efficiency and the display quality of image of organic electroluminescence display panel.
Substrate in array base palte in above-described embodiment can be glass substrate, can be also flexible base, board.Preferably, described substrate is flexible base, board, and this flexible base, board is preferably made by macromolecular materials such as polyvinyl alcohol film, polyimide film, polyester films.
Being produced under hot conditions of existing low temperature polycrystalline silicon carried out, be not suitable for thermo-labile or compared with the flexible base, board of low melting point on make, therefore also just limited the display unit such as flexible display apparatus or Electronic Paper of making high-performance and low-cost.And the above-mentioned thin-film transistor TFT that the utility model provides, for example, without carry out (exceeding 200 ℃) under hot conditions, employing chemical vapour deposition technique or cladding process just can be realized the carbon nano-tube to having semiconductor property or have the deposition of the Graphene of semiconductor property, be applicable to flexible base, board, therefore, can simplify the manufacture craft of making flexible base, board, reduce cost of manufacture.
It should be noted that, as shown in Figure 2, similar with existing array base-plate structure, before making each rete of OLED, be also included in the upper passivation layer 38 of making of TFT, between source electrode 33 and drain electrode 34 that passivation layer 38 arranges at anode 42 and with layer.It is pixel separation film that the pixel between anode 42 and luminescent layer 43 that also comprises array base palte defines a layer 44().
Embodiment tri-: organic electroluminescence display panel.
The utility model embodiment also provides a kind of organic electroluminescence display panel, comprises above-mentioned array base palte.Described organic electroluminescence display panel can be: any product or parts with Presentation Function such as Electronic Paper, oled panel, DPF, mobile phone, panel computer.
The organic electroluminescence display panel that the utility model embodiment provides, active layer in thin-film transistor is made up of the grapheme material that has the carbon nano-tube of semiconductor property or have a semiconductor property, make semiconductor carriers mobility relatively high, make the stability of organic light emitting display higher; Simultaneously, make respectively the first conductive layer and the second conductive layer in the both sides up and down of active layer, described the first conductive layer and the second conductive layer are made up of the secondary electron emission layer with electron multiplication function, make the electron production multiplication in TFT active layer, finally the electronics of output becomes how much growths doubly, the mobility of electronics is increased, reach TFT carrier mobility and low temperature polycrystalline silicon carrier mobility is comparable.
Embodiment tetra-: the manufacture method of thin-film transistor.
The manufacture method of the thin-film transistor that the utility model embodiment tetra-provides, entirety comprises the following steps:
Making comprises active layer and is positioned at the first conductive layer that the upper and lower both sides of described active layer contact with active layer and the process of the second conductive layer; Described active layer is made up of the grapheme material that has the carbon nano-tube of semiconductor property or have a semiconductor property, and described the first conductive layer and the second conductive layer are made up of the secondary electron emission layer with electron multiplication function respectively.
Certainly, existing thin-film transistor can also comprise other structures such as grid, source electrode, drain and gate insulating barrier, comprises that the process of the thin-film transistor of said structure can adopt existing method to make, and repeats no more herein.Above-mentioned grid, source electrode, drain and gate insulating barrier can be the metal or alloy of existing making grid, source electrode, drain and gate insulating barrier, or are made up of carbon nano-tube or graphene conductive material.
The secondary electron emission layer preferably, with electron multiplication function is made up of metal oxide or metallo-organic compound material.
Shown in Fig. 3, described in above-mentioned steps, make and comprise active layer and be positioned at the first conductive layer that the upper and lower both sides of described active layer contact with active layer and the process of the second conductive layer, be specifically as follows:
Step S11, on substrate, deposit one deck and have the secondary electron emission layer of electron multiplication function, in order to form described the first conducting layer figure;
Step S12, employing chemical vapour deposition technique or cladding process deposit the carbon nano-tube rete of one deck after UV-irradiation and oxygen treatments applied on the substrate of secondary electron emission layer described in being formed with electron multiplication function, or the Graphene rete that adopts chemical vapour deposition technique or cladding process deposition one deck hydrogen or argon gas to process, in order to form described active layer figure;
Step S13, be formed with described carbon nano-tube rete after UV-irradiation and oxygen treatments applied, or adopt the secondary electron emission layer that again forms one deck on the substrate of the Graphene rete that chemical vapour deposition technique or cladding process deposition one deck hydrogen or argon gas processed and have electron multiplication function, in order to form described the second conducting layer figure;
Step S14, to the two-layer secondary electron emission layer on described substrate, and the carbon nano-tube rete after UV-irradiation and oxygen treatments applied or carry out composition technique through the Graphene rete that hydrogen or argon gas were processed between secondary electron emission layer, form described the first conducting layer figure, active layer figure and the second conducting layer figure, and described the second conducting layer figure between source electrode to be formed and drain electrode and described active layer and with source electrode to be formed and the corresponding setting of drain electrode.
In the present embodiment, shown in Fig. 2, the second conductive layer is to have the figure of setting width slit, that is to say, at the upper slit (i.e. second conductive layer) of opening with formation setting width that form of rete (being active layer 35) of carbon nano-tube or grapheme material formation, described opening extends longitudinally to active layer 35, and this slit is relative with the slit between source electrode to be formed and drain electrode, between source electrode 33 and drain electrode 34, is provided with the slit of setting width similarly to the prior art.
Above-mentioned steps S11 to S13 is in specific implementation process, can be by Sputter deposition techniques one deck MgO(or BeO or metallo-organic compound) (this layer will be used for making the first conductive layer), then make the carbon nano-tube that one deck crosses through UV-irradiation and oxygen oxygen treatments applied or the Graphene (this layer will be used for making active layer) of processing with hydrogen (or argon gas) by the method for chemical vapour deposition technique or coating, the carbon nano-tube of processing or Graphene possess semi-conductive performance; Then again deposit one deck MgO(or BeO or metallo-organic compound by Sputter technology) (this layer will be used for making the second conductive layer).
Shown in Fig. 4, when this thin-film transistor comprises source electrode and drain electrode, and described source electrode and drain electrode are when having the carbon nano-tube of conductor nature or grapheme material and form, and the process of above-mentioned making thin-film transistor can also comprise the process of making described source electrode and drain electrode, is specifically as follows:
Step S15, on the substrate that is formed with described the first conducting layer figure, active layer figure and the second conducting layer figure, deposit one deck and have carbon nano-tube or the Graphene rete of conductor nature;
Step S16, described carbon nano-tube or the Graphene rete with conductor nature carried out to composition technique, form the source electrode and the drain electrode figure that are positioned on the second conducting layer figure.
In the present embodiment, because the utility model active layer is different from existing amorphous silicon or polysilicon active layer, active layer is made up of carbon nano-tube or the grapheme material with semiconductor property, source electrode and drain electrode form by having conductor nature carbon nano-tube or grapheme material, form active layer, the etching condition of source electrode and drain material and the first conductive layer and the second conductive layer are similar, can pass through a mask, exposure, the technology such as development chemical wet etching complete, in greatly having saved the fabrication processing of product, also reduce to greatest extent the yields of product, avoid through mask repeatedly, exposure, influencing each other between the rete that the deviation of the alignment that the operations such as development chemical wet etching are brought or etching condition difference are brought, the problem that causes product yields to decline.
Conventionally thin-film transistor can also comprise grid and gate insulator etc., in above-mentioned manufacture method, can also comprise the step of making grid and gate insulator etc., in the time that this thin-film transistor is bottom gate type, the concrete structure of the thin-film transistor of bottom gate type is that grid top is gate insulator, what be positioned at gate insulator top is active layer, be positioned at source electrode and the drain electrode of active layer top, and, active layer below is the first conductive layer, and active layer top is the second conductive layer with the below of source electrode and drain electrode.
Therefore, make in the process of described thin-film transistor, before above-mentioned step S11, can also comprise the following steps:
Step 11-1, on substrate, form the figure that comprises grid by composition technique;
Particularly, upper according to conventional sputter (Sputter) deposition techniques layer of metal rete at glass substrate or flexible base, board (hereinafter referred to as substrate), for example Mo(molybdenum) metallic diaphragm, then on the substrate 1 shown in Fig. 2, form the figure that at least comprises grid 31 by composition technique, also can form grid line figure simultaneously.
Step 11-2, on the substrate that is formed with described grid line, form gate insulator by composition technique;
Particularly, adopt paint-on technique on the grid 31 shown in Fig. 2, to form the gate insulator 32 that covers whole substrate 1.
Then, can on step 11-2 substrate, deposit one deck and have the secondary electron emission layer of electron multiplication function, in order to form described the first conducting layer figure, secondly, perform step successively S12-S16.
In the time that this thin-film transistor is top gate type, the thin-film transistor concrete structure of top gate type is that active layer below is source electrode and drain electrode, active layer top is gate insulation layer, gate insulation layer top is grid, and active layer top is the first conductive layer, active layer below is the second conductive layer with the top of source electrode and drain electrode.
Therefore, the concrete manufacture method of described thin-film transistor can be:
Step 21, on substrate, deposit one deck and have carbon nano-tube or the Graphene rete of conductor nature;
Step 22, described carbon nano-tube or the Graphene rete with conductor nature carried out to composition technique, form source electrode and drain electrode figure;
Step 23, on the substrate that forms described source electrode and drain electrode, deposit one deck and have the secondary electron emission layer of electron multiplication function, in order to form described the second conducting layer figure;
Step S11 in this step and above-described embodiment is slightly different, and difference is, is the thin layer first depositing for making the second conductive pattern in the present embodiment.
Step 24, identical with step S12.
Step 25, on the substrate of step 24, again form one deck and have the secondary electron emission layer of electron multiplication function, in order to form described the first conducting layer figure;
Step 26, to the two-layer secondary electron emission layer on described substrate, and the carbon nano-tube rete after UV-irradiation and oxygen treatments applied or carry out composition technique through the Graphene rete that hydrogen or argon gas were processed between secondary electron emission layer, form described the first conducting layer figure, active layer figure and the second conducting layer figure, and described the second conducting layer figure between source electrode and drain electrode and described active layer and with described source electrode and the corresponding setting of drain electrode.
Step S14 in this step and above-described embodiment is slightly different, and difference is that this second conductive layer is positioned at source electrode and drain electrode top, and in the time that thin-film transistor is bottom gate type, the second conductive layer is positioned at source electrode and drain electrode below.
Step 27, on the substrate of step 26, be formed with on the substrate of described grid line and forming gate insulator by composition technique;
Particularly, adopt the gate insulator that forms the whole substrate of covering on paint-on technique on the substrate that forms the first conducting layer figure, active layer figure and the second conducting layer figure.
Step 28, on the substrate of step 27, on substrate, form the figure that comprises grid by composition technique;
Particularly, gate insulator top for example, according to conventional sputter (Sputter) deposition techniques layer of metal rete, Mo(molybdenum) metallic diaphragm, then on substrate, form the figure that at least comprises grid by composition technique, also can form grid line figure simultaneously.
It should be noted that, the first conducting layer figure described in above-described embodiment, active layer figure, the second conducting layer figure, source electrode figure and drain electrode figure can form with a composition technique, also can be repeatedly forming in composition technique.
For example, mode one: described the first conducting layer figure, active layer figure, and the second conducting layer figure is by forming with a composition technique, described source electrode and drain electrode figure form separately;
Mode two: described the first conducting layer figure, active layer figure, the second conducting layer figure and source electrode and drain electrode figure are by forming with a composition technique.
Concrete manufacturing process is similar to manufacture craft of the prior art, repeats no more herein.If the first conductive layer, active layer, the second conductive layer are completing with in a composition technique, or the first conductive layer, active layer, the second conductive layer, source electrode and drain electrode be completing with in a composition technique, and product yields is higher and save technological process.
Preferably, in above-described embodiment, the thickness of described the first conductive layer is 40-50nm, and the thickness of described the second conductive layer is 40-50nm.
It should be noted that, shown in Fig. 2, in the method for above-mentioned making thin-film transistor, can also comprise and in existing method, make passivation layer 38 and on passivation layer 38, make via hole 47(via hole 47 regions as shown in dotted line closed in Fig. 2) step, be specially by composition technique and form passivation layer 38 on the substrate 1 that is formed with source electrode 33 and drain electrode 34 figures, and be formed on passivation layer 38 and the via hole 47 of drain electrode 34 figure corresponding regions.
Specific implementation process can be, in source electrode and drain electrode, use resin-coating technology coated with resins, form passivation layer 38 as shown in Figure 2 by technology such as exposure, development, chemical wet etchings, the region that this passivation layer 38 is corresponding with drain electrode 34 forms sets big or small opening, referring to Fig. 5, this opening is via hole 47.
Embodiment five: the manufacturing process of array base palte.
Comprise the process of thin-film transistor in pixel cell and the process of making OLED of making.
The manufacturing process of the thin-film transistor of the either type that the manufacturing process of thin-film transistor provides for above embodiment, below illustrates the manufacturing process of OLED.
On the basis of the making thin-film transistor that can provide at above-described embodiment, form OLED, described organic light emitting display at least comprises that anode, pixel define layer, luminescent layer and negative electrode.
Shown in Fig. 6 and Fig. 7, the manufacturing process of OLED specifically can comprise the following steps:
S31, on the substrate that is formed with described thin-film transistor, form by having the carbon nano-tube of conductor nature or the anode pattern that grapheme material forms, and described anode is connected with the drain electrode of described thin-film transistor.
Particularly, adopt Sputter deposition techniques one deck ITO or adopt paint-on technique to deposit one deck the carbon nano tube transparent conductive thin-film (or graphene film) with conductor nature, by technology shape anode pattern 42 as shown in Figure 7 such as exposure, development, chemical wet etchings.
S32, on the substrate that is formed with described anode pattern, form pixel and define layer pattern;
Particularly, referring to Fig. 7, on the substrate 1 that is formed with anode 42, adopt paint-on technique to apply one deck resin, use exposure, develop, the technology such as chemical wet etching form pixel and define layer 44, pixel defines the rete that layer 44 surrounds pixel region, prevents the luminescent layer colour mixture of adjacent pixel regions different colours.
S33, on the substrate that is formed with described pixel and defines layer pattern, form luminescent layer figure.
Particularly, referring to Fig. 7, use paint-on technique or evaporation coating technique to make luminescent layer (as quinolinones), then form luminescent layer 43 figures by composition technique; Preferably, hole transmission layer and electron transfer layer can also be made, or further electronic barrier layer and hole blocking layer can also be made; For example use paint-on technique or evaporation coating technique and composition technique to make hole transmission layer 45, electronic barrier layer (not shown in Fig. 7), luminescent layer 43, hole blocking layer (not shown in Fig. 7) and electron transfer layer 46 above pixel defines layer 44;
S34, on the substrate that is formed with described luminescent layer figure, form and be positioned on luminescent layer by thering is the carbon nano-tube of conductor nature or the cathode pattern that grapheme material forms.
Particularly, adopt Sputter technology above organic luminous layer, to form ITO or adopt paint-on technique deposition one deck to there is the carbon nano tube transparent conductive thin-film (or graphene film) of conductor nature, form the figure of the negative electrode 41 shown in Fig. 7 by composition technique, negative electrode is via via hole (in figure do not indicate) be connected with minus earth power supply (not indicating in figure) and anodic formation electric field, and driving luminescent layer is luminous.
The above-mentioned array base palte that the utility model embodiment provides, in organic luminescent device OLED, negative electrode and anode one of are at least made up of carbon nano-tube or the grapheme material with conductor nature, present long-range order arrangement owing to forming the atom of carbon nano-tube or Graphene, show good electric conductivity, existing metal or metal oxide negative electrode 41 and the anode 42 as OLED of comparing, the electric conductivity of carbon nano-tube or Graphene is better, the carrier transport rate of OLED is higher, is conducive to improve the luminescent properties of OLED.
Preferably, the process of above-mentioned steps S31 formation anode pattern is specifically as follows:
On the substrate that is formed with described thin-film transistor, form successively and comprise thering is the conductive film layer of reflection action and be positioned on this conductive film layer by thering is the carbon nano-tube of conductor nature or the conductive film layer that grapheme material forms;
On the substrate that is formed with above-mentioned conductive film layer, form described anode pattern by composition technique.
Particularly, referring to Fig. 7, adopt Sputter technology sputter one deck conductive film layer in source electrode 33 and drain electrode 34, for example, by the Mo(molybdenum with reflection action), Al(aluminium) or molybdenum aluminium alloy form rete, then by Sputter deposition techniques one deck ITO or employing paint-on technique deposition one deck carbon nano tube transparent conductive thin-film (or graphene film), by exposure, develop, the technology shapes such as chemical wet etching anode 42 figures as shown in Figure 7, anode 42 comprises the conductive film layer as reflection action being positioned in drain electrode 34, and be positioned at the carbon nano-tube with conductor nature or the transparent graphene conductive film on conductive film layer.
Preferably, the process of above-mentioned steps S34 formation negative electrode is specially:
On the substrate that is formed with described luminescent layer figure form be positioned on luminescent layer, have reflection action conductive film layer and be positioned on this conductive film layer by thering is the carbon nano-tube of conductor nature or the conductive film layer that grapheme material forms;
On the substrate that is formed with above-mentioned conductive film layer, form described organic light-emitting device cathode pattern by composition technique.
Particularly, adopt Sputter technology on the substrate that is formed with luminescent layer figure, to be positioned at sputter one deck conductive film layer on luminescent layer, for example, by the Mo(molybdenum with reflection action), Al(aluminium) or the rete etc. that forms of molybdenum aluminium alloy, then by Sputter deposition techniques one deck ITO(Indium Tin Oxides, indium tin oxide) rete or employing paint-on technique deposition one deck carbon nano tube transparent conductive thin-film (or graphene film), by exposure, develop, the technology shapes such as chemical wet etching negative electrode 42 figures as shown in Figure 7, negative electrode 42 comprises the conductive film layer as reflection action being positioned on luminescent layer, and be positioned at carbon nano-tube or the transparent graphene conductive film on conductive film layer.
The anode of the OLED that above-described embodiment provides adopts double-deck conductive film layer, be that opaque conductive film layer combines with transparent conductive film layer, by effective the anode of TFT substrate and organic illuminating element combination, can reduce anode wiring and TFT underlay pattern to the blocking of a part of light, improve light-emitting area; And anode electrode employing is the design of double-level-metal, be that opaque metal combines with transparent conductive film, can effectively utilize the light of anode reflection, make reverberation pass through organic luminous layer, cause the luminous organic material of luminescent layer to realize luminescence generated by light, further improved organic light-emitting device luminous efficiency and brightness.Transparent conductive film layer can play a protective role to the conductive film layer of reflection action.Because OLED further improves the utilance of light, make in OLED to improve from the electronics of negative electrode with from the injection efficiency in the hole of anode, and then improved luminous efficiency and the display quality of image of organic electroluminescence display panel.
It should be noted that; the process of making above-mentioned OLED can also comprise: forming the peripheral protective layer that covers whole substrate on described negative electrode; for example use resin-coating technology to apply one deck resin; then carry out composition technique and form the peripheral protective layer of corresponding region, prevent the air water destruction of impurity to pixel electrode and/or luminous organic matter of grading.
And the thin-film transistor manufacture method that the utility model embodiment provides, mainly form each rete by sputter or coating and composition technique, technological process is simple, requirement to equipment is lower, the equipment of non-crystalline silicon tft is prepared in employing just can make the TFT with higher carrier mobility, can reduce the cost of manufacture of product.
In the utility model, composition technique, can only include photoetching process, or, comprise photoetching process and etch step, can also comprise printing, ink-jet etc. other are used to form the technique of predetermined pattern simultaneously; Photoetching process, refers to that utilize photoresist, mask plate, the exposure machine etc. of technical processs such as comprising film forming, exposure, development form the technique of figure.Can be according to the corresponding composition technique of the structure choice forming in the utility model.
Obviously, those skilled in the art can carry out various changes and modification and not depart from spirit and scope of the present utility model the utility model.Like this, if within of the present utility model these are revised and modification belongs to the scope of the utility model claim and equivalent technologies thereof, the utility model is also intended to comprise these changes and modification interior.
Claims (10)
1. a thin-film transistor, is characterized in that, at least comprises active layer, and described active layer is made up of the grapheme material that has the carbon nano-tube material of semiconductor property or have a semiconductor property; Also comprise and be positioned at the first conductive layer and the second conductive layer that the upper and lower both sides of described active layer contact with active layer; Described the first conductive layer and the second conductive layer are made up of the secondary electron emission layer with electron multiplication function.
2. thin-film transistor according to claim 1, is characterized in that, described in there is electron multiplication function secondary electron emission layer formed by metal oxide or metallo-organic compound material.
3. thin-film transistor according to claim 1, is characterized in that, the thickness of described the first conductive layer is 40-50nm, and the thickness of described the second conductive layer is 40-50nm.
4. thin-film transistor according to claim 1, is characterized in that, described in there is semiconductor property carbon nano-tube be oxide/carbon nanometer tube, described in there is semiconductor property Graphene be hydrogen Graphene.
5. according to the thin-film transistor described in the arbitrary claim of claim 1-4, it is characterized in that, also comprise source electrode and drain electrode, described source electrode and drain electrode are made up of carbon nano-tube or the grapheme material with conductor nature; Described the second conductive layer between described source electrode and drain electrode and described active layer and with described source electrode and drain electrode corresponding setting.
6. an array base palte, comprises substrate and is arranged at the multiple pixel cells that are matrix distribution on described substrate, it is characterized in that, described each pixel cell comprises the thin-film transistor described in the arbitrary claim of claim 1-5.
7. array base palte according to claim 6, it is characterized in that, described array base palte also comprises the organic luminescent device that is positioned at each pixel cell, described organic luminescent device at least comprises negative electrode, anode and the luminescent layer between negative electrode and anode that lamination arranges, and described anode is connected with the drain electrode in described thin-film transistor;
Wherein, described negative electrode and anode one of are at least made up of carbon nano-tube or the grapheme material with conductor nature.
8. array base palte according to claim 7, is characterized in that, described anode also comprises the conductive film layer with reflection action with the setting of described anode lamination; And/or
Described negative electrode also comprises the conductive film layer with reflection action with the setting of described negative electrode lamination.
9. according to the array base palte described in the arbitrary claim of claim 6-8, it is characterized in that, described substrate is flexible base, board.
10. an organic electroluminescence display panel, is characterized in that, comprises the array base palte described in the arbitrary claim of claim 6-9.
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| CN103762247A (en) * | 2014-01-10 | 2014-04-30 | 北京京东方光电科技有限公司 | Thin film transistor, manufacturing method for thin film transistor, array substrate and organic light-emitting display panel |
| CN105655406A (en) * | 2016-03-01 | 2016-06-08 | 京东方科技集团股份有限公司 | Carbon nano tube thin film transistor and manufacturing method thereof |
| CN107146805A (en) * | 2017-05-09 | 2017-09-08 | 深圳市华星光电技术有限公司 | Array base palte and display device |
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