CN102693910A - Dry etching method for grooves - Google Patents
Dry etching method for grooves Download PDFInfo
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- CN102693910A CN102693910A CN2011100701027A CN201110070102A CN102693910A CN 102693910 A CN102693910 A CN 102693910A CN 2011100701027 A CN2011100701027 A CN 2011100701027A CN 201110070102 A CN201110070102 A CN 201110070102A CN 102693910 A CN102693910 A CN 102693910A
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- groove
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- etching
- grooves
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Abstract
The invention discloses a dry etching method of grooves, which repairs openings of the side walls of the grooves by applying a selective epitaxy technology after grooves are formed by the dry etching method. The method of the present invention repairs the side openings due to etching by applying the selective epitaxy technology after the etching of grooves.
Description
Technical field
The present invention relates to a kind of dry etch process of groove.
Background technology
Silicon through hole (through silicon via) technology is a kind of emerging ic manufacturing process, is suitable as many-sided performance and promotes, and is used for WLAN and mobile phone intermediate power amplifier, with frequency characteristic that improves circuit greatly and power characteristic.The circuit that the silicon via process will be produced on the silicon chip upper surface is connected to the silicon chip back side through the metal of filling in the silicon through hole; In conjunction with three-dimension packaging technology; Make the IC layout from conventional two-dimensional be arranged side by side develop into more advanced three-dimensional stacked; Component package is more compact like this, and the chip lead distance is shorter, thereby can improve the frequency characteristic and the power characteristic of circuit greatly.
During the silicon via process is made, need in silicon substrate, produce and have very big depth-to-width ratio the deep hole or the deep trench of (have even reach 50～75) through advanced person's etching technics, the deep hole or the deep trench degree of depth be roughly 100 microns or more than.This deep hole or deep trench are to obtain through dry etch process; Because depth-to-width ratio is excessive; Behind dry etching, have the problem (see figure 1) of lateral openings (undercut); Lateral openings exists between before-metal medium layer (PMD) and the silicon through hole, and lateral openings can cause follow-up metal charge can't fill up the silicon through hole.
Summary of the invention
The technical problem that the present invention will solve provides a kind of dry etching method of groove, and this method can be repaired the lateral openings problem that dry etching brings.
For solving the problems of the technologies described above, the dry etching method of groove of the present invention for after dry etching forms groove, adopts selective epitaxial process to repair the opening of trenched side-wall.
The present invention is through calculating the size of lateral openings after forming groove or through hole at dry etching; Carry out the selective epitaxial compensation according to the lateral openings amount then; Before-metal medium layer in epitaxial process (oxide-film) can stop the growth of monocrystalline silicon at silicon chip surface, and each direction is with duration monocrystalline silicon in the silicon through hole, and the thickness of monocrystalline silicon length is consistent or bigger with the lateral openings amount; Can effectively reduce the size of lateral openings through this technology, increase the window of follow-up metal filled technology.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the present invention is done further detailed explanation:
Fig. 1 forms the back structural representation for the groove of existing technology;
Fig. 2 is the structural representation after groove forms in the employing method of the present invention;
Fig. 3 is one embodiment of the invention schematic flow sheet.
Embodiment
The dry etching method of groove of the present invention behind the formation of etching in silicon substrate groove, adopts the selective silicon epitaxial growth technology, forms a repair layer at trenched side-wall, with the lateral openings that forms in the compensation etching.
In one embodiment, the etching groove process comprises the steps (see figure 3).
Adopt photoetching process on silicon substrate, to define the position and the size of groove earlier.Before this, be deposited with silicon oxide layer on the silicon substrate usually.Photoetching process is included in resist coating on the silicon substrate, adopts the lithography mask version exposure, develops and form the photoresist figure in the back.In practical implementation, the thickness of photoresist will be tried one's best enough thick in keeping out follow-up dry etching.Photoresist thickness is generally more than 3 microns.
Be the etch mask layer then with the photoresist, the etching oxidation silicon layer.Etching adopts dry etch process usually.In the practical implementation, can adopt oxide-film that photoresist is selected than high dry etching condition, enough process windows are provided to give follow-up deep trench dry etching.
Then the etch silicon substrate-like becomes groove.Because the depth-to-width ratio of groove is big (can reach more than 50), general single step stable state dry etching is difficult to realize, adopts multistep deposit etching alternate cycles dry etching method (BOSCH) to come etching to form deep trench at present usually.The depth-to-width ratio of groove greater than 50 or bigger in, between silicon oxide layer and silicon face, can form lateral openings, promptly the trench lateral size that forms of etching is greater than the opening size of photoresist.May not complete filling in follow-up metal deposit.
Then remove the polymer that is produced in remaining photoresist and the etching process.This step mainly is to remove the polymer left over behind the dry etching and residual photoresist.Through adopting wet-etching technology, and cleaning up of in this step, will trying one's best, to increase the process window of follow-up extension.
Adopt the selective silicon epitaxy technique at last, in trench wall silicon growth layer monocrystalline repair layer (see figure 2), with the side direction loss of compensation silicon substrate.Deep trench growth inside one deck monocrystalline silicon promptly with silicon substrate in monocrystalline silicon consistent; The growth thickness of monocrystalline silicon is big or small consistent or bigger with lateral openings; Owing to is selective epitaxial, and oxide film protection is arranged on the silicon substrate, so the surface does not have monocrystalline silicon growing; Have only deep trench inside to have monocrystalline silicon growing, improve follow-up metal filled technological ability with this.The big I of lateral openings is confirmed through section.
This method is applicable to and comprises the silicon via devices, but is not limited only to this device.Also be applicable to all devices that comprises deep trench processes.
Claims (5)
1. the dry etching method of a groove is characterized in that: after dry etching forms groove, adopt selective epitaxial process to repair the opening of trenched side-wall.
2. the method for claim 1 is characterized in that, concrete processing step is:
Step 1 on the silicon oxide layer on the silicon substrate, adopts photoetching process to define the position and the size of groove;
Step 2, etching is removed the said silicon oxide layer that is in the groove position;
Step 3, the said silicon substrate of dry etching forms groove again, removes the polymer that produces in residual photoresist and the etching process;
Step 4 adopts the selective silicon epitaxy technique, forms repair layer at said trench wall.
3. method as claimed in claim 2 is characterized in that: the thickness of silicon single crystal repair layer is by the size decision of said trench lateral opening in the said step 4.
4. method as claimed in claim 2 is characterized in that: in the said step 3, wet clean process is adopted in the removal of photoresist.
5. according to claim 1 or claim 2 method, it is characterized in that: the depth-to-width ratio of said groove is greater than 50.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011100701027A CN102693910A (en) | 2011-03-23 | 2011-03-23 | Dry etching method for grooves |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011100701027A CN102693910A (en) | 2011-03-23 | 2011-03-23 | Dry etching method for grooves |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102693910A true CN102693910A (en) | 2012-09-26 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011100701027A Pending CN102693910A (en) | 2011-03-23 | 2011-03-23 | Dry etching method for grooves |
Country Status (1)
| Country | Link |
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| CN (1) | CN102693910A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105210178A (en) * | 2013-05-15 | 2015-12-30 | 东京毅力科创株式会社 | Plasma etching method and plasma etching device |
| CN114468387A (en) * | 2021-12-30 | 2022-05-13 | 厦门云天半导体科技有限公司 | Silicon-based atomizing core and manufacturing method thereof |
Citations (7)
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| CN1065552A (en) * | 1992-05-11 | 1992-10-21 | 北京大学 | The deep etching technology of silicon |
| US20030005881A1 (en) * | 2001-04-30 | 2003-01-09 | Shin Dong Suk | Method for forming contact plug of semiconductor device |
| JP2004267912A (en) * | 2003-03-07 | 2004-09-30 | Seiko Epson Corp | Method for manufacturing hydrogen-permeable filter, hydrogen-permeable filter and system for supplying hydrogen fuel to fuel cell by using the filter |
| US20050009295A1 (en) * | 2002-03-07 | 2005-01-13 | International Business Machines Corporation | Novel method to achieve increased trench depth, independent of CD as defined by lithography |
| CN1806313A (en) * | 2003-06-17 | 2006-07-19 | 信越半导体株式会社 | Silicon epitaxial wafer manufacturing method and silicon epitaxial wafer |
| CN101308834A (en) * | 2007-05-16 | 2008-11-19 | 台湾积体电路制造股份有限公司 | Integrated circuit construction |
| CN101908500A (en) * | 2010-06-11 | 2010-12-08 | 上海宏力半导体制造有限公司 | Manufacturing method of shallow groove isolation structure |
-
2011
- 2011-03-23 CN CN2011100701027A patent/CN102693910A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1065552A (en) * | 1992-05-11 | 1992-10-21 | 北京大学 | The deep etching technology of silicon |
| US20030005881A1 (en) * | 2001-04-30 | 2003-01-09 | Shin Dong Suk | Method for forming contact plug of semiconductor device |
| US20050009295A1 (en) * | 2002-03-07 | 2005-01-13 | International Business Machines Corporation | Novel method to achieve increased trench depth, independent of CD as defined by lithography |
| JP2004267912A (en) * | 2003-03-07 | 2004-09-30 | Seiko Epson Corp | Method for manufacturing hydrogen-permeable filter, hydrogen-permeable filter and system for supplying hydrogen fuel to fuel cell by using the filter |
| CN1806313A (en) * | 2003-06-17 | 2006-07-19 | 信越半导体株式会社 | Silicon epitaxial wafer manufacturing method and silicon epitaxial wafer |
| CN101308834A (en) * | 2007-05-16 | 2008-11-19 | 台湾积体电路制造股份有限公司 | Integrated circuit construction |
| CN101908500A (en) * | 2010-06-11 | 2010-12-08 | 上海宏力半导体制造有限公司 | Manufacturing method of shallow groove isolation structure |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105210178A (en) * | 2013-05-15 | 2015-12-30 | 东京毅力科创株式会社 | Plasma etching method and plasma etching device |
| CN114468387A (en) * | 2021-12-30 | 2022-05-13 | 厦门云天半导体科技有限公司 | Silicon-based atomizing core and manufacturing method thereof |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HUAHONG NEC ELECTRONICS CO LTD, SHANGHAI Effective date: 20140106 |
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Effective date of registration: 20140106 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201206, Shanghai, Pudong New Area, Sichuan Road, No. 1188 Bridge Applicant before: Shanghai Huahong NEC Electronics Co., Ltd. |
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Application publication date: 20120926 |