CN102687113A - 程序、控制方法以及控制装置 - Google Patents
程序、控制方法以及控制装置 Download PDFInfo
- Publication number
- CN102687113A CN102687113A CN2010800517732A CN201080051773A CN102687113A CN 102687113 A CN102687113 A CN 102687113A CN 2010800517732 A CN2010800517732 A CN 2010800517732A CN 201080051773 A CN201080051773 A CN 201080051773A CN 102687113 A CN102687113 A CN 102687113A
- Authority
- CN
- China
- Prior art keywords
- page
- descriptor
- shared
- software
- read
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/445—Program loading or initiating
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1009—Address translation using page tables, e.g. page table structures
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4418—Suspend and resume; Hibernate and awake
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
- G06F12/1063—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache the data cache being concurrently virtually addressed
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Stored Programmes (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009-261511 | 2009-11-17 | ||
| JP2009261511A JP2011107925A (ja) | 2009-11-17 | 2009-11-17 | プログラム、制御方法、並びに制御装置 |
| PCT/JP2010/053628 WO2011061948A1 (ja) | 2009-11-17 | 2010-03-05 | プログラム、制御方法、並びに制御装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102687113A true CN102687113A (zh) | 2012-09-19 |
Family
ID=44059434
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010800517732A Pending CN102687113A (zh) | 2009-11-17 | 2010-03-05 | 程序、控制方法以及控制装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20120254499A1 (https=) |
| EP (1) | EP2503458A4 (https=) |
| JP (1) | JP2011107925A (https=) |
| CN (1) | CN102687113A (https=) |
| WO (1) | WO2011061948A1 (https=) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108604317A (zh) * | 2016-03-14 | 2018-09-28 | 欧姆龙株式会社 | 可扩展性持有装置 |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102662690B (zh) * | 2012-03-14 | 2014-06-11 | 腾讯科技(深圳)有限公司 | 应用程序启动方法和装置 |
| US9304711B2 (en) * | 2012-10-10 | 2016-04-05 | Apple Inc. | Latency reduction in read operations from data storage in a host device |
| JP6381187B2 (ja) * | 2013-08-09 | 2018-08-29 | キヤノン株式会社 | 情報処理装置、情報処理方法、及びプログラム |
| US9383935B1 (en) * | 2014-12-16 | 2016-07-05 | Vmware, Inc. | Secondary CPU MMU initialization using page fault exception |
| CN106155507A (zh) * | 2015-03-31 | 2016-11-23 | 北京搜狗科技发展有限公司 | 一种页面内容显示方法及电子设备 |
| US11341058B2 (en) * | 2018-07-26 | 2022-05-24 | Vmware Inc. | Handling software page faults using data from hierarchical data structures |
| US12411780B2 (en) | 2023-03-28 | 2025-09-09 | Xilinx, Inc. | Variable buffer size descriptor fetching for a multi-queue direct memory access system |
| US12332801B2 (en) | 2023-03-28 | 2025-06-17 | Xilinx, Inc. | Descriptor cache eviction for multi-queue direct memory access |
| US12259833B2 (en) * | 2023-03-28 | 2025-03-25 | Xilinx, Inc. | Descriptor fetching for a multi-queue direct memory access system |
| US12411785B2 (en) | 2023-03-30 | 2025-09-09 | Xilinx, Inc. | Direct memory access system with read reassembly circuit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006202252A (ja) * | 2004-12-24 | 2006-08-03 | Canon Inc | 電子機器、データ処理方法、及びコンピュータプログラム |
| JP2007334383A (ja) * | 2006-06-12 | 2007-12-27 | Sony Corp | 情報処理装置とその起動方法およびプログラム |
| CN101180612A (zh) * | 2005-03-31 | 2008-05-14 | 日本电气株式会社 | 计算机系统、存储器管理方法及其程序 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0520197A (ja) * | 1991-07-09 | 1993-01-29 | Hitachi Ltd | 記憶管理システム及びマイクロプロセツサ |
| US6694451B2 (en) * | 2000-12-07 | 2004-02-17 | Hewlett-Packard Development Company, L.P. | Method for redundant suspend to RAM |
| US6546472B2 (en) * | 2000-12-29 | 2003-04-08 | Hewlett-Packard Development Company, L.P. | Fast suspend to disk |
| JP2005149225A (ja) * | 2003-11-17 | 2005-06-09 | Sony Corp | コンピュータシステム及びその起動方法 |
| GB0505289D0 (en) * | 2005-03-15 | 2005-04-20 | Symbian Software Ltd | Computing device with automated page based rem shadowing and method of operation |
| GB0507269D0 (en) * | 2005-04-11 | 2005-05-18 | Johnson Matthey Plc | Steam reforming |
| US7523323B2 (en) * | 2005-09-15 | 2009-04-21 | Intel Corporation | Method and apparatus for quick resumption |
| US7519808B2 (en) * | 2006-04-25 | 2009-04-14 | Apple Inc. | Method and apparatus for quickly reanimating devices from hibernation |
| US7620784B2 (en) * | 2006-06-09 | 2009-11-17 | Microsoft Corporation | High speed nonvolatile memory device using parallel writing among a plurality of interfaces |
| JP5289153B2 (ja) * | 2009-04-14 | 2013-09-11 | キヤノン株式会社 | 情報処理装置及びその制御方法、並びにコンピュータプログラム |
-
2009
- 2009-11-17 JP JP2009261511A patent/JP2011107925A/ja active Pending
-
2010
- 2010-03-05 US US13/510,019 patent/US20120254499A1/en not_active Abandoned
- 2010-03-05 EP EP10831347.9A patent/EP2503458A4/en not_active Withdrawn
- 2010-03-05 WO PCT/JP2010/053628 patent/WO2011061948A1/ja not_active Ceased
- 2010-03-05 CN CN2010800517732A patent/CN102687113A/zh active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006202252A (ja) * | 2004-12-24 | 2006-08-03 | Canon Inc | 電子機器、データ処理方法、及びコンピュータプログラム |
| CN101180612A (zh) * | 2005-03-31 | 2008-05-14 | 日本电气株式会社 | 计算机系统、存储器管理方法及其程序 |
| JP2007334383A (ja) * | 2006-06-12 | 2007-12-27 | Sony Corp | 情報処理装置とその起動方法およびプログラム |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108604317A (zh) * | 2016-03-14 | 2018-09-28 | 欧姆龙株式会社 | 可扩展性持有装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2011061948A1 (ja) | 2011-05-26 |
| US20120254499A1 (en) | 2012-10-04 |
| EP2503458A4 (en) | 2013-05-29 |
| JP2011107925A (ja) | 2011-06-02 |
| EP2503458A1 (en) | 2012-09-26 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C05 | Deemed withdrawal (patent law before 1993) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20120919 |