CN102683372A - Small-size CMOS image sensor pixel structure and generation method thereof - Google Patents
Small-size CMOS image sensor pixel structure and generation method thereof Download PDFInfo
- Publication number
- CN102683372A CN102683372A CN2012101436663A CN201210143666A CN102683372A CN 102683372 A CN102683372 A CN 102683372A CN 2012101436663 A CN2012101436663 A CN 2012101436663A CN 201210143666 A CN201210143666 A CN 201210143666A CN 102683372 A CN102683372 A CN 102683372A
- Authority
- CN
- China
- Prior art keywords
- buried regions
- type
- layer
- image sensor
- diffusion coefficient
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
The invention relates to a complementary metal oxide semiconductor (CMOS) solid image sensor, and provides a small-size CMOS image sensor pixel photodiode structure, which ensures that an optimized small pixel unit can increase full-trap capacity under the condition of no increase of dark current, therefore dynamic range, signal to noise ratio and the like are indirectly increased, and the optimal design of the small pixel unit is completed. In order to achieve the purpose, the technical scheme adopted by the invention is as follows:, according to the small-size CMOS image sensor pixel photodiode structure, a pixel photodiode is formed by injecting a shallower N type region buried layer on a P type epitaxial layer, an N type region is of a U type buried layer structure formed by homotype impurities with larger diffusion coefficients, the middle of the U type buried layer structure is provided with homotype impurities with smaller diffusion coefficients; and an impurity injection layer with a larger diffusion coefficient completely buries an impurity injection layer with smaller diffusion coefficient. The invention is mainly used for designing and manufacturing the CMOS solid image sensor.
Description
Technical field
The present invention relates to complementary oxide semiconductor (CMOS) solid state image sensor of metal, specifically, relate to the photoelectric diode structure of undersized cmos image sensor pixel.
Background technology
Imageing sensor is the semiconductor device that incident optical signal is converted into the signal of telecommunication.They are different according to operation principle, mainly are divided into two types: electric charge coupled mode imageing sensor (Charge Coupled Device) and cmos image sensor (complementary metal-oxide-semiconductor).In recent years; Benefit from the quick progress of standard CMOS process and the continuous minimizing of characteristic size; Cmos image sensor can be integrated in on the chip piece with more digital-to-analog circuit, has realized low-power consumption, low cost; The advantage that ccd image sensors such as high integration are incomparable, this has also promoted the develop rapidly of cmos image sensor in recent years.
Cmos image sensor is by pel array, analog front circuit, and D/A conversion unit and sequential control circuit are formed jointly.But what in the entire image sensor architecture, be in core status is pixel unit array.It is as the basic photosensitive unit of cmos image sensor; Mainly be divided into active pixel and passive pixel by operation principle; Can be divided into three pipe active pixels (3T-APS), clamp diode four pipe active pixels (4T-APS), clamp diode five pipe active pixels (5T-APS) by integrated level, wherein 4T-APS is the main flow in market.Traditional 4T-APS cross-section structure is as shown in Figure 1, and 4T-APS is by a photodiode (180,200,110), and floating empty diffusion node 160, transfer tube 170, reset transistor 150, source class follower 140 and address strobe pipe 130 are formed jointly.The photobehavior of pixel is to a great extent by these six size of devices structures and technological parameter decision; Especially receive the dimensional structure and the effects of process parameters of photodiode and transfer tube maximum, it will fundamentally influence the quality of the final imaging performance of entire image transducer.
Tradition 4T active pixel photodiode is by on P type epitaxial loayer 110, injecting a N buried regions 200; The high-concentration dopant P+ clamper layer 190 that forms with the surface constitutes with extension 110 jointly, is used to receive the incident photon 111 that is mapped to image sensor surface and produces the signal charge corresponding with the incident light light intensity.Though this structure is main flow when design large scale pixel; But if use this photoelectric diode structure design small-sized pixel; Minimizing along with characteristic size in the standard CMOS process; Each pixel cell area will reduce, and the direct influence of this effect is that the electric charge collecting region area also can reduce thereupon, will cause the minimizing of the full trap capacity of pixel cell.Shortcomings such as under the small-sized pixel, the reducing of full trap capacity will cause the dynamic range of imageing sensor to reduce, the influence of dark current in small pixel will be increasing, signal to noise ratio is on the low side have a strong impact on the imaging effect of small pixel imageing sensor.So, how under small size technology, to design the physical dimension and the technological parameter of charge collection region, make imageing sensor have the small-sized pixel of high full trap capacity, low-dark current, high s/n ratio, HDR simultaneously, just become particularly important.
In recent years, for reducing deficiencies such as the trap capacity is not enough and little by it dynamic range of bringing under the small pixel, signal to noise ratio is low, a kind of notion that adopts the multistep ion to inject formation layering PD structure was suggested, and its structure is as shown in Figure 2.In this hierarchy, an only N type injection region is separated by the P+ of high concentration insertion layer 210 in the traditional PD structure, is inserted layer whole N type doped region of cutting apart 200 by P+ and accomplishes doping by single a kind of N type impurity.In this PD hierarchy, whole N type zone be in fact an opening left, the U type buried structure that constitutes by a kind of impurity, itself and P insert layer 210 and play the effect of collecting signal charge jointly.Adopt the PD of this hierarchy, when the design small-sized pixel, insert layer 210,, finally have bigger full trap capacity the zone that this possibly can't exhaust fully in photodiode 200 kernels is exhausted fully owing to introduced the heavily doped P+ type of this layer.Obviously this is through making unspent zone exhaust the effect that reaches " activation " fully, promptly improving degree of exhaustion and let more zone can be used to collect light induced electron.But it is pointed out that when N buried regions 200 exhausts fully, increase full hydrazine with no longer valid with the method again.Other approach can increase full trap capacity: the total amount that we also can be exhausted through the concentration that increases whole N buried regions 200 increases full trap capacity.But this method will certainly increase the doping content of the N buried regions 200 that contacts with surperficial P type clamper layer 190, thereby increases the dark current that produces at the interface at si-sio2 indirectly, finally can increase various noises, and seriously reduce signal to noise ratio.In sum, promptly improve the factor---doping content that a mutual restriction is arranged between full trap capacity and minimizing dark current, the increase signal to noise ratio.How to avoid this mutual restriction factor, under the situation that dark current is increased, improve indexs such as full trap capacity, dynamic range, signal to noise ratio simultaneously, this will be the major issue that needs to be resolved hurrily in the small pixel design.
Summary of the invention
The present invention is intended to overcome the deficiency of prior art, and a kind of photoelectric diode structure of undersized cmos image sensor pixel is provided, and makes that the small pixel unit after optimizing can increase full trap capacity under the situation that does not increase dark current; Increase dynamic range, signal to noise ratio etc. indirectly thereby accomplish, accomplish the optimal design of pixel cell under the small pixel, for achieving the above object; The technical scheme that the present invention takes is; A kind of small size cmos image sensor dot structure, it is outer to constitute photodiode N buried regions by a kind of extrinsic semiconductor, constitutes photodiode N buried regions internal layer by another kind of extrinsic semiconductor; The extrinsic semiconductor that constitutes photodiode N buried regions internal layer is bigger than the concentration that constitutes the outer extrinsic semiconductor of N buried regions, diffusion coefficient is little; The internal layer of N buried regions is shaped as opening U type left, is mixed to inject by the P type and form P insertion layer in U type middle part, and P inserts layer scope left side and starts from the photodiode area left border; Maximum distance transfer tube X place, right side; X scope maximum is not more than overall optical electric diode N buried regions width, and minimum value trends towards zero but all the time greater than zero, the whole embeddings of internal layer of the outer N buried regions of N buried regions.
The extrinsic semiconductor that diffusion coefficient is bigger is a phosphorus, and the less extrinsic semiconductor of diffusion coefficient is an arsenic.
The proportional variation of described dot structure size constitutes big pixel cmos image sensor dot structure.
A kind of small size cmos image sensor dot structure generation method; Comprise the following steps: to select to use different phosphorus P of diffusion coefficient and arsenic AS to form the N buried regions jointly; When the first step is injected, use the bigger phosphorus of diffusion coefficient to inject and form N buried regions skin, its second step of concentration ratio arsenic implantation concentration is little, and second step is when forming the arsenic implanted layer; Its concentration ratio first step phosphorus implantation concentration is bigger; The feasible N buried structure that finally reaches the whole embeddings of arsenic implanted layer that diffusion coefficient is less of the bigger phosphorus implanted layer of diffusion coefficient of energy is injected in control simultaneously, and the arsenic implanted layer is the U type, in the middle of the U type, injects the P type and inserts layer.
Said step is refined as: in doping content is 1 * 10
15/ cm
3P type epitaxial loayer in inject low concentration phosphorus form N buried regions layer structure, it injects energy range is 70KeV～220KeV, the doping content scope is 1 * 10
10/ cm3 to 1 * 10
13/ cm
3Reinjecting forms the photodiode N buried regions internal layer of two impurity embeddings than the higher arsenic of the outer concentration of N buried regions, it injects energy range is 70KeV～290KeV, and the doping content scope is 1 * 10
11/ cm3～2.5 * 10
13/ cm
3Use new mask, mask opening scope is that the left side starts from photodiode N buried regions left margin; The right side is a Distance Transmission pipe X distance; In this window ranges, inject the boron difluoride that the P type mixes, finally form P and insert layer; It is 10 kiloelectron-volts～100 kiloelectron-volts that P inserts layer injection energy range, and the doping content scope is 1 * 10
11/ cm3～5 * 10
13/ cm
3, and the final embedded photoelectric diode structure that constitutes jointly by different diffusion coefficient impurity that forms, it is shaped as opening U type left.
Make up if select to use simultaneously the different N type of diffusion coefficient to mix, range of choice is nitrogen, phosphorus, arsenic, antimony, bismuth.
The P type inserts layer opening for to the right, promptly inserts photodiode N buried regions by the left side.
Technical characterstic of the present invention and effect:
The layering of being introduced that constitutes jointly by different diffusion coefficient impurity and the clamp diode of embedded N buried structure, under the constant prerequisite of pixel photosensitive area,
1. the full trap capacity of newly-designed small pixel clamp diode is bigger.Because new construction is made up of two kinds of different impurity of diffusion coefficient jointly, can use the more inside in the arsenic AS injection formation N district of high dose, thereby the full trap capacity that makes new completely trap Capacity Ratio use the phosphorus doping of single low dosage to form fully is bigger.
2. newly-designed small pixel clamp diode dark current is lower than the N buried regions dark current that uses single high dose AS doping to form fully.This embedded AS doped structure phase is high dose AS doped structure (like Fig. 4-1) more completely, though its trap capacity does not have High Concentration of Arsenic AS to mix greatly, the dark current of its generation is little.Because the concentration gradient of whole N buried regions is gradient to the P of low concentration by the AS of height of center concentration, rather than directly the AS with high concentration very is adjacent with P+ clamper layer, and the feasible dark current that is produced is littler.
3. new clamp diode is owing to the vertically stack of p+/n/n+/p/n+/n/p, and the physical depth that new photodiode produces also can increase within the specific limits, thereby increases the depletion region scope to longitudinal direction, can increase the quantum efficiency of long wave spectrum.
4. newly-designed small pixel clamp diode charge transfer speed is faster.Clamp diode N district away from transfer tube TX is exhausted the after-potential reduction by P insertion layer; And it is more than N district AS injection rate near the N district of transfer tube TX away from TX owing to its AS injection rate; So manage the electromotive force of a side near TX higher; The transfer of the light induced electron that has promoted in the N district to collect, improved electric charge from clamp diode N district the transmission speed to FD.
Description of drawings
Fig. 1 tradition 4T-APS pixel cell structure profile.
Fig. 2 layering PPD pixel cell structure profile.
Fig. 3 injects N buried regions schematic diagram and the corresponding dopant profiles curve chart thereof that forms by single a kind of impurity.
The embedded N buried regions PPD structure principle chart and the corresponding concentration profile thereof that constitute jointly by different diffusion coefficient impurity that Fig. 4 the present invention adopts.
Fig. 5 uses layering and the embedded N buried regions PPD pixel cell structure profile after the present invention improves Fig. 2.
Embodiment
The present invention is a kind of based on the structural structure optimization of layering PD, in order to when designing the small pixel imageing sensor, on the basis that does not increase dark current, promotes the method for full trap capacity, dynamic range under the small pixel simultaneously.In conventional P PD and not improved layering PPD structure (Fig. 1 and Fig. 2), N buried regions 200 is to be mixed by single N type of the same race to realize, like phosphorus (P) or arsenic (AS).And,, have higher relatively diffusion coefficient because P is when ion injects for the N buried regions of single Doping Phosphorus (P); It is lower to make the concentration profile that injects the N buried regions that forms be prone to form concentration; The doping content that scope is bigger distributes, i.e. " plat wide type " is shown in Fig. 3 B.And if in order to increase the full trap capacity of small pixel, only mix and inject when forming the N buried regions with the AS of high dose more, can make and inject the concentration curve that forms the N buried regions and be prone to form the big but smaller curve of range of scatter of concentration, i.e. " narrow thin type " is shown in Fig. 3 A.This is because AS in ion implantation process, has relatively low diffusion coefficient.But the AS injection of this high dose can make N buried regions and Si-SiO2 produce bigger dark current, makes the dark current characteristic of pixel cell become poorer.
In the present invention, seeing that AS and the diffusion coefficient of P when ion injects have very big-difference, especially along with temperature is high more, both diffusion coefficient gaps are big more.Like Fig. 4; If select to use simultaneously different (phosphorus) P of diffusion coefficient and (arsenic) AS to form the N buried regions jointly, and when the first step was injected formation arsenic layer 240, dosage was bigger; Second step is when forming phosphorus implanted layer 230; Dosage is less, and the feasible N buried structure that finally reaches (arsenic) AS implanted layer 240 whole embeddings that diffusion coefficient is less of bigger (phosphorus) P implanted layer 230 of diffusion coefficient of energy is injected in control simultaneously, and its feature structure and concentration-depth curve are as shown in Figure 4.Through the N buried regions that different diffusion coefficients of two steps mix and form, can find out that near P (phosphorus) concentration ratio center AS (arsenic) concentration of its N buried regions upper surface and surperficial P type layer 180 contact area is low.Be that the AS implanted layer provides a higher trap capacity; P (phosphorus) implanted layer makes the concentration gradient of whole N buried regions be gradient to the P (phosphorus) of low concentration by the AS of height of center concentration; Rather than directly the AS with high concentration very is adjacent with surperficial P+ type clamper layer, and the feasible dark current that is produced is littler.Simultaneously; The full trap capacity that the double diffusion coefficient impurity that the P type layer that inserts also can be guaranteed to adopt increases can be exhausted fully; Thereby the photoelectric diode structure of guaranteeing this optimization can be used to promote when expiring the trap capacity under the small pixel; Can the optimized dynamic scope, noise is characteristic such as dark current when.
Among the present invention, under the situation that does not increase dark current, design has the small pixel of higher full trap capacity, utilizes structure shown in Figure 4 that layering PPD structure shown in Figure 2 is improved at present.Structure after the improvement is and adopts this embedded layering N buried regions clamper photodiode that is made up of jointly different diffusion coefficient impurity, and figure is as shown in Figure 5 for its new construction.The structure at A-A ' dotted line place is the structure among Fig. 4 among Fig. 5.The N buried regions of overall optical electric diode is made up of the impurity of two kinds of diffusion coefficients jointly, and a kind of is the skin 320 that the phosphorus by low concentration constitutes, and it injects energy range is 70KeV～220KeV, and the doping content scope is 1e10～1e13/cm3; A kind of is the internal layer 220 that the arsenic by higher concentration constitutes, and it is shaped as opening inverted U left, and it injects energy range is 70KeV～290KeV, and the doping content scope is 1e11～2.5e13/cm3.The boron difluoride that N buried regions internal layer is mixed by the P type injects and forms P insertion layer; It injects energy range is 10KeV～100KeV; The doping content scope is 1e11～5e13/cm3; Its Distance Transmission pipe distance is X, and the excursion of X is in theory: greater than 0, smaller or equal to the width of photodiode N buried regions.Here, the distance of X is controlled to be half place of overall optical electric diode N buried regions overall width.Fig. 5 compares layering PPD shown in Figure 2; Because the phosphorus doping of low concentration is adopted on the top that its N buried regions contacts with P+ clamper layer; So under the situation that does not increase dark current, obtained to mix and the raising of the trap capacity that brings, thereby improved important parameters such as dynamic range, signal to noise ratio by high dose arsenic more.
It is because it is general relatively and ripe under the conventional semiconductor manufacturing process that AS that uses among the present invention and P make up as a pair of doping, but it is pointed out that the N type doping combination of other types is suitable for too.Combination has different diffusion coefficients as long as this homotype is mixed, and also is suitable for like the combination of arsenic and bismuth.Simultaneously, nearly all N type doping combination (nitrogen, phosphorus, arsenic, antimony, bismuth) all is suitable for.
The N type impurity of two kinds of different diffusion coefficients that the present invention adopted forms the N buried regions, also can adopt more than three kinds or three kinds the different N type impurity of diffusion coefficient to realize jointly, all belongs to this patent spirit.
The embedded layering PD structure that adopts among the present invention, its opening are left.But it is pointed out that opening direction, also belong to this patent spirit to the right.To the right in the structure, it is greater than 0 that P inserts a layer insertion scope, smaller or equal to photodiode N buried regions width at opening.Direction of insertion is inserted by photodiode N buried regions right side.
The present invention uses under the situation that does not increase dark current, and design has the small pixel of higher full trap capacity.But it is pointed out that if adopt this patented method to design big pixel image sensor and also belong to this patent spirit.
The present invention is to form embedded layering N buried regions clamper photodiode through the impurity that repeatedly injects different diffusion coefficients, the restricting relation of dark current and trap capacity when being used to improve the design small pixel.Its photodiode specific embodiments is:
With reference to shown in Figure 5, be that the phosphorus that injects low concentration on the P type epitaxial loayer 110 of 1e15/cm3 forms N buried regions layer structure 320 in doping content, it injects energy range is 70KeV～220KeV, the doping content scope is 1e10～1e13/cm3; The arsenic of the higher dosage of reinjecting forms the N buried regions 220 of overall optical electric diode, and it injects energy range is 70KeV～290KeV, and the doping content scope is 1e11～2.5e13/cm3.Re-inject the boron difluoride injection formation P insertion layer that the P type mixes, it injects energy range is 10KeV～100KeV, and the doping content scope is 1e11～5e13/cm3.The final embedded photoelectric diode structure that constitutes jointly by different diffusion coefficient impurity that forms, it is shaped as opening inverted U left.
Specifically introduce preferred forms below in conjunction with embodiment:
At boron doping concentration is on the P type epitaxial loayer of 1e15/cm3, and twice injection N type impurity forms the N district of photodiode jointly.When injecting for the first time, use the traditional PD reticle, implanted dopant is a phosphorus, and its energy is 200KeV, and dosage is 0.5e12/cm3, in order to form the N buried regions 320 of low concentration; The same traditional PD reticle of using of second step, implanted dopant is an arsenic, and its energy is 170KeV, and dosage is 1.5e12/cm3, in order to form the embedded N buried regions of overall optical electric diode part 220; The 3rd step injected and forms P type insertion layer 210, needed to use a new reticle, and it is arranged in the position of Distance Transmission pipe X distance, and implanted dopant is a boron difluoride, and the injection energy is 110KeV, and dosage is the injection that 1e13/cm3 accomplishes P insertion layer.Inject to form P+ clamper layer at last, use be the traditional PD reticle, the injection energy is 35KeV, dosage is 1e13/cm3.
Adopt above technological parameter can realize structural structure optimization,, realize that simultaneously design has higher full trap capacity, the more design of the small pixel image sensor pixel cells of great dynamic range in order on the basis that does not increase dark current based on layering PD.
Claims (7)
1. small size cmos image sensor dot structure; It is characterized in that it is outer to constitute photodiode N buried regions by a kind of extrinsic semiconductor, constitutes photodiode N buried regions internal layer by another kind of extrinsic semiconductor; The extrinsic semiconductor that constitutes photodiode N buried regions internal layer is bigger than the outer extrinsic semiconductor concentration of formation N buried regions, diffusion coefficient is little; The internal layer of N buried regions is shaped as opening U type left, is mixed to inject by the P type and form P insertion layer in U type middle part, and P inserts layer scope left side and starts from the photodiode area left border; Maximum distance transfer tube X place, right side; X scope maximum is not more than overall optical electric diode N buried regions width, and minimum value trends towards zero but all the time greater than zero, the whole embeddings of internal layer of the outer N buried regions of N buried regions.
2. small size cmos image sensor dot structure as claimed in claim 1 is characterized in that the extrinsic semiconductor that diffusion coefficient is big is a phosphorus, and the extrinsic semiconductor that diffusion coefficient is little is an arsenic.
3. small size cmos image sensor dot structure as claimed in claim 1 is characterized in that, the proportional variation of described dot structure size constitutes big pixel cmos image sensor dot structure.
4. small size cmos image sensor dot structure generation method; It is characterized in that, comprise the following steps: to select to use different phosphorus P of diffusion coefficient and arsenic AS to form the N buried regions jointly, when the first step is injected, use the bigger phosphorus of diffusion coefficient to inject and form N buried regions skin; Its second step of concentration ratio arsenic implantation concentration is little; Second step, its concentration ratio first step phosphorus implantation concentration was bigger when forming the arsenic implanted layer, and the feasible N buried structure that finally reaches the whole embeddings of arsenic implanted layer that diffusion coefficient is less of the bigger phosphorus implanted layer of diffusion coefficient of energy is injected in control simultaneously; The arsenic implanted layer is the U type, in the middle of the U type, injects the P type and inserts layer.
5. dot structure generation method as claimed in claim 4 is characterized in that, said step is refined as: in doping content is 1 * 10
15/ cm
3P type epitaxial loayer in inject low concentration phosphorus form N buried regions layer structure, it injects energy range is 70KeV～220KeV, the doping content scope is 1 * 10
10/ cm3 to 1 * 10
13/ cm
3Reinjecting forms the photodiode N buried regions internal layer of two impurity embeddings than the higher arsenic of the outer concentration of N buried regions, it injects energy range is 70KeV～290KeV, and the doping content scope is 1 * 10
11/ cm3～2.5 * 10
13/ cm
3Use new mask, mask opening scope is that the left side starts from photodiode N buried regions left margin; The right side is a Distance Transmission pipe X distance; In this window ranges, inject the boron difluoride that the P type mixes, finally form P and insert layer; It is 10 kiloelectron-volts～100 kiloelectron-volts that P inserts layer injection energy range, and the doping content scope is 1 * 10
11/ cm3～5 * 10
13/ cm
3, and the final embedded photoelectric diode structure that constitutes jointly by different diffusion coefficient impurity that forms, it is shaped as opening U type left.
6. dot structure generation method as claimed in claim 4 is characterized in that, makes up if select to use simultaneously the different N type of diffusion coefficient to mix, and range of choice is nitrogen, phosphorus, arsenic, antimony, bismuth.
7. dot structure generation method as claimed in claim 4 is characterized in that, the P type inserts layer opening for to the right, promptly inserts photodiode N buried regions by the left side.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201210143666 CN102683372B (en) | 2012-05-10 | 2012-05-10 | Small-size CMOS image sensor pixel structure and generation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201210143666 CN102683372B (en) | 2012-05-10 | 2012-05-10 | Small-size CMOS image sensor pixel structure and generation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102683372A true CN102683372A (en) | 2012-09-19 |
| CN102683372B CN102683372B (en) | 2013-05-22 |
Family
ID=46815050
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201210143666 Expired - Fee Related CN102683372B (en) | 2012-05-10 | 2012-05-10 | Small-size CMOS image sensor pixel structure and generation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102683372B (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103500750A (en) * | 2013-10-21 | 2014-01-08 | 上海华力微电子有限公司 | Structure of active pixel of CMOS (Complementary Metal Oxide Semiconductor) image sensor and manufacturing method thereof |
| CN103716558A (en) * | 2013-12-31 | 2014-04-09 | 上海集成电路研发中心有限公司 | High-dynamic pixel array, pixel units and image sensor |
| CN104134676A (en) * | 2014-07-23 | 2014-11-05 | 中国航天科技集团公司第九研究院第七七一研究所 | Rapid charge transfer pixel structure based on radiation environment application |
| CN107706203A (en) * | 2017-11-10 | 2018-02-16 | 中电科技集团重庆声光电有限公司 | CCD of the big full-well capacity with antibloom structure |
| CN109244097A (en) * | 2018-09-25 | 2019-01-18 | 德淮半导体有限公司 | Imaging sensor and forming method thereof |
| CN109360836A (en) * | 2018-11-30 | 2019-02-19 | 上海华力微电子有限公司 | Improve the cmos image sensor of autoregistration pixel unit full-well capacity |
| CN110649056A (en) * | 2019-09-30 | 2020-01-03 | Oppo广东移动通信有限公司 | Image sensor, camera assembly and mobile terminal |
| CN112563299A (en) * | 2020-12-10 | 2021-03-26 | 成都微光集电科技有限公司 | CMOS image sensor and preparation method thereof |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060001061A1 (en) * | 2004-07-05 | 2006-01-05 | Konica Minolta Holdings, Inc. | Solid-state image-sensing device and camera provided therewith |
| CN1773731A (en) * | 2004-10-15 | 2006-05-17 | 豪威科技有限公司 | Image sensor pixel having photodiode with multi-dopant implantation |
| CN1835245A (en) * | 2005-03-17 | 2006-09-20 | 富士通株式会社 | Image sensor with embedded photodiode region and fabrication method thereof |
| CN100561743C (en) * | 2004-10-12 | 2009-11-18 | 豪威科技有限公司 | Imageing sensor and pixel with non-convex photodiode |
| CN102446939A (en) * | 2010-10-08 | 2012-05-09 | 瑞萨电子株式会社 | Back-side illuminated solid-state imaging device |
-
2012
- 2012-05-10 CN CN 201210143666 patent/CN102683372B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060001061A1 (en) * | 2004-07-05 | 2006-01-05 | Konica Minolta Holdings, Inc. | Solid-state image-sensing device and camera provided therewith |
| CN100561743C (en) * | 2004-10-12 | 2009-11-18 | 豪威科技有限公司 | Imageing sensor and pixel with non-convex photodiode |
| CN1773731A (en) * | 2004-10-15 | 2006-05-17 | 豪威科技有限公司 | Image sensor pixel having photodiode with multi-dopant implantation |
| CN1835245A (en) * | 2005-03-17 | 2006-09-20 | 富士通株式会社 | Image sensor with embedded photodiode region and fabrication method thereof |
| CN102446939A (en) * | 2010-10-08 | 2012-05-09 | 瑞萨电子株式会社 | Back-side illuminated solid-state imaging device |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103500750A (en) * | 2013-10-21 | 2014-01-08 | 上海华力微电子有限公司 | Structure of active pixel of CMOS (Complementary Metal Oxide Semiconductor) image sensor and manufacturing method thereof |
| CN103500750B (en) * | 2013-10-21 | 2016-06-15 | 上海华力微电子有限公司 | The structure of a kind of cmos image sensor active pixel and manufacture method thereof |
| CN103716558A (en) * | 2013-12-31 | 2014-04-09 | 上海集成电路研发中心有限公司 | High-dynamic pixel array, pixel units and image sensor |
| CN103716558B (en) * | 2013-12-31 | 2018-11-09 | 上海集成电路研发中心有限公司 | High dynamic pel array, pixel unit and imaging sensor |
| CN104134676A (en) * | 2014-07-23 | 2014-11-05 | 中国航天科技集团公司第九研究院第七七一研究所 | Rapid charge transfer pixel structure based on radiation environment application |
| CN107706203A (en) * | 2017-11-10 | 2018-02-16 | 中电科技集团重庆声光电有限公司 | CCD of the big full-well capacity with antibloom structure |
| CN107706203B (en) * | 2017-11-10 | 2020-08-14 | 中国电子科技集团公司第四十四研究所 | CCD with large full-well capacity and anti-corona structure |
| CN109244097A (en) * | 2018-09-25 | 2019-01-18 | 德淮半导体有限公司 | Imaging sensor and forming method thereof |
| CN109360836A (en) * | 2018-11-30 | 2019-02-19 | 上海华力微电子有限公司 | Improve the cmos image sensor of autoregistration pixel unit full-well capacity |
| CN110649056A (en) * | 2019-09-30 | 2020-01-03 | Oppo广东移动通信有限公司 | Image sensor, camera assembly and mobile terminal |
| CN112563299A (en) * | 2020-12-10 | 2021-03-26 | 成都微光集电科技有限公司 | CMOS image sensor and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102683372B (en) | 2013-05-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102683372B (en) | Small-size CMOS image sensor pixel structure and generation method thereof | |
| CN102709304B (en) | Photodiode and method for improving full-trap capacity and quantum efficiency of image sensor | |
| TWI225304B (en) | Solid-state image sensing device and camera system using the same | |
| CN103500750B (en) | The structure of a kind of cmos image sensor active pixel and manufacture method thereof | |
| JP3576033B2 (en) | Solid-state imaging device | |
| CN103227183B (en) | A kind of method suppressing back-illuminated cmos image sensors electrical mutual disturbance | |
| KR20040042465A (en) | Cmos image sensor and the method for fabricating thereof | |
| CN104112782B (en) | Anti-crosstalk reverse-U-shaped buried layer photodiode and generation method | |
| KR20010098144A (en) | CMOS image sensor and method for fabricating the same | |
| CN100517651C (en) | Forming method of pixel unit of CMOS image sensor | |
| CN103346161A (en) | Method for improving picture signal quality of overlapping backside illuminated CMOS imaging sensor | |
| TWI451564B (en) | Image sensor having two epitaxial layers and method for making the same | |
| CN102723349B (en) | CMOS (Complementary Metal-Oxide-Semiconductor Transistor) image sensor with isolation layer and manufacturing method thereof | |
| CN109065557A (en) | Back-illuminated cmos image sensors and forming method thereof | |
| CN111584532B (en) | Forming method of vertical gate and CMOS sensor of transfer tube | |
| TW200409351A (en) | Solid-state imaging device and its manufacturing method | |
| CN103311260A (en) | CMOS (complementary metal oxide semiconductor) image sensor, pixel unit of CMOS image sensor, and production method of pixel unit | |
| CN213583789U (en) | Integrated photoelectric sensor | |
| CN102315238A (en) | CMOS (Complementary Metal-Oxide-Semiconductor Transistor) image sensor and forming method thereof | |
| CN105304665A (en) | CMOS image sensor for improving full-well capacity of pixel unit | |
| CN114078889A (en) | Global shutter CMOS image sensor and method of manufacturing the same | |
| CN104992954A (en) | Method for reducing dark current of image sensor | |
| JP2004200192A (en) | Solid state imaging element | |
| CN103872064B (en) | The 4T active pixel of a kind of Flouride-resistani acid phesphatase and preparation method | |
| JP2000294760A (en) | Photodetecting element |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130522 Termination date: 20210510 |