CN102683372B - Small-size CMOS image sensor pixel structure and generation method thereof - Google Patents
Small-size CMOS image sensor pixel structure and generation method thereof Download PDFInfo
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Abstract
The invention relates to a complementary metal oxide semiconductor (CMOS) solid image sensor, and provides a small-size CMOS image sensor pixel photodiode structure, which ensures that an optimized small pixel unit can increase full-trap capacity under the condition of no increase of dark current, therefore dynamic range, signal to noise ratio and the like are indirectly increased, and the optimal design of the small pixel unit is completed. In order to achieve the purpose, the technical scheme adopted by the invention is as follows:, according to the small-size CMOS image sensor pixel photodiode structure, a pixel photodiode is formed by injecting a shallower N type region buried layer on a P type epitaxial layer, an N type region is of a U type buried layer structure formed by homotype impurities with larger diffusion coefficients, the middle of the U type buried layer structure is provided with homotype impurities with smaller diffusion coefficients; and an impurity injection layer with a larger diffusion coefficient completely buries an impurity injection layer with smaller diffusion coefficient. The invention is mainly used for designing and manufacturing the CMOS solid image sensor.
Description
Technical field
The present invention relates to complementary oxide semiconductor (CMOS) solid state image sensor of metal, specifically, relate to the photoelectric diode structure of undersized cmos image sensor pixel.
Background technology
Imageing sensor is incident optical signal to be converted to the semiconductor device of the signal of telecommunication.They are different according to operation principle, mainly are divided into two classes: electric charge coupled mode imageing sensor (Charge Coupled Device) and cmos image sensor (complementary metal-oxide-semiconductor).In recent years, benefit from the quick progress of standard CMOS process and the continuous minimizing of characteristic size, cmos image sensor can be integrated on the same chip with more digital-to-analog circuit, realized low-power consumption, low-cost, the advantage that the ccd image sensors such as high integration are incomparable, this has also promoted the develop rapidly of cmos image sensor in recent years.
Cmos image sensor is by pel array, analog front circuit, and D/A conversion unit and sequential control circuit form jointly.But what be in core status in whole imageing sensor framework is pixel unit array.It is as the basic photosensitive unit of cmos image sensor, mainly be divided into active pixel and passive pixel by operation principle, can be divided into three pipe active pixels (3T-APS), clamp diode four pipe active pixels (4T-APS), clamp diode five pipe active pixels (5T-APS) by integrated level, wherein 4T-APS is the main flow in market.Traditional 4T-APS cross-section structure as shown in Figure 1,4T-APS is by a photodiode (180,200,110), floating empty diffusion node 160, transfer tube 170, reset transistor 150, source class follower 140 and address strobe pipe 130 form jointly.The photobehavior of pixel is to be determined by the dimensional structure of these six devices and technological parameter to a great extent, especially be subjected to dimensional structure and the effects of process parameters of photodiode and transfer tube maximum, it will fundamentally affect the quality of the final imaging performance of whole imageing sensor.
Tradition 4T active pixel photodiode is by inject a N buried regions 200 on P type epitaxial loayer 110, the high-concentration dopant P+ clamper layer 190 and the extension 110 that form with the surface consist of jointly, are used for receiving the incident photon 111 that is mapped to image sensor surface and produce the signal charge corresponding with the incident light light intensity.Although this structure is main flow when design large scale pixel, if but use this photoelectric diode structure design small-sized pixel, minimizing along with characteristic size in standard CMOS process, each pixel cell area will reduce, the direct impact of this effect is that the electric charge collecting region area also can reduce thereupon, will cause the minimizing of the full trap capacity of pixel cell.The shortcomings such as under small-sized pixel, the reducing of full trap capacity will cause the dynamic range of imageing sensor to reduce, the impact of dark current in small pixel will be increasing, signal to noise ratio is on the low side have a strong impact on the imaging effect of small pixel imageing sensor.So, how to design physical dimension and the technological parameter of charge collection region under small size technique, make imageing sensor have simultaneously the small-sized pixel of high full trap capacity, low-dark current, high s/n ratio, high dynamic range, just become particularly important.
In recent years, for reducing the deficiencies such as under small pixel, the trap capacity is inadequate and little by it dynamic range of bringing, signal to noise ratio is low, a kind of concept that adopts the multistep Implantation to form layering PD structure was suggested, and its structure as shown in Figure 2.In this hierarchy, in the traditional PD structure, an only N-type injection region is separated by the P+ insert layer 210 of a high concentration, is completed doping by the whole N-type doped region 200 that the P+ insert layer is cut apart by single a kind of N-type impurity.In this PD hierarchy, whole N-type zone be in fact an opening left, by the U-shaped buried structure that a kind of impurity consists of, itself and P insert layer 210 play the effect of collecting signal charge jointly.Adopt the PD of this hierarchy, when the design small-sized pixel, owing to having introduced the heavily doped P+ type of this layer insert layer 210, will the zone that in photodiode 200 kernels, this possibly can't exhaust fully be exhausted fully, finally have larger full trap capacity.Obviously this is by making unspent zone exhaust to reach the effect of " activation " fully, namely improving degree of exhaustion and allow more zone can be used to collect light induced electron.But it is pointed out that when N buried regions 200 exhausts fully, then increase full hydrazine with no longer valid with the method.Other approach can increase full trap capacity: we also can depleted total amount increase full trap capacity by the concentration that increases whole N buried regions 200.But this method will certainly increase the doping content of the N buried regions 200 that contacts with surperficial P type clamper layer 190, thereby indirectly increases the dark current that produces at the interface at si-sio2, finally can increase various noises, and seriously reduce signal to noise ratio.In sum, i.e. between the full trap capacity of raising and minimizing dark current, increase signal to noise ratio, a mutual restricting factor---doping content is arranged.How to avoid this mutual restraining factors, in the situation that do not make dark current increase indexs such as improving simultaneously full trap capacity, dynamic range, signal to noise ratio, this will be the major issue that needs to be resolved hurrily in the small pixel design.
Summary of the invention
the present invention is intended to overcome the deficiencies in the prior art, a kind of photoelectric diode structure of undersized cmos image sensor pixel is provided, make the small pixel unit after optimization to increase full trap capacity in the situation that do not increase dark current, thereby complete indirect increase dynamic range, signal to noise ratio etc., complete the optimal design of pixel cell under small pixel, for achieving the above object, the technical scheme that the present invention takes is, a kind of small size cmos image sensor dot structure, consist of photodiode N buried regions by a kind of extrinsic semiconductor outer, consist of photodiode N buried regions internal layer by another kind of extrinsic semiconductor, the extrinsic semiconductor that consists of photodiode N buried regions internal layer is larger than the concentration that consists of the outer extrinsic semiconductor of N buried regions, diffusion coefficient is little, the internal layer of N buried regions is shaped as left U-shaped of opening, U-shaped middle part is injected by the doping of P type and is formed the P insert layer, P insert layer scope left side starts from the photodiode area left border, maximum distance transfer tube X place, right side, X scope maximum is not more than whole photodiode N buried regions width, minimum value trends towards zero but all the time greater than zero, the whole embeddings of internal layer of the outer N buried regions of N buried regions.
The extrinsic semiconductor that diffusion coefficient is larger is phosphorus, and the extrinsic semiconductor that diffusion coefficient is less is arsenic.
The proportional variation of described dot structure size consists of large pixel cmos image sensor dot structure.
a kind of small size cmos image sensor dot structure generation method, comprise the following steps: that phosphorus P and arsenic AS that the choice for use diffusion coefficient is different form the N buried regions jointly, use the larger phosphorus of diffusion coefficient to inject when the first step is injected and form N buried regions skin, its concentration ratio second step arsenic implantation concentration is little, when second step forms the arsenic implanted layer, its concentration ratio first step phosphorus implantation concentration is larger, control simultaneously Implantation Energy and make the N buried structure that finally reaches the whole embeddings of arsenic implanted layer that diffusion coefficient is less of the larger phosphorus implanted layer of diffusion coefficient, the arsenic implanted layer is U-shaped, inject P type insert layer in the middle of U-shaped.
Described step is refined as: be 1 * 10 in doping content
15/ cm
3P type epitaxial loayer in inject low concentration phosphorus form N buried regions layer structure, its Implantation Energy scope is 70KeV～220KeV, the doping content scope is 1 * 10
10/ cm3 to 1 * 10
13/ cm
3Reinjecting forms the photodiode N buried regions internal layer of two impurity embeddings than the higher arsenic of the outer concentration of N buried regions, its Implantation Energy scope is 70KeV～290KeV, and the doping content scope is 1 * 10
11/ cm3～2.5 * 10
13/ cm
3Use new mask plate, mask plate opening scope is, the left side starts from photodiode N buried regions left margin, the right side is Distance Transmission pipe X distance, in this window ranges, inject the boron difluoride of P type doping, finally form the P insert layer, P insert layer Implantation Energy scope is 10 kiloelectron-volts～100 kiloelectron-volts, and the doping content scope is 1 * 10
11/ cm3～5 * 10
13/ cm
3, and the final embedded photoelectric diode structure that is jointly consisted of by different diffusion coefficient impurity that forms, it is shaped as left U-shaped of opening.
If select to use simultaneously the different N-type doping of diffusion coefficient to make up, range of choice is nitrogen, phosphorus, arsenic, antimony, bismuth.
P type insert layer opening namely inserts photodiode N buried regions by the left side for to the right.
Technical characterstic of the present invention and effect:
The layering that is jointly consisted of by different diffusion coefficient impurity of introducing and the clamp diode of embedded N buried structure, under the constant prerequisite of pixel photosensitive area,
1. the full trap capacity of newly-designed small pixel clamp diode is larger.Because new construction is made of jointly two kinds of different impurity of diffusion coefficient, can uses the arsenic AS of high dose more to inject the inside that forms N district, thereby make new completely trap Capacity Ratio use the full trap capacity of phosphorus doping formation of single low dosage larger fully.
2. newly-designed small pixel clamp diode dark current is lower than the N buried regions dark current that uses single high dose AS doping to form fully.This embedded AS doped structure phase is high dose AS doped structure (as Fig. 4-1) more completely, although its trap capacity does not have High Concentration of Arsenic AS doping large, the dark current of its generation is little.Because the concentration gradient of whole N buried regions is gradient to the P of low concentration by the AS of center high concentration, rather than directly the AS with high concentration very is adjacent with P+ clamper layer, makes the dark current that produces less.
3. new clamp diode is due to the vertically stack of p+/n/n+/p/n+/n/p, and the physical depth that new photodiode produces also can increase within the specific limits, thereby increases the depletion region scope to longitudinal direction, can increase the quantum efficiency of long wave spectrum.
4. newly-designed small pixel clamp diode electric charge transmission speed is faster.Being exhausted after-potential away from the clamp diode N district of transfer tube TX by the P insert layer reduces, and it is more than the N district AS injection rate away from TX due to its AS injection rate near the N district of transfer tube TX, so the electromotive force near TX pipe one side is higher, promoted the transfer of the light induced electron collected in the N district, improved electric charge from clamp diode N district the transmission speed to FD.
Description of drawings
Fig. 1 tradition 4T-APS pixel cell structure profile.
Fig. 2 layering PPD pixel cell structure profile.
N buried regions schematic diagram and corresponding dopant profiles curve chart thereof that Fig. 3 is formed by single a kind of Impurity injection.
The embedded N buried regions PPD structure principle chart and the corresponding concentration profile thereof that are jointly consisted of by different diffusion coefficient impurity that Fig. 4 the present invention adopts.
Fig. 5 uses layering and the embedded N buried regions PPD pixel cell structure profile after the present invention improves Fig. 2.
Embodiment
The present invention is a kind of based on the structural structure optimization of layering PD, in order to when designing the small pixel imageing sensor, on the basis that does not increase dark current, promotes simultaneously the method for full trap capacity, dynamic range under small pixel.In conventional P PD and not improved layering PPD structure (Fig. 1 and Fig. 2), N buried regions 200 is to be realized by single N-type doping of the same race, as phosphorus (P) or arsenic (AS).And for the N buried regions of single Doping Phosphorus (P), because P when Implantation, has relatively high diffusion coefficient, make the concentration profile that injects the N buried regions that forms easily form concentration lower, the doping concentration distribution that scope is larger, i.e. " plat wide type " is as shown in Fig. 3 B.And if in order to increase the full trap capacity of small pixel, only inject when forming the N buried regions with the AS doping of high dose more, can make and inject the concentration curve that forms the N buried regions and easily form the large but smaller curve of range of scatter of concentration, i.e. " narrow thin type ", as shown in Figure 3A.This is because AS in ion implantation process, has relatively low diffusion coefficient.But the AS injection of this high dose can make N buried regions and Si-SiO2 produce larger dark current, makes the dark current characteristic of pixel cell become poorer.
In the present invention, the diffusion coefficient in view of AS and P when the Implantation has very big-difference, and especially along with temperature is higher, both diffusion coefficient gaps are larger.As Fig. 4, if select to use simultaneously different (phosphorus) P of diffusion coefficient and (arsenic) AS jointly to form the N buried regions, and when the first step is injected formation arsenic layer 240, dosage is larger, when second step forms phosphorus implanted layer 230, dosage is less, controls simultaneously Implantation Energy and makes the N buried structure that finally reaches (arsenic) AS implanted layer 240 whole embeddings that diffusion coefficient is less of larger (phosphorus) P implanted layer 230 of diffusion coefficient, and its feature structure and concentration-depth curve are as shown in Figure 4.By the N buried regions that the different diffusion coefficient doping of two steps form, can find out that near P (phosphorus) concentration ratio center AS (arsenic) concentration of its N buried regions upper surface and surperficial P type layer 180 contact area is low.Be that the AS implanted layer provides a higher trap capacity, P (phosphorus) implanted layer makes the concentration gradient of whole N buried regions be gradient to the P (phosphorus) of low concentration by the AS of center high concentration, rather than directly the AS with high concentration very is adjacent with surperficial P+ type clamper layer, makes the dark current that produces less.Simultaneously, the full trap capacity that the double diffusion coefficient impurity that the P type layer that inserts also can be guaranteed to adopt increases can be completely depleted, when thereby the photoelectric diode structure of guaranteeing this optimization can be used to promote full trap capacity under small pixel, can optimize dynamic range, noise is the characteristic such as dark current when.
In the present invention, in the situation that do not increase dark current, design has the small pixel of higher full trap capacity, now utilizes structure shown in Figure 4 that layering PPD structure shown in Figure 2 is improved.Structure after improvement is and adopts this embedded layering N buried regions clamper photodiode that jointly is made of different diffusion coefficient impurity, and its new construction figure as shown in Figure 5.In Fig. 5, the structure at A-A ' dotted line place is the structure in Fig. 4.The N buried regions of whole photodiode is made of jointly the impurity of two kinds of diffusion coefficients, and a kind of is the skin 320 that the phosphorus by low concentration consists of, and its Implantation Energy scope is 70KeV～220KeV, and the doping content scope is 1e10～1e13/cm3; A kind of is the internal layer 220 that the arsenic by higher concentration consists of, and it is shaped as opening inverted U left, and its Implantation Energy scope is 70KeV～290KeV, and the doping content scope is 1e11～2.5e13/cm3.N buried regions internal layer forms the P insert layer by the boron difluoride injection of P type doping, its Implantation Energy scope is 10KeV～100KeV, the doping content scope is 1e11～5e13/cm3, its Distance Transmission pipe distance is X, the excursion of X is in theory: greater than 0, less than or equal to the width of photodiode N buried regions.Herein, the distance of X is controlled to be half place of whole photodiode N buried regions overall width.Fig. 5 compares layering PPD shown in Figure 2, because the upper part that its N buried regions contacts with P+ clamper layer adopts the phosphorus doping of low concentration, so in the situation that do not increase the raising that dark current has obtained the trap capacity that brought by the doping of high dose arsenic more, thereby improve the important parameters such as dynamic range, signal to noise ratio.
The AS that uses in the present invention is because it is relative general and ripe under existing semiconductor fabrication process as a pair of doping combination with P, but it is pointed out that the N-type doping combination of other types is applicable too.As long as this homotype doping combination has different diffusion coefficients, also be suitable for as the combination of arsenic and bismuth.Simultaneously, nearly all N-type doping combination (nitrogen, phosphorus, arsenic, antimony, bismuth) all is suitable for.
The N-type impurity of two kinds of different diffusion coefficients of the present invention forms the N buried regions, also can adopt more than three kinds or three kinds the different N-type impurity of diffusion coefficient jointly to realize, all belongs to this patent spirit scope.
The embedded layering PD structure that adopts in the present invention, its opening are left.But it is pointed out that opening direction, also belong to this patent spirit scope to the right.To the right in structure, P insert layer insertion scope is greater than 0, less than or equal to photodiode N buried regions width at opening.Direction of insertion is by the right side insertion of photodiode N buried regions.
The present invention uses in the situation that do not increase dark current, and design has the small pixel of higher full trap capacity.If but it is pointed out that adopting this patented method to design large pixel image sensor also belongs to this patent spirit scope.
The present invention is to form embedded layering N buried regions clamper photodiode by the impurity that repeatedly injects different diffusion coefficients, the restricting relation of dark current and trap capacity when being used for improving the design small pixel.Its photodiode specific embodiments is:
With reference to shown in Figure 5, be that the phosphorus that injects low concentration on the P type epitaxial loayer 110 of 1e15/cm3 forms N buried regions layer structure 320 in doping content, its Implantation Energy scope is 70KeV～220KeV, the doping content scope is 1e10～1e13/cm3; The arsenic of the higher dosage of reinjecting forms the N buried regions 220 of whole photodiode, and its Implantation Energy scope is 70KeV～290KeV, and the doping content scope is 1e11～2.5e13/cm3.The boron difluoride that re-injects the doping of P type injects and forms the P insert layer, and its Implantation Energy scope is 10KeV～100KeV, and the doping content scope is 1e11～5e13/cm3.The final embedded photoelectric diode structure that is jointly consisted of by different diffusion coefficient impurity that forms, it is shaped as opening inverted U left.
Specifically introduce preferred forms below in conjunction with embodiment:
Be on the P type epitaxial loayer of 1e15/cm3 at boron doping concentration, twice injection N-type impurity forms the N district of photodiode jointly.When injecting for the first time, use the traditional PD reticle, implanted dopant is phosphorus, and its energy is 200KeV, and dosage is 0.5e12/cm3, in order to form the N buried regions 320 of low concentration; Second step uses the traditional PD reticle equally, and implanted dopant is arsenic, and its energy is 170KeV, and dosage is 1.5e12/cm3, in order to form the embedded N buried regions of whole photodiode part 220; The 3rd step injected and forms P type insert layer 210, needed to use a new reticle, and it is arranged in the position of Distance Transmission pipe X distance, and implanted dopant is boron difluoride, and Implantation Energy is 110KeV, and dosage is the injection that 1e13/cm3 completes the P insert layer.Inject to form at last P+ clamper layer, use be the traditional PD reticle, Implantation Energy is 35KeV, dosage is 1e13/cm3.
Adopt above technological parameter can realize the structural structure optimization based on layering PD, in order on the basis that does not increase dark current, realize that simultaneously design has higher full trap capacity, the more design of the small pixel image sensor pixel cells of great dynamic range.
Claims (6)
1. small size cmos image sensor dot structure, it is characterized in that, consist of photodiode N buried regions by a kind of extrinsic semiconductor outer, consist of photodiode N buried regions internal layer by another kind of extrinsic semiconductor, the extrinsic semiconductor that consists of photodiode N buried regions internal layer is larger than consisting of the outer extrinsic semiconductor concentration of N buried regions, diffusion coefficient is little, the internal layer of N buried regions is shaped as left U-shaped of opening, U-shaped middle part is injected by the doping of P type and is formed the P insert layer, P insert layer scope left side starts from the photodiode area left border, maximum distance transfer tube X place, right side, X scope maximum is not more than whole photodiode N buried regions width, minimum value trends towards zero but all the time greater than zero, the whole embeddings of internal layer of the outer N buried regions of N buried regions.
2. small size cmos image sensor dot structure as claimed in claim 1, is characterized in that, the extrinsic semiconductor that diffusion coefficient is large is phosphorus, and the extrinsic semiconductor that diffusion coefficient is little is arsenic.
3. small size cmos image sensor dot structure as claimed in claim 1, is characterized in that, the proportional variation of described dot structure size consists of large pixel cmos image sensor dot structure.
4. small size cmos image sensor dot structure generation method, it is characterized in that, comprise the following steps: that phosphorus P and arsenic AS that the choice for use diffusion coefficient is different form the N buried regions jointly, use the larger phosphorus of diffusion coefficient to inject when the first step is injected and form N buried regions skin, its concentration ratio second step arsenic implantation concentration is little, when second step forms the arsenic implanted layer, its concentration ratio first step phosphorus implantation concentration is larger, control simultaneously Implantation Energy and make the N buried structure that finally reaches the whole embeddings of arsenic implanted layer that diffusion coefficient is less of the larger phosphorus implanted layer of diffusion coefficient, the arsenic implanted layer is U-shaped, inject P type insert layer in the middle of U-shaped, P type insert layer left side starts from photodiode N buried regions left margin, P type insert layer right side is Distance Transmission pipe X distance, the excursion of X is: greater than 0, width less than or equal to photodiode N buried regions.
5. dot structure generation method as claimed in claim 4, is characterized in that, described step is refined as: be 1 * 10 in doping content
15/ cm
3P type epitaxial loayer in inject low concentration phosphorus form N buried regions layer structure, its Implantation Energy scope is 70KeV～220KeV, the doping content scope is 1 * 10
10/ cm3 to 1 * 10
13/ cm
3Reinjecting forms the photodiode N buried regions internal layer of two impurity embeddings than the higher arsenic of the outer concentration of N buried regions, its Implantation Energy scope is 70KeV～290KeV, and the doping content scope is 1 * 10
11/ cm3～2.5 * 10
13/ cm
3Use new mask plate, mask plate opening scope is, the left side starts from photodiode N buried regions left margin, the right side is Distance Transmission pipe X distance, in this window ranges, inject the boron difluoride of P type doping, finally form the P insert layer, P insert layer Implantation Energy scope is 10 kiloelectron-volts～100 kiloelectron-volts, and the doping content scope is 1 * 10
11/ cm3～5 * 10
13/ cm
3, and the final embedded photoelectric diode structure that is jointly consisted of by different diffusion coefficient impurity that forms, it is shaped as left U-shaped of opening.
6. dot structure generation method as claimed in claim 4, is characterized in that, uses simultaneously the different N-type doping combination of diffusion coefficient, and range of choice is nitrogen, phosphorus, arsenic, antimony, bismuth.
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| CN103716558B (en) * | 2013-12-31 | 2018-11-09 | 上海集成电路研发中心有限公司 | High dynamic pel array, pixel unit and imaging sensor |
| CN104134676A (en) * | 2014-07-23 | 2014-11-05 | 中国航天科技集团公司第九研究院第七七一研究所 | Rapid charge transfer pixel structure based on radiation environment application |
| CN107706203B (en) * | 2017-11-10 | 2020-08-14 | 中国电子科技集团公司第四十四研究所 | CCD with large full-well capacity and anti-corona structure |
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