CN102683372B - Pixel structure and generation method of small size CMOS image sensor - Google Patents
Pixel structure and generation method of small size CMOS image sensor Download PDFInfo
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Abstract
Description
技术领域 technical field
本发明涉及金属互补氧化物半导体(CMOS)固态图像传感器,具体讲,涉及小尺寸的CMOS图像传感器像素的光电二极管结构。The present invention relates to a metal complementary oxide semiconductor (CMOS) solid-state image sensor, in particular, to a photodiode structure of a small-sized CMOS image sensor pixel.
背景技术 Background technique
图像传感器是将入射光信号转换为电信号的半导体器件。其根据工作原理不同,主要分为两类:电荷耦合型图像传感器(Charge Coupled Device)和CMOS图像传感器(complementarymetal-oxide-semiconductor)。近年来,受益于标准CMOS工艺的快速进步及特征尺寸的不断减少,CMOS图像传感器可以和更多的数模电路集成在同一块芯片上,实现了低功耗,低成本,高集成度等CCD图像传感器无法比拟的优点,这也促进了近年来CMOS图像传感器的飞速发展。Image sensors are semiconductor devices that convert incident light signals into electrical signals. According to different working principles, it is mainly divided into two categories: charge coupled image sensor (Charge Coupled Device) and CMOS image sensor (complementary metal-oxide-semiconductor). In recent years, benefiting from the rapid progress of standard CMOS technology and the continuous reduction of feature size, CMOS image sensors can be integrated with more digital-analog circuits on the same chip, realizing low power consumption, low cost, high integration and other CCD The incomparable advantages of image sensors have also promoted the rapid development of CMOS image sensors in recent years.
CMOS图像传感器是由像素阵列,模拟前端电路,数模转换单元和时序控制电路共同组成。但在整个图像传感器架构中处于核心地位的是像素单元阵列。其作为CMOS图像传感器的基本感光单元,按工作原理主要分为有源像素与无源像素,按集成度可以分为三管有源像素(3T-APS)、钳位二极管四管有源像素(4T-APS)、钳位二极管五管有源像素(5T-APS),其中4T-APS是市场的主流。传统的4T-APS剖面结构如图1所示,4T-APS由一个光电二极管(180,200,110),浮空扩散节点160、传输管170、复位管150、源级跟随器140和地址选通管130共同组成。像素的感光特性很大程度上是由这六个器件的尺寸结构与工艺参数决定的,尤其受光电二极管和传输管的尺寸结构与工艺参数影响最大,其将从根本上影响整个图像传感器最终成像性能的好坏。A CMOS image sensor is composed of a pixel array, an analog front-end circuit, a digital-to-analog conversion unit and a timing control circuit. But at the heart of the overall image sensor architecture is the array of pixel cells. As the basic photosensitive unit of CMOS image sensor, it is mainly divided into active pixel and passive pixel according to the working principle, and can be divided into three-tube active pixel (3T-APS), clamp diode four-tube active pixel ( 4T-APS), clamp diode five-tube active pixel (5T-APS), of which 4T-APS is the mainstream of the market. The traditional 4T-APS cross-sectional structure is shown in Figure 1. The 4T-APS consists of a photodiode (180, 200, 110), a
传统4T有源像素光电二极管是由在P型外延层110上注入一个N埋层200,与表面形成的高浓度掺杂P+钳位层190和外延110共同构成,用于接收入射到图像传感器表面的入射光子111并产生与入射光光强对应的信号电荷。这种结构在设计大尺寸像素时虽然主流,但若应用这种光电二极管结构设计小尺寸像素,随着标准CMOS工艺中特征尺寸的减少,每个像素单元面积将减少,这一效应的直接影响是电荷收集区面积也会随之减少,将导致像素单元满阱容量的减少。小尺寸像素下,满阱容量的减小将会造成图像传感器的动态范围减少、暗电流在小像素中的影响将会越来越大、信噪比偏低等缺点,严重影响小像素图像传感器的成像效果。那么,如何在小尺寸工艺下设计电荷收集区域的结构尺寸与工艺参数,使图像传感器同时具有高满阱容量、低暗电流、高信噪比、高动态范围的小尺寸像素,就变得尤为重要。The traditional 4T active pixel photodiode is composed of an N-buried
近几年,为减少小像素下阱容量不够和由之带来的动态范围小、信噪比低等不足,一种采用多步离子注入形成分层PD结构的概念被提出,其结构如图2所示。在这种分层结构中,传统PD结构中仅有的一块N型注入区被一个高浓度的P+插入层210隔开,被P+插入层分割的整个N型掺杂区200是由单一一种N型杂质完成掺杂的。在这个PD分层结构中,整个N型区域其实是一个开口向左、由一种杂质构成的U型埋层结构,其与P插入层210共同起到收集信号电荷的作用。采用这种分层结构的PD,在设计小尺寸像素时,由于引入了这层重掺杂的P+型插入层210,将使光电二极管200内核中本可能无法完全耗尽的区域完全耗尽,最终拥有较大的满阱容量。显然这是通过使未耗尽的区域完全耗尽来达到“激活”的作用,即提高耗尽程度让更多的区域可以被用来收集光生电子。但需要指出的是,当N埋层200已经完全耗尽时,再用此方法增大满肼将不再有效。其他途径可以增大满阱容量:我们也可以通过增大整个N埋层200的浓度可以被耗尽的总量来增大满阱容量。但这种方法势必会增加与表面P型钳位层190接触的N埋层200的掺杂浓度,从而间接增大在si-sio2界面处产生的暗电流,最终会增大各种噪声,并严重降低信噪比。综上所述,即提高满阱容量与减少暗电流、增大信噪比之间有一个相互制约的因素---掺杂浓度。如何避开这一相互制约因素,在不使暗电流增大的情况下同时提高满阱容量、动态范围、信噪比等指标,这将是小像素设计中亟待解决的重要问题。In recent years, in order to reduce the insufficient well capacity of small pixels and the resulting problems such as small dynamic range and low signal-to-noise ratio, a concept of multi-step ion implantation to form a layered PD structure was proposed. The structure is shown in the figure 2. In this layered structure, the only N-type implanted region in the traditional PD structure is separated by a high-concentration
发明内容 Contents of the invention
本发明旨在克服现有技术的不足,提供一种小尺寸的CMOS图像传感器像素的光电二极管结构,使得优化后的小像素单元可以在不增大暗电流的情况下增加满阱容量,从而完成间接增大动态范围、信噪比等,完成小像素下像素单元的优化设计,为达到上述目的,本发明采取的技术方案是,一种小尺寸CMOS图像传感器像素结构,由一种杂质半导体构成光电二极管N埋层外层,由另一种杂质半导体构成光电二极管N埋层内层,构成光电二极管N埋层内层的杂质半导体比构成N埋层外层杂质半导体的浓度大、扩散系数小,N埋层的内层形状为开口向左的U型,U型中间部位由P型掺杂注入形成P插入层,P插入层范围左侧始自光电二极管区域左侧边界,右侧最远距离传输管X处,X范围最大值不大于整个光电二极管N埋层宽度,最小值趋向于零但始终大于零,N埋层的外层N埋层的内层全部包埋。The present invention aims to overcome the deficiencies of the prior art, and provides a photodiode structure of a small-sized CMOS image sensor pixel, so that the optimized small pixel unit can increase the full well capacity without increasing the dark current, thereby completing Indirectly increase the dynamic range, signal-to-noise ratio, etc., and complete the optimal design of the pixel unit under the small pixel. The outer layer of the N-buried layer of the photodiode is composed of another impurity semiconductor to form the inner layer of the N-buried layer of the photodiode. The impurity semiconductor that constitutes the inner layer of the N-buried layer of the photodiode has a higher concentration and a smaller diffusion coefficient than the impurity semiconductor that constitutes the outer layer of the N-buried layer. , the shape of the inner layer of the N-buried layer is U-shaped with the opening to the left, and the middle part of the U-shaped layer is implanted with P-type doping to form a P-inserted layer. At a distance from the transmission tube X, the maximum value of the X range is not greater than the width of the entire photodiode N-buried layer, and the minimum value tends to zero but is always greater than zero. The outer layer of the N-buried layer and the inner layer of the N-buried layer are all buried.
扩散系数较大的杂质半导体是磷,扩散系数较小的杂质半导体是砷。The impurity semiconductor with a large diffusion coefficient is phosphorus, and the impurity semiconductor with a small diffusion coefficient is arsenic.
所述的像素结构尺寸成比例变化构成大像素CMOS图像传感器像素结构。The size of the pixel structure varies in proportion to form a pixel structure of a large pixel CMOS image sensor.
一种小尺寸CMOS图像传感器像素结构生成方法,包括下列步骤:选择使用扩散系数不同的磷P和砷AS共同形成N埋层,在第一步注入时使用扩散系数较大的磷注入形成N埋层外层,其浓度比第二步砷注入浓度要小,第二步形成砷注入层时,其浓度比第一步磷注入浓度更大,同时控制注入能量使得最终达到扩散系数较大的磷注入层将扩散系数较小的砷注入层全部包埋的N埋层结构,砷注入层为U型,在U型中间注入P型插入层。A method for generating a pixel structure of a small-sized CMOS image sensor, comprising the following steps: choosing to use phosphorus P and arsenic AS with different diffusion coefficients to form an N buried layer, and using phosphorus implantation with a larger diffusion coefficient to form an N buried layer in the first step of implantation The concentration of the outer layer of the outer layer is lower than that of the arsenic implantation in the second step. When the arsenic implantation layer is formed in the second step, its concentration is higher than that of the phosphorus implantation in the first step. At the same time, the implantation energy is controlled so that the phosphorus with a larger diffusion coefficient is finally achieved. The injection layer is an N-buried layer structure in which the arsenic injection layer with a small diffusion coefficient is completely buried. The arsenic injection layer is U-shaped, and a P-type insertion layer is injected in the middle of the U-shaped.
所述步骤细化为:在掺杂浓度为1×1015/cm3的P型外延层内注入低浓度的磷形成N埋层外层结构,其注入能量范围为70KeV~220KeV,掺杂浓度范围为1×1010/cm3至1×1013/cm3;再注入比N埋层外层浓度更高的砷形成双杂质包埋的光电二极管N埋层内层,其注入能量范围为70KeV~290KeV,掺杂浓度范围为1×1011/cm3~2.5×1013/cm3;使用新掩膜版,掩膜版开口范围为,左侧始自光电二极管N埋层左边界,右侧为距离传输管X距离处,在此窗口范围内,注入P型掺杂的二氟化硼,最终形成P插入层,P插入层注入能量范围为10千电子伏~100千电子伏,掺杂浓度范围为1×1011/cm3~5×1013/cm3,并最终形成由不同扩散系数杂质共同构成的内嵌光电二极管结构,其形状为开口向左的U型。The steps are detailed as follows: implant low-concentration phosphorus into the P-type epitaxial layer with a doping concentration of 1×10 15 /cm 3 to form an N-buried outer layer structure, the implantation energy range is 70KeV-220KeV, and the doping concentration The range is 1×10 10 /cm3 to 1×10 13 /cm 3 ; re-implant arsenic with a concentration higher than that of the outer layer of the N-buried layer to form the inner layer of the photodiode N-buried layer with double impurities embedded, and the implantation energy range is 70KeV ~290KeV, the doping concentration range is 1×10 11 /cm3~2.5×10 13 /cm 3 ; using a new mask, the opening range of the mask is, the left side starts from the left boundary of the N buried layer of the photodiode, and the right side At the distance X from the transmission tube, within this window, P-type doped boron difluoride is injected to form a P insertion layer. The implantation energy range of the P insertion layer is 10 keV to 100 keV. The concentration ranges from 1×10 11 /cm3 to 5×10 13 /cm 3 , and finally forms an embedded photodiode structure composed of impurities with different diffusion coefficients, and its shape is U-shaped with the opening facing left.
若选择同时使用扩散系数不同的N型掺杂组合,选择范围是氮、磷、砷、锑、铋。If you choose to use N-type doping combinations with different diffusion coefficients at the same time, the selection range is nitrogen, phosphorus, arsenic, antimony, and bismuth.
P型插入层开口为向右,即由左侧插入光电二极管N埋层。The opening of the P-type insertion layer is to the right, that is, the N-buried layer of the photodiode is inserted from the left side.
本发明的技术特点及效果:Technical characteristics and effects of the present invention:
所引入的由不同扩散系数杂质共同构成的分层与内嵌N埋层结构的钳位二极管,在像素感光面积不变的前提下,The introduction of layered and embedded N-buried layer clamp diodes composed of impurities with different diffusion coefficients, under the premise that the photosensitive area of the pixel remains unchanged,
1.新设计的小像素钳位二极管满阱容量更大。由于新结构是由扩散系数不同的两种杂质共同组成,可以使用更高剂量的砷AS注入形成N区的内部,从而使新满阱容量比完全使用单一低剂量的磷掺杂形成的满阱容量更大。1. The newly designed small pixel clamp diode has a larger full well capacity. Since the new structure is composed of two kinds of impurities with different diffusion coefficients, a higher dose of arsenic AS implantation can be used to form the inside of the N region, so that the capacity of the new full well is higher than that of the full well formed by a single low dose of phosphorus doping. Larger capacity.
2.新设计的小像素钳位二极管暗电流比完全使用单一高剂量AS掺杂形成的N埋层暗电流低。这种内嵌AS掺杂结构相较完全的高剂量AS掺杂结构而言(如图4-1),虽然其阱容量没有高浓度砷AS掺杂大,但其产生的暗电流小。因为整个N埋层的浓度梯度由中心高浓度的AS渐变到较低浓度的P,而不是直接以很高浓度的AS与P+钳位层相邻,使得所产生的暗电流更小。2. The dark current of the newly designed small pixel clamping diode is lower than that of the N buried layer formed entirely by a single high-dose AS doping. Compared with the complete high-dose AS-doped structure (as shown in Figure 4-1), this embedded AS-doped structure has a smaller well capacity than high-concentration arsenic AS-doped, but the dark current generated by it is small. Because the concentration gradient of the entire N buried layer gradually changes from high-concentration AS in the center to low-concentration P, instead of directly adjacent to the P+ clamping layer with high-concentration AS, the resulting dark current is smaller.
3.新钳位二极管由于纵向p+/n/n+/p/n+/n/p的叠加,新光电二极管产生的物理深度也会在一定范围内增加,从而增加向纵向方向的耗尽区范围,可以增加长波光谱的量子效率。3. Due to the superposition of vertical p+/n/n+/p/n+/n/p of the new clamping diode, the physical depth of the new photodiode will also increase within a certain range, thereby increasing the depletion region range in the longitudinal direction, The quantum efficiency of the long-wave spectrum can be increased.
4.新设计的小像素钳位二极管电荷传输速度更快。远离传输管TX的钳位二极管N区被P插入层耗尽后电势降低,而靠近传输管TX的N区由于其AS注入量比远离TX的N区AS注入量多,所以靠近TX管一侧的电势更高,促进了在N区中收集的光生电子的转移,提高了电荷自钳位二极管N区向FD的传输速度。4. The newly designed small pixel clamp diode charge transfer speed is faster. The N region of the clamping diode far away from the transmission tube TX is depleted by the P insertion layer and the potential decreases, while the N region close to the transmission tube TX has more AS injection than the N region far away from TX, so the side close to the TX tube The potential of the clamp diode is higher, which promotes the transfer of photo-generated electrons collected in the N region, and improves the transfer speed of the charge from the N region of the clamp diode to the FD.
附图说明 Description of drawings
图1传统4T-APS像素单元结构剖面图。Figure 1 is a cross-sectional view of a traditional 4T-APS pixel unit structure.
图2分层PPD像素单元结构剖面图。Fig. 2 A cross-sectional view of the layered PPD pixel unit structure.
图3由单一一种杂质注入形成的N埋层原理图及其对应掺杂分布曲线图。Fig. 3 is a schematic diagram of an N buried layer formed by implantation of a single type of impurity and its corresponding doping distribution curve.
图4本发明采用的由不同扩散系数杂质共同构成的内嵌N埋层PPD结构原理图及其相应的浓度分布曲线。Fig. 4 is a schematic diagram of the embedded N-buried layer PPD structure composed of impurities with different diffusion coefficients used in the present invention and its corresponding concentration distribution curve.
图5应用本发明改进图2后的分层与内嵌N埋层PPD像素单元结构剖面图。Fig. 5 is a cross-sectional view of the layered and embedded N-buried layer PPD pixel unit structure after applying the present invention to improve Fig. 2 .
具体实施方式 Detailed ways
本发明为一种基于分层PD结构上的结构优化,用以在设计小像素图像传感器时,在不增大暗电流的基础上,同时提升小像素下满阱容量、动态范围的方法。在传统PPD及未改进的分层PPD结构(图1与图2)中,N埋层200是由单一的同种N型掺杂实现的,如磷(P)或砷(AS)。而对于单一掺杂磷(P)的N埋层来说,因为P在离子注入时,拥有相对较高的扩散系数,使注入形成的N埋层的浓度分布曲线易形成浓度较低,范围较大的掺杂浓度分布,即“扁宽型”,如图3B所示。而如果为了增大小像素的满阱容量,仅仅用更高剂量的AS掺杂注入形成N埋层时,会使注入形成N埋层的浓度曲线易形成浓度较大但扩散范围比较小的曲线,即“窄瘦型”,如图3A所示。这是因为AS在离子注入过程中,具有相对较低的扩散系数。但这种高剂量的AS注入会使N埋层与Si-SiO2产生更大的暗电流,使像素单元的暗电流特性变得更差。The present invention is a structure optimization based on a layered PD structure, which is used to improve the full well capacity and dynamic range of small pixels without increasing the dark current when designing a small pixel image sensor. In the conventional PPD and the unimproved layered PPD structure (FIG. 1 and FIG. 2), the buried
在本发明中,鉴于AS和P在离子注入时的扩散系数有很大差异,尤其随着温度越高,两者扩散系数差距越大。如图4,若选择同时使用扩散系数不同的(磷)P和(砷)AS共同形成N埋层,且在第一步注入形成砷层240时,剂量较大,第二步形成磷注入层230时,剂量较小,同时控制注入能量使得最终达到扩散系数较大的(磷)P注入层230将扩散系数较小的(砷)AS注入层240全部包埋的N埋层结构,其特征结构与浓度-深度曲线如图4所示。通过两步不同扩散系数掺杂形成的N埋层,可以看出其N埋层上表面与表面P型层180接触区域附近P(磷)浓度比中心AS(砷)浓度要低。即AS注入层提供一个更高的阱容量,P(磷)注入层使得整个N埋层的浓度梯度由中心高浓度的AS渐变到较低浓度的P(磷),而不是直接以很高浓度的AS与表面P+型钳位层相邻,使得所产生的暗电流更小。同时,插入的P型层也能确保采用的双扩散系数杂质增大的满阱容量可以被完全耗尽,从而确保这种优化的光电二极管结构可以被用于小像素下提升满阱容量的同时,可以优化动态范围,信噪比及暗电流等特性。In the present invention, in view of the great difference in the diffusion coefficients of AS and P during ion implantation, especially as the temperature increases, the difference between the two diffusion coefficients becomes larger. As shown in Figure 4, if you choose to use (phosphorus) P and (arsenic) AS with different diffusion coefficients at the same time to form the N buried layer, and when the first step is implanted to form the arsenic layer 240, the dose is relatively large, and the second step is to form the phosphorus implanted layer. 230, the dosage is small, and the implantation energy is controlled at the same time so that the (phosphorus) P implantation layer 230 with a large diffusion coefficient finally embeds the (arsenic) AS implantation layer 240 with a small diffusion coefficient. The structure and concentration-depth curves are shown in Figure 4. Through the N buried layer formed by doping with different diffusion coefficients in two steps, it can be seen that the concentration of P (phosphorus) near the contact area between the upper surface of the N buried layer and the surface P-
本发明中,为了在不增大暗电流的情况下,设计拥有更高满阱容量的小像素,现利用图4所示结构对图2所示分层PPD结构进行改善。改善后的结构即为采用这种由不同扩散系数杂质共同构成的内嵌分层N埋层钳位光电二极管,其新结构图如图5所示。图5中A-A’虚线处的结构即为图4中的结构。整个光电二极管的N埋层由两种扩散系数的杂质共同构成,一种是由低浓度的磷构成的外层320,其注入能量范围为70KeV~220KeV,掺杂浓度范围为1e10~1e13/cm3;一种是由较高浓度的砷构成的内层220,其形状为开口向左的倒U型,其注入能量范围为70KeV~290KeV,掺杂浓度范围为1e11~2.5e13/cm3。N埋层内层由P型掺杂的二氟化硼注入形成P插入层,其注入能量范围为10KeV~100KeV,掺杂浓度范围为1e11~5e13/cm3,其距离传输管距离为X,理论上X的变化范围是:大于0,小于等于光电二极管N埋层的宽度。此处,X的距离控制为整个光电二极管N埋层总宽度的一半处。图5相比图2所示的分层PPD而言,因为其N埋层与P+钳位层接触的上部分采用较低浓度的磷掺杂,所以在不增大暗电流的情况下获得了由更高剂量砷掺杂而带来的阱容量的提高,从而提高动态范围、信噪比等重要参数。In the present invention, in order to design a small pixel with higher full well capacity without increasing the dark current, the layered PPD structure shown in FIG. 2 is improved by using the structure shown in FIG. 4 . The improved structure is to use this embedded layered N-buried layer clamp photodiode composed of impurities with different diffusion coefficients, and its new structure is shown in Figure 5. The structure at A-A' dotted line place among Fig. 5 is exactly the structure among Fig. 4. The N-buried layer of the entire photodiode is composed of two kinds of impurities with diffusion coefficients. One is the
本发明中使用的AS与P作为一对掺杂组合是因为其在现有的半导体制造工艺下相对普遍与成熟,但需要指出的是,其他类型的N型掺杂组合也同样适用。只要这种同型掺杂组合拥有不同的扩散系数,如砷与铋的组合也是适用的。同时,几乎所有的N型掺杂组合(氮、磷、砷、锑、铋)都是适用的。AS and P are used as a pair of doping combinations in the present invention because they are relatively common and mature in the existing semiconductor manufacturing process, but it should be pointed out that other types of N-type doping combinations are also applicable. Combinations of arsenic and bismuth are also suitable as long as the isotype doping combinations have different diffusion coefficients. At the same time, almost all N-type doping combinations (nitrogen, phosphorus, arsenic, antimony, bismuth) are applicable.
本发明所采用的两种不同扩散系数的N型杂质形成N埋层,也可以采用三种或三种以上扩散系数不同的N型杂质共同实现,皆属于本专利精神范围。The present invention uses two kinds of N-type impurities with different diffusion coefficients to form the N-buried layer, and it can also be realized by using three or more N-type impurities with different diffusion coefficients, all of which belong to the scope of the spirit of this patent.
本发明中采用的内嵌分层PD结构,其开口向左的。但需要指出的是,开口方向,向右亦属于本专利精神范围。在开口向右结构中,P插入层插入范围是大于0,小于等于光电二极管N埋层宽度。插入方向由光电二极管N埋层右侧插入。In the embedded layered PD structure adopted in the present invention, its opening faces to the left. However, it should be pointed out that the direction of the opening to the right also belongs to the scope of the spirit of this patent. In the right-opening structure, the insertion range of the P insertion layer is greater than 0 and less than or equal to the width of the N buried layer of the photodiode. The insertion direction is inserted from the right side of the photodiode N buried layer.
本发明用为了在不增大暗电流的情况下,设计拥有更高满阱容量的小像素。但需要指出的是,若采用此专利方法设计大像素图像传感器也属于本专利精神范围。The present invention is used to design a small pixel with higher full well capacity without increasing the dark current. However, it should be pointed out that if the patented method is used to design a large-pixel image sensor, it also falls within the scope of the spirit of this patent.
本发明,是通过多次注入不同扩散系数的杂质形成内嵌分层N埋层钳位光电二极管,用于改善设计小像素时暗电流与阱容量的制约关系。其光电二极管具体实施方案是:In the present invention, impurities with different diffusion coefficients are implanted multiple times to form an embedded layered N-buried layer clamp photodiode, which is used to improve the restriction relationship between dark current and well capacity when designing small pixels. Its photodiode specific implementation scheme is:
参照图5所示,在掺杂浓度为1e15/cm3的P型外延层110上注入低浓度的磷形成N埋层外层结构320,其注入能量范围为70KeV~220KeV,掺杂浓度范围为1e10~1e13/cm3;再注入较高剂量的砷形成整个光电二极管的N埋层220,其注入能量范围为70KeV~290KeV,掺杂浓度范围为1e11~2.5e13/cm3。再次注入P型掺杂的二氟化硼注入形成P插入层,其注入能量范围为10KeV~100KeV,掺杂浓度范围为1e11~5e13/cm3。最终形成由不同扩散系数杂质共同构成的内嵌光电二极管结构,其形状为开口向左的倒U型,。Referring to FIG. 5, a low concentration of phosphorus is implanted on the P-
下面结合实施例具体介绍最佳实施方式:Below in conjunction with embodiment specifically introduces the best implementation mode:
在硼掺杂浓度为1e15/cm3的P型外延层上,两次注入N型杂质共同形成光电二极管的N区。在第一次注入时,使用传统PD光刻版,注入杂质为磷,其能量为200KeV,剂量为0.5e12/cm3,用以形成低浓度的N埋层320;第二步同样使用传统PD光刻版,注入杂质为砷,其能量为170KeV,剂量为1.5e12/cm3,用以形成整个光电二极管内嵌N埋层部分220;第三步注入形成P型插入层210,需要使用一块新光刻版,其排列在距离传输管X距离的位置,注入杂质为二氟化硼,注入能量为110KeV,剂量为1e13/cm3完成P插入层的注入。最后注入形成P+钳位层,使用的是传统PD光刻版,注入能量为35KeV,剂量为1e13/cm3。On the P-type epitaxial layer with a boron doping concentration of 1e15/cm3, N-type impurities are implanted twice to jointly form the N-region of the photodiode. In the first implantation, a traditional PD photoresist is used, and the implanted impurity is phosphorus with an energy of 200KeV and a dose of 0.5e12/cm3 to form a low-concentration N buried
采用以上工艺参数可以实现基于分层PD结构上的结构优化,用以在不增大暗电流的基础上,同时实现设计拥有更高满阱容量、更大动态范围的小像素图像传感器像素单元的设计。Using the above process parameters can achieve structural optimization based on the layered PD structure, so as to realize the design of the pixel unit of the small pixel image sensor with higher full well capacity and larger dynamic range without increasing the dark current. design.
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