CN102683185A

CN102683185A - Method for reducing polysilicon gate depletion in carbon co-implantation technological process

Info

Publication number: CN102683185A
Application number: CN2012101360274A
Authority: CN
Inventors: 俞柳江
Original assignee: Shanghai Huali Microelectronics Corp
Current assignee: Shanghai Huali Microelectronics Corp
Priority date: 2012-05-04
Filing date: 2012-05-04
Publication date: 2012-09-19
Anticipated expiration: 2032-05-04
Also published as: CN102683185B

Abstract

The invention provides a method for reducing polysilicon gate depletion in a carbon co-implantation technological process, which is used for preparing a PMOS (p-channel metal oxide semiconductor). The method comprises the following steps of: providing a semiconductor substrate, wherein a grid is formed on the semiconductor substrate, the semiconductor substrate at one side of the grid is a source region, and the semiconductor substrate at the other side is a drain region; the method is characterized by further comprising the following steps of: 1, manufacturing a grid flank wall, and performing P type heavily doped baron implantation and thermal annealing; 2, removing the flank wall and performing lightly doped drain implantation, and performing a carbon co-implantation technology; 3, depositing a silicide mask to manufacture new flank walls; and 4, forming self-aligning silicide. According to the invention, the P type heavily doped baron implantation step and the lightly doped drain implantation step in the carbon co-implantation technological process are regulated, so that the problem of not excellently spreading is avoided, and the polysilicon gate depletion is reduced.

Description

Reduce the method that polysilicon gate exhausts in the auxiliary injection technology flow process of carbon

Technical field

The present invention relates to prepare the auxiliary injection technology of PMOS device carbon, particularly, relate to and reduce the method that polysilicon gate exhausts in the auxiliary injection technology flow process of carbon.

Background technology

In the preparation process of semiconductor device, chip is to handle in batches, on same wafer, forms the large amount of complex device.Along with developing rapidly of very lagre scale integrated circuit (VLSIC), when the integrated level of chip was increasingly high, chip size was also more and more little.

When the metal-oxide-semiconductor channel shortening arrives to a certain degree, short-channel effect (Short Channel Effects) will appear.After channel length was reduced to a certain degree, the depletion region of source, drain junction shared proportion in whole raceway groove increased, and the silicon face below the grid forms the required quantity of electric charge of inversion layer and reduces, thereby threshold voltage (Vt) reduces, and cut-off current (Ioff) rises simultaneously.Short-channel effect makes that the threshold voltage of device is very responsive to the length variations of raceway groove, makes that the control difficulty on the semiconductor device technology strengthens.

In 65 nano-technology techniques generations following technology in generation, ultra shallow junction (Ultra shallow junction) process quilt is used for reducing the short-channel effect of cmos device, for the PMOS device; Because lightly doped drain technology (Lightly Doped Drain; What adopt LDD) is the low-energy boron ion implantation technology, in order to reduce the diffusion of boron atom in silicon substrate, realizes ultra shallow junction; Can be when LDD injects; Adopt auxiliary (Carbon co-implantation) technology of injecting of carbon, owing to carbon atom can reduce the diffusion of boron atom in silicon substrate, so the auxiliary injection technology of carbon helps forming ultra shallow junction.

But; Because when carrying out the LDD injection; Polysilicon gate can carry out equally that carbon is auxiliary to be injected, after the injection of P type heavy doping boron (P Plus Implantation) and the thermal anneal process that carry out, the carbon atom that injects in the LDD technology; Can reduce the diffusivity of the boron atom of P type heavy doping injection equally at polysilicon gate; Cause the boron atom diffusion in the polysilicon gate insufficient, its result make in polysilicon gate with the grid oxygen interface near carrier concentration reduce, under the situation that adds bias voltage on the polysilicon gate; Polysilicon gate and grid oxygen interface carrier depletion occurs more easily and make the situation of equivalent oxide thickness thickening, and promptly polysilicon gate exhausts (Poly Depletion) problem and increases the weight of.

The flow process for preparing the PMOS device referring to figs. 1 to the auxiliary injection technology of carbon of the prior art shown in Figure 3.The LDD of technology after polysilicon gate etching injects beginning, and be as shown in Figure 1, injects and annealing process at LDD, except carrying out the injection of boron ion, adopts carbon to assist simultaneously and inject.Carbon after the injection can suppress the diffusion of boron atom in substrate silicon.

Then be the formation of side wall (Spacer); P type heavy doping boron injects and thermal anneal process, and is as shown in Figure 2, owing to there is the carbon atom when LDD injects before in the polysilicon gate; The P type heavily mixes the diffusion of boron atom in polysilicon gate and also is suppressed, and the resistance of polysilicon gate increases.

Then, be the formation of self-aligned silicide, final PMOS cross section is as shown in Figure 3.Because heavy doping boron atom is fully diffusion not, near the carrier concentration polysilicon gate and grid oxygen interface reduces, and the polysilicon gate depletion effect is increased the weight of.

Therefore, provide a kind of method that can effectively solve the problem that polysilicon gate exhausts in the auxiliary injection technology flow process of carbon just to seem particularly important.

Summary of the invention

The objective of the invention is to avoid owing to the auxiliary injection technology flow process of carbon causes the inadequate deficiency of boron atom diffusion in the polysilicon gate, polysilicon gate exhausts in the auxiliary injection technology flow process of reduction carbon.

The present invention provides a kind of method that polysilicon gate exhausts in the flow process that the auxiliary injection technology of carbon prepares the PMOS device that reduces; Be used to prepare PMOS, Semiconductor substrate is provided earlier, be formed with grid on the said Semiconductor substrate; The Semiconductor substrate of said grid one side is a source area; The Semiconductor substrate of opposite side is the drain region, wherein, also comprises:

Step 1, the manufacturing grid side wall, and carry out carrying out thermal annealing after P type heavy doping boron injects;

Step 2 removes side wall and carries out the lightly doped drain injection, and adopts the auxiliary injection technology of carbon;

Step 3, the deposition silicide mask is to make new side wall;

Step 4 forms self-aligned silicide.

Above-mentioned method wherein, in the said step 3, adopts dry etching to form side wall.

Above-mentioned method, wherein, the silicide that forms in the said step 4 covers the upper surface of said source area, drain region and grid.

Above-mentioned method wherein, in the said step 2, also comprises the step that forms ultra shallow junction.

The present invention has avoided the problem that can't spread preferably through P type heavy doping boron implantation step and lightly doped drain implantation step in the auxiliary injection technology flow process of adjustment carbon, has reduced polysilicon gate and has exhausted.

Description of drawings

Through reading the detailed description of non-limiting example being done with reference to following accompanying drawing, it is more obvious that the present invention and characteristic thereof, profile and advantage will become.Mark identical in whole accompanying drawings is indicated identical part.Painstakingly proportionally do not draw accompanying drawing, focus on illustrating purport of the present invention.In the accompanying drawings, for cheer and bright, amplified the part parts, for same parts, only indicated wherein part, those skilled in the art can combine embodiment partly to understand.

Fig. 1 to Fig. 3 shows prior art, the sketch map of auxiliary each step of injection technology flow process of carbon; And

Fig. 4 to Fig. 7 shows according to of the present invention, a kind of sketch map that reduces each step of the method that polysilicon gate exhausts in the auxiliary injection technology flow process of carbon.

Embodiment

Below in conjunction with accompanying drawing and embodiment the present invention is further elaborated.Embodiment described herein only is used to explain the present invention, and is not used in qualification protection scope of the present invention.

With reference to figure 4 to a kind of method flow that polysilicon gate exhausts in the auxiliary injection technology flow process of carbon that reduces illustrated in fig. 7; The present invention is used for reducing the problem that flow process polysilicon gate that the auxiliary injection technology of carbon prepares the PMOS device exhausts, and Semiconductor substrate 100 is provided earlier, is formed with grid 101 on the said Semiconductor substrate 100; The Semiconductor substrate 100 of said grid 101 1 sides is a source area 102; The Semiconductor substrate 100 of opposite side is drain region 103, wherein, also comprises: step 1; Manufacturing grid side wall 201, and carry out carrying out thermal annealing after P type heavy doping boron injects; Step 2 removes side wall 201 and carries out the lightly doped drain injection, and adopts the auxiliary injection technology of carbon; Step 3, deposition silicide 301 masks are to make new side wall 202; Step 4 forms self-aligned silicide 301.

In step 1, comparison diagram 4 and Fig. 2, owing to there is not carbon atom to exist, the boron atom in the polysilicon gate is able to abundant diffusion.

In step 2,,, formed ultra shallow junction 400 because the existence of carbon atom has suppressed the diffusion of the boron atom of lightly doped drain injection with reference to figure 5.But the heavy doping boron atom in the polysilicon gate, because fully diffusion in annealing process before, so can not receive auxiliary influence of injecting carbon.Therefore, near the carrier concentration polysilicon gate and the grid oxygen interface increases, and the polysilicon gate depletion effect weakens.

In a specific embodiment, in the said step 3, adopt dry etching to form side wall 202.

With reference to figure 7, the silicide 301 that forms in the said step 4 covers the upper surface of said source area 102, drain region 103 and grid 101.

Those skilled in the art combine prior art and the foregoing description can realize said variant, and such variant does not influence flesh and blood of the present invention, does not repeat them here.

More than preferred embodiment of the present invention is described.It will be appreciated that the present invention is not limited to above-mentioned specific implementations, equipment of wherein not describing in detail to the greatest extent and structure are construed as with the common mode in this area to be implemented; Any those of ordinary skill in the art; Do not breaking away under the technical scheme scope situation of the present invention; All the method for above-mentioned announcement capable of using and technology contents are made many possible changes and modification to technical scheme of the present invention; Or being revised as the equivalent embodiment of equivalent variations, this does not influence flesh and blood of the present invention.Therefore, every content that does not break away from technical scheme of the present invention, all still belongs in the scope of technical scheme protection of the present invention any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.

Claims

1. one kind is reduced the method that polysilicon gate exhausts in the auxiliary injection technology flow process of carbon; Be used to prepare PMOS, Semiconductor substrate is provided earlier, be formed with grid on the said Semiconductor substrate; The Semiconductor substrate of said grid one side is a source area; The Semiconductor substrate of opposite side is the drain region, it is characterized in that, also comprises:

Step 3, the deposition silicide mask is to make new side wall;

Step 4 forms self-aligned silicide.

2. method according to claim 1 is characterized in that, in the said step 2, forms ultra shallow junction.

3. method according to claim 1 and 2 is characterized in that, in the said step 3, adopts dry etching to form side wall.

4. method according to claim 1 and 2 is characterized in that, the silicide that forms in the said step 4 covers the upper surface of said source area, drain region and grid.