CN102664167A - Method of improving write-in redundancy of static random access memory - Google Patents
Method of improving write-in redundancy of static random access memory Download PDFInfo
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- CN102664167A CN102664167A CN2012101379552A CN201210137955A CN102664167A CN 102664167 A CN102664167 A CN 102664167A CN 2012101379552 A CN2012101379552 A CN 2012101379552A CN 201210137955 A CN201210137955 A CN 201210137955A CN 102664167 A CN102664167 A CN 102664167A
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Abstract
The invention provides a method of improving write-in redundancy of a static random access memory. The static random access memory comprises an input/output device and a core device, wherein the core device comprises a pull-up pipe device, the input/output device is used for inputting and outputting signals of a chip and a peripheral circuit, and the thickness of a grid electrode oxide layer of the input/output device is larger than that of the grid electrode oxide layer of the core device. The method of improving write-in redundancy of static random access memory comprises the step of: enabling the thickness of the grid electrode oxide layer of the pull-up pipe device to be larger than that of the grid electrode oxide layer of the core device, and enabling the thickness of the grid electrode oxide layer of the pull-up pipe device to be equal to that of the grid electrode oxide layer of the core device. For example, when the grid electrode oxide layer of the pull-up pipe device is prepared, the formerly generated grid electrode oxide layer for the input/output device is not moved so as to enable the grid electrode oxide layer of the input/output device to serve as the grid electrode oxide layer of the pull-up pipe device.
Description
Technical field
The present invention relates to the semiconductor fabrication technical field; More precisely, the present invention relates to a kind of static random access memory that improves writes the method for redundancy and has adopted this raising static random access memory to write the static random access memory manufacturing approach of the method for redundancy.
Background technology
Static random access memory (SRAM) has obtained using widely in high-speed data exchange systems such as computer, communication, multimedia as one type of staple product in the semiconductor memory.Shown in Figure 1 is the domain structure of one the 90 common static random access memory cell below the nanometer, includes these three levels of source region, polysilicon gate and contact hole.What zone 1 was marked among the figure is control valve (Pass Gate); This device is a nmos device; What zone 2 was marked is following trombone slide (Pull Down MOS); This device is similarly a nmos device, and what zone 3 was marked is last trombone slide (Pull Up MOS), and this device is a PMOS device.
Writing redundancy (Write Margin) is an important parameter weighing the static random access memory cell write performance; Fig. 2 is that a static random access memory device is being write fashionable work sketch map, and 4 is control valve among the figure, and 5 are following trombone slide; 6 is last trombone slide; Suppose that node 7 storage data are electronegative potential (promptly store data and be " 0 "), corresponding, node 8 storage data are high potential (promptly store data and be " 1 ").Now to write high potential to node 7 node 8 to write electronegative potential be example, before write activity, bit line 9 can be by preliminary filling to high potential; Bit line 10 can be precharged to electronegative potential; When write activity began, word line 11 was opened, because the data of node 7 initial storage are electronegative potential; So during initial condition, last trombone slide 6 opens and descends trombone slide 5 to cut out.Because last trombone slide 6 is all opened with control valve 4, so the current potential of node 8 no longer is " 1 ", but is positioned at a certain intermediate potential.This intermediate potential is determined by the equivalent resistance of last trombone slide 6 and control valve 4.In order to accomplish write activity, the intermediate potential of node 8 must be less than certain numerical value, and promptly the ratio of the equivalent resistance of control valve 4 and last trombone slide 6 must be less than certain numerical value, and the intermediate potential value is low more, static random access memory cell to write redundancy just big more.If the equivalent resistance of trombone slide 6 in the increase just can reduce the intermediate potential of node 8, thereby increase the redundancy that writes of static random access memory cell.
But, be not desirable especially according to the redundancy that writes of the static random access memory of the static random access memory manufacturing approach manufacturing of prior art, so hope can provide a kind of can effectively improve the method that static random access memory writes redundancy.
Summary of the invention
Technical problem to be solved by this invention is to have above-mentioned defective in the prior art, provides a kind of static random access memory that can effectively improve to write the method for redundancy and adopted this raising static random access memory to write the static random access memory manufacturing approach of the method for redundancy.
According to a first aspect of the invention; A kind of method that static random access memory writes redundancy that improves is provided; Said static random access memory comprises I/O device and core devices; And wherein said core devices comprises the trombone slide device; Said I/O device is used for the signal input and the output of chip and peripheral circuit, and the thickness of the grid oxic horizon of said I/O device is greater than the thickness of the grid oxic horizon of core devices, and the method that said raising static random access memory writes redundancy comprises: the thickness of grid oxic horizon that makes the trombone slide device is greater than the thickness of the grid oxic horizon of other core devices.
Preferably, make the thickness of the grid oxic horizon of trombone slide device equal the thickness of the grid oxic horizon of I/O device.
Preferably; The thickness of the said grid oxic horizon that makes the trombone slide device comprises greater than the step of the thickness of the grid oxic horizon of other core devices: in preparation during the grid oxic horizon of trombone slide device; The grid oxic horizon that is used for the I/O device of growth before not removing, the grid oxic horizon that feasible upward trombone slide device finally adopts the I/O device is as its grid oxic horizon.
Preferably, the thickness of the grid oxic horizon of said I/O device is than the big predetermined thickness of thickness of the grid oxic horizon of core devices.
Preferably, the thickness of the grid oxic horizon of said I/O device is the prearranged multiple of thickness of the grid oxic horizon of core devices.
Preferably, the said raising static random access memory method that writes redundancy is used for 45nm and following static random access memory preparation technology.
According to a second aspect of the invention, a kind of static random access memory manufacturing approach is provided, it has adopted described according to a first aspect of the invention raising static random access memory to write the method for redundancy.
According to the present invention, the thickness of the grid oxic horizon of trombone slide device in the increase makes the threshold voltage of going up the trombone slide device raise, and firing current reduces, thereby has increased the equivalent resistance of last trombone slide device.Further; Can be in preparation during the grid oxic horizon of trombone slide device area, the thick grid oxic horizon that is used for the I/O device of growth before not removing makes and goes up that the trombone slide device is final to adopt thick grid oxic horizon as its grid oxic horizon; Because the grid oxic horizon of last trombone slide device becomes thick grid oxic horizon; The threshold voltage of last trombone slide device raises, and firing current reduces, thereby has increased the equivalent resistance of last trombone slide device; And said process can be realized through logical operation.
Description of drawings
In conjunction with accompanying drawing, and, will more easily more complete understanding be arranged and more easily understand its attendant advantages and characteristic the present invention through with reference to following detailed, wherein:
Fig. 1 schematically shows the domain structure of common static random access memory cell.
Fig. 2 schematically shows the circuit structure of static random access memory cell.
Fig. 3 schematically shows the sketch map of the grid oxic horizon that I/O device in the prior art, core devices and last trombone slide device adopted.
Fig. 4 schematically shows the sketch map that has adopted the grid oxic horizon that the I/O device, core devices and the last trombone slide device that improve static random access memory according to the preferred embodiment of the invention and write the method for redundancy adopted.
Need to prove that accompanying drawing is used to explain the present invention, and unrestricted the present invention.Notice that the accompanying drawing of expression structure possibly not be to draw in proportion.And in the accompanying drawing, identical or similar elements indicates identical or similar label.
Embodiment
In order to make content of the present invention clear more and understandable, content of the present invention is described in detail below in conjunction with specific embodiment and accompanying drawing.
In CMOS logical device technology, comprise I/O device (I/O device) and two kinds of main devices of core devices (Core device) usually, the I/O device is mainly used in the signal input and the output of chip and peripheral circuit; Because the I/O device need bear higher voltage, so the grid oxic horizon of I/O device is thicker usually.Core devices is mainly used in the logical operation of chip internal etc., because it needs rapid speed, so the grid oxic horizon of core devices is thinner usually.That is to say that the grid oxic horizon of I/O device is thicker usually with respect to core devices.
Equally, static random access memory comprises and contains I/O device and core devices.
Special, for the last trombone slide of static random access memory, because it is a core devices, so in the technology of common prior art, last trombone slide can adopt thin grid oxic horizon.
Fig. 3 is in the common technology; For the various devices on the substrate 100; The sketch map of the grid oxic horizon that I/O device A, last trombone slide device 6 and other core devices B (other core devices B has expressed the core devices outside the last trombone slide device 6) are adopted; I/O device A adopts thicker grid oxic horizon G1, and other core devices B and last trombone slide device 6 (also being a core devices) adopt thin grid oxic horizon G2.
On the contrary, Fig. 4 is among the present invention, and last trombone slide device 6 adopts the sketch map of thicker grid oxic horizon G1.
Wherein, for the various devices on the substrate 100, other core devices B adopts thin grid oxic horizon G2; Last trombone slide device 6 is the same with I/O device A; Adopt thicker grid oxic horizon G1, the threshold voltage of last trombone slide device 6 raises, and firing current reduces; Thereby increased the effective resistance of last trombone slide device 6, improved the redundancy that writes of random asccess memory.
Need to prove; Though Fig. 4 shows the thicker grid oxic horizon G1 of trombone slide device 6 and I/O device A employing same thickness; But; In concrete application example of the present invention, last trombone slide device 6 can not be absolute identical with the thickness of grid oxide layer of I/O device A, but can be different.
That is to say; In a preferred embodiment of the invention; Said static random access memory comprises I/O device A and core devices; And wherein said other core devices B comprises the trombone slide device, and said I/O device A is mainly used in the signal input and the output of chip and peripheral circuit, and the thickness of the grid oxic horizon of said I/O device A is greater than the thickness of the grid oxic horizon of other core devices B.For example; The thickness of grid oxic horizon that can make said I/O device A is than the big predetermined thickness of thickness of the grid oxic horizon of other core devices B (for example 0.001-0.1 micron etc.), perhaps makes the thickness of the grid oxic horizon of said I/O device A be the prearranged multiple of the thickness of the grid oxic horizon of other core devices B (for example 1.1 times etc.).
Wherein, in a preferred embodiment of the invention, in the static random access memory preparation process, can make the thickness of grid oxic horizon of trombone slide device 6 greater than the thickness of the grid oxic horizon of other other core devices B.For example, can make the thickness of grid oxic horizon of trombone slide device 6 be equal to, or greater than the thickness of the grid oxic horizon of I/O device A.More preferably, can make the thickness of grid oxic horizon of trombone slide device 6 equal the thickness of the grid oxic horizon of I/O device A, can make that like this manufacturing process is simpler.
For example; The preferred embodiments of the present invention are in the static random access memory preparation process; Adopt the grid oxic horizon of the thick grid oxic horizon of I/O device A as last trombone slide device 6; Improved the threshold voltage of last trombone slide device 6, increased the equivalent resistance of last trombone slide device 6, improved random asccess memory and write redundancy.
In a preferred embodiment of the invention, the thickness of the grid oxic horizon of trombone slide device 6 in the increase makes the threshold voltage of going up trombone slide device 6 raise, and firing current reduces, thereby has increased the equivalent resistance of last trombone slide device 6.
More particularly, can be for example through logical operation (Logic Operation), in preparation during the grid oxic horizon in trombone slide device 6 zones; The thick grid oxic horizon that is used for I/O device A of growth before not removing makes that going up trombone slide device 6 finally adopts thick grid oxic horizon as its grid oxic horizon, because the grid oxic horizon of last trombone slide device 6 becomes thick grid oxic horizon; The threshold voltage of last trombone slide device 6 raises; Firing current reduces, thereby has increased the equivalent resistance of last trombone slide device 6, in ablation process; Reduce the current potential of node 8, thereby improved the redundancy that writes of random asccess memory.
In addition, according to another preferred embodiment of the invention, the present invention also provides a kind of static random access memory manufacturing approach that has adopted above-mentioned raising static random access memory to write the method for redundancy.
For example, preferably, the above embodiment of the present invention can be applicable among 45nm and the following static random access memory preparation technology, writes redundancy to improve it.
In general, the raising static random access memory according to the present invention static random access memory manufacturing approach that writes the method for redundancy and adopted this raising static random access memory to write the method for redundancy at least also has following technique effect:
1. do not increase existing processing step.
2. increase the thickness of the grid oxic horizon of going up trombone slide device 6, make the threshold voltage of going up trombone slide device 6 raise, firing current reduces, thereby has increased the equivalent resistance of last trombone slide device 6.
3. particularly; Can be in preparation during the grid oxic horizon in trombone slide device 6 zone, the thick grid oxic horizon that is used for the I/O device of growth before not removing makes and goes up that trombone slide device 6 is final to adopt thick grid oxic horizon as its grid oxic horizon; Because the grid oxic horizon of last trombone slide device 6 becomes thick grid oxic horizon; The threshold voltage of last trombone slide device 6 raises, and firing current reduces, thereby has increased the equivalent resistance of last trombone slide device 6; And said process can be realized through logical operation.
4. in ablation process, reduce the current potential of node 8, thereby improved the redundancy that writes of random asccess memory.
Need to prove, I/O device A is shown, goes up trombone slide device 6 and other other core devices B only is used to represent the thickness of the grid oxic horizon between them with the mode of adjacency side by side, rather than be used for the position between them is limited.
It is understandable that though the present invention with the preferred embodiment disclosure as above, yet the foregoing description is not in order to limit the present invention.For any those of ordinary skill in the art; Do not breaking away under the technical scheme scope situation of the present invention; All the technology contents of above-mentioned announcement capable of using is made many possible changes and modification to technical scheme of the present invention, or is revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical scheme of the present invention, all still belongs in the scope of technical scheme protection of the present invention any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.
Claims (7)
1. one kind is improved the method that static random access memory writes redundancy; Said static random access memory comprises I/O device and core devices; And wherein said core devices comprises the trombone slide device; Said I/O device is used for the signal input and the output of chip and peripheral circuit; And the thickness of the grid oxic horizon of said I/O device is characterized in that greater than the thickness of the grid oxic horizon of core devices the method that said raising static random access memory writes redundancy comprises: the thickness of grid oxic horizon that makes the trombone slide device is greater than the thickness of the grid oxic horizon of other core devices.
2. raising static random access memory according to claim 1 writes the method for redundancy, it is characterized in that, makes the thickness of the grid oxic horizon of trombone slide device equal the thickness of the grid oxic horizon of I/O device.
3. raising static random access memory according to claim 1 and 2 writes the method for redundancy; It is characterized in that; The thickness of the said grid oxic horizon that makes the trombone slide device comprises greater than the step of the thickness of the grid oxic horizon of other core devices: in preparation during the grid oxic horizon of trombone slide device; The grid oxic horizon that is used for the I/O device of growth before not removing, the grid oxic horizon that feasible upward trombone slide device finally adopts the I/O device is as its grid oxic horizon.
4. raising static random access memory according to claim 1 and 2 writes the method for redundancy, it is characterized in that, the thickness of the grid oxic horizon of said I/O device is than the big predetermined thickness of thickness of the grid oxic horizon of core devices.
5. raising static random access memory according to claim 1 and 2 writes the method for redundancy, it is characterized in that, the thickness of the grid oxic horizon of said I/O device is the prearranged multiple of thickness of the grid oxic horizon of core devices.
6. raising static random access memory according to claim 1 and 2 writes the method for redundancy, it is characterized in that, the method that said raising static random access memory writes redundancy is used for 45nm and following static random access memory preparation technology.
7. a static random access memory manufacturing approach is characterized in that having adopted the method that writes redundancy according to the described raising static random access memory of one of claim 1 to 6.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112670155A (en) * | 2019-10-15 | 2021-04-16 | 力旺电子股份有限公司 | Method for manufacturing semiconductor structure and controlling thickness of oxide layer |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US6442061B1 (en) * | 2001-02-14 | 2002-08-27 | Lsi Logic Corporation | Single channel four transistor SRAM |
| US20030218218A1 (en) * | 2002-05-21 | 2003-11-27 | Samir Chaudhry | SRAM cell with reduced standby leakage current and method for forming the same |
| CN102024819A (en) * | 2009-09-18 | 2011-04-20 | 台湾积体电路制造股份有限公司 | Apparatus for providing SRAM and CAM bit cell |
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- 2012-05-04 CN CN2012101379552A patent/CN102664167A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6442061B1 (en) * | 2001-02-14 | 2002-08-27 | Lsi Logic Corporation | Single channel four transistor SRAM |
| US20030218218A1 (en) * | 2002-05-21 | 2003-11-27 | Samir Chaudhry | SRAM cell with reduced standby leakage current and method for forming the same |
| CN102024819A (en) * | 2009-09-18 | 2011-04-20 | 台湾积体电路制造股份有限公司 | Apparatus for providing SRAM and CAM bit cell |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112670155A (en) * | 2019-10-15 | 2021-04-16 | 力旺电子股份有限公司 | Method for manufacturing semiconductor structure and controlling thickness of oxide layer |
| CN112670155B (en) * | 2019-10-15 | 2024-04-26 | 力旺电子股份有限公司 | Method for manufacturing semiconductor structure and controllable oxide layer thickness |
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Application publication date: 20120912 |