CN102662805B - Structure and method of bus-structure-based embryonic biomimetic self-healing - Google Patents
Structure and method of bus-structure-based embryonic biomimetic self-healing Download PDFInfo
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Abstract
本发明公开了一种基于总线结构的胚胎型仿生自修复结构及其方法，其自修复结构采用总线式阵列，所述总线式阵列包括工作细胞，备份细胞，输入细胞、输出细胞和总线，所有细胞通过并联方式连接在总线上，其中输入细胞连接在总线式阵列输入端的总线上，输出细胞连接在总线式阵列输出端的总线上。本发明提供的自修复结构，所有细胞只需与总线连接，布线简单；配置存储器只存储了自身细胞的配置信息，没有配置信息冗余，存储资源消耗小；自修复机制只需故障细胞和备份细胞直接参与，不改变其余细胞的配置信息和走线，效率更高。
The invention discloses an embryonic bionic self-repair structure based on a bus structure and a method thereof. The self-repair structure adopts a bus array, and the bus array includes working cells, backup cells, input cells, output cells and a bus, all The cells are connected to the bus in parallel, wherein the input cells are connected to the bus at the input end of the bus array, and the output cells are connected to the bus at the output end of the bus array. In the self-repair structure provided by the present invention, all cells only need to be connected to the bus, and the wiring is simple; the configuration memory only stores the configuration information of its own cells, there is no redundancy of configuration information, and the consumption of storage resources is small; the self-repair mechanism only needs faulty cells and backup The cells are directly involved, and the configuration information and wiring of other cells are not changed, which is more efficient.
Description
Technical field
The invention belongs to electronic technology and bionical self-repair technology field, be specifically related to a kind of based on the bionical selfreparing structure of bus-structured embryo type and method.
Background technology
Complicated along with digital display circuit, fault-tolerant ability has become the important indicator [1] of weighing a system performance.Traditional way is to improve the reliability [2] of system by critical component being carried out to multimode hardware redundancy.By the analysis to fault mode in advance, critical component is carried out to redundant configuration, in the time that fault occurs, switch, guarantee the normal operation of system.But hardware redundancy, can only redundancy critical component, therefore fault-tolerant ability limited [3,4] because the restriction of volume can not be carried out standby redundancy to all parts.In addition, hardware redundancy is to be based upon on the basis of people's accurate judgement to contingent fault in advance, and in the time there is unknown failure, redundancy fault-tolerant mechanism is just difficult to work, and therefore adaptive capacity to environment is poor.
Limited in one's ability in order to overcome traditional hardware redundancy fault-tolerant, the poor deficiency that waits of environmental suitability, people, using for reference on the basis of biological self diagnosis, self-replication and selfreparing, have proposed the bionical circuit of a kind of new fault tolerable circuit-embryo type.The bionical circuit of embryo is realized plate level or system-level fault-tolerant by the hardware backup of cell grade and the replacement of cell.Compare with traditional multi-mode redundant fault tolerant mechanism, its fault tolerance is by spontaneous the completing in cell distribution formula ground, and deviser does not need complicated design decision and the priori about working environment, and the stronger adaptive capacity to environment of adaptive capacity to environment is strong [5-7] more.Although the bionical circuit of embryo has many advantages than hardware redundancy circuit, the difficulty such as it exists in actual applications, and resource consumption is large, difficult wiring, selfreparing efficiency are low.
The bionical circuit of existing embryo type is the equally distributed two-dimensional array [8] being connected and composed by von Neumann neighbour by the identical electronic cell of structure, as shown in Figure 1.Each cell in the two-dimensional array of homogeneous texture can only directly communicate with adjacent cell, be subject to the restriction of communication mode, complexity not only connects up while realizing unicellular removing, removable cell quantity is also limited, and when realizing row (column) and removing, the wasting of resources is large---and a large amount of normal cells are removed because of fault cell.Therefore, improving communication mode is a kind of feasible way of bionical embryo type circuit further being pushed to practical application.
Summary of the invention
The object of this invention is to provide a kind of restriction that is not subject to communication mode, wiring is simple, and storage resource consumption is little, efficiency higher based on the bionical selfreparing structure of bus-structured embryo type and method.
The technical scheme that realizes the object of the invention employing is as follows:
Provided by the invention based on the bionical selfreparing structure of bus-structured embryo type, adopt bus type array, described bus type array comprises working cardial cell, backup cell, input cell, output cell and bus, all cells is connected in bus by parallel way, wherein inputs in the bus that cell is connected to bus type array input end, and output cell is connected in the bus of bus type array output end.
Described cell comprises functional module, config memory, input/output module, control module; Wherein, the input/output terminal of config memory is connected with the first input/output terminal of control module, the output terminal of config memory is connected with the first input end of functional module, the output terminal of control module is connected with the second input end of functional module, the second input/output terminal of control module is connected with the first input/output terminal of input/output module, the second input/output terminal of input/output module is connected with the input/output terminal of functional module, and the 3rd input/output terminal of input/output module is connected with bus.
The figure place of bus is at least 11, wherein at least comprises 1, fault-signal line, 3 of instruction 1 signal wires, 3 of instruction 2 signal wires, 2 of address signal lines, 2 of data signal lines.
Provided by the invention based on the bionical self-repair method of bus-structured embryo type, utilize working cardial cell, backup cell, input cell, output cell and bus form a bus type array, all cells is connected in bus by parallel way, wherein input in the bus that cell is connected to bus type array input end, output cell is connected in the bus of bus type array output end, in the time that working cardial cell breaks down, working cardial cell informs by failure message the backup cell that predefined priority is the highest by bus by control module, the backup cell capture fault-signal that priority is the highest also establishes a communications link with fault cell, meanwhile the backup cell of all the other priority levels subtracts one by the address of self and reaches the object that improves one-level priority, fault cell passes to backup cell by own transparence by the configuration information of self by bus, backup cell receives configuration information and carries out self configuration, then carry out corresponding function, complete array selfreparing.
Described input cell, output cell, working cardial cell and backup cell are pressed following communication protocol work:
Input cell:
1) when instruction 1 and instruction 2 is 000 and fault-signal while being 0, from the export-oriented bus input of bus type array data, the beginning that mark once calculates;
2), in the time detecting that instruction 2 is 110, output high resistant, decontrols bus.
Output cell:
1) when detecting that instruction 1 is 111 and fault-signal while being 0, take off data and feed back 111 to bus by instruction 2 from bus, then data are outputed to outside array;
2), in the time that detection instruction 1 is 000, output high resistant, decontrols bus;
Working cardial cell:
1) input data: in the time detecting that address is own cell address or public address, input data, inform by instruction 2 cell that sends data after having inputted, and then detect instruction 1, data input next time or output high resistant are carried out in judgement;
2) output data: when calculating completes and when fault-signal is 0, to bus output data, judges reception condition and determine to continue output data or output high resistant by detecting instruction 2, output data are made up of instruction 1, data and destination address three parts;
Backup cell:
1), in the time that fault-signal is 1, the backup cell that priority level is the highest is exported 001 by instruction 2 and is set up and contact with fault cell, then completes the transmission of configuration information according to Normocellular communication protocol;
2) when fault-signal is 1, and to detect instruction 1 be 001 o'clock, and priority level is not the highest cell by the mode of self address decrement is promoted to one-level priority.
In higher organism body, have a kind of general cell communication mode---endocrine communication, between cell, can realize communication, one-to-many communication and many-one communication between two by hormone, communication mode is flexible, and collaboration capabilities is strong.The similarity that the bus communication of consideration electronic technology is communicated by letter with biological cell endocrine, the present invention has used for reference this communication mechanism of higher organism and has proposed based on bus-structured embryonic arrays structure and self-repair method.In the time of selfreparing, all cells only need be connected with bus, and wiring is simple; Config memory has only been stored the configuration information of self cell, there is no configuration information redundancy, and storage resource consumption is little; Selfreparing mechanism only needs fault cell and backup cell to participate in directly, should not become all the other cell configuration information and cablings, and efficiency is higher.
Further illustrate technical scheme of the present invention below in conjunction with accompanying drawing.
Accompanying drawing explanation
Fig. 1 is the bionical circuit diagram of existing embryo type.
Fig. 2 is the bionical selfreparing structural representation of embryo type of the present invention.
Fig. 3 is the structural representation of cell in the present invention.
Fig. 4 is the schematic diagram that in the present invention, cell is connected with bus.
Fig. 5 is the structural representation of input/output module in cell of the present invention.
Fig. 6 is the concrete repair process schematic diagram of bus type array of the present invention.
Fig. 7 is Basic Principle of Fuzzy Control System block diagram.
Fig. 8 is membership function and the distribution plan thereof of fuzzy set.
Fig. 9 is the application example schematic diagram of the bionical selfreparing structure of embryo type of the present invention.
Figure 10 is the structural representation of functional module in application example cell of the present invention.
Figure 11 is the simulation result figure of application example of the present invention.
Embodiment
Referring to Fig. 2, provided by the invention based on the bionical selfreparing structure of bus-structured embryo type, adopt bus type array, bus type array, by working cardial cell, backs up cell, input cell, output cell and bus form, X represents the input end of array, and U represents the output terminal of array, and all cells is connected in bus by parallel way, wherein input in the bus that cell is connected to bus type array input end X, output cell is connected in the bus of bus type array output end U.
Simulated-bus the function of body fluid in cell endocrine communication, be the public passage that information is transmitted, the number of lead wires in bus can be set flexibly according to reality.The figure place of the bus of the present invention's design is at least 11, is made up of fault-signal line, instruction 1 signal, instruction 2 signal wires, address signal line and data signal line.It is the structure of 11 that Fig. 3 shows bus, wherein 1, fault-signal line, 3 of instruction 1 signal wires, 3 of instruction 2 signal wires, 2 of address signal lines, 2 of data signal lines; Fault-signal line is used for transmitting fault-signal; Instruction 1 signal wire transmits instruction 1, for telling the object of other cell transmission data; Instruction 2 lines transmit instruction 2, the response condition for detection of other cells to this cell output data; Address signal line is used for transmitting address signal; Data signal line is for intercellular data transmission; All cells is identical with the connected mode of bus.For bus during without any data transmission testbus can obtain determined value 0, the present invention pulls down to 0 by all positions of bus.
Cell in bus type array has identical basic structure.As shown in Figure 4, cell is mainly made up of parts such as functional module, config memory, input/output module, control modules; Wherein, the input/output terminal Conf_inout of config memory is connected with the input/output terminal Contr_inout1 of control module, be convenient to the change of the configuration information of control module control configuration module, the output terminal Conf_out of config memory is connected with the input end Func_in2 of functional module, for the logic function of configuration feature module; The output terminal Contr_out of control module is connected with the input end Func_in1 of functional module, be convenient to the implementation status of control module measuring ability module logic function, the input/output terminal Contr_inout2 of control module is connected with the input/output terminal IO_inout 1 of input/output module, for the exchanges data of control inputs output module and bus; The input/output terminal IO_inout2 of input/output module is connected with the input/output terminal Func_inout of functional module, for the exchanges data of these two modules; The input/output terminal IO_bus of input/output module is connected with bus, for the exchanges data of bus.The function of each cell: the major function of input, output cell is the input and output that complete data according to the duty of bus; Working cardial cell is realized the logic function of array; Backup cell is for replacing fault cell.Each working cardial cell has been worked in coordination with the function of whole array.Working cardial cell is identical with backup eucaryotic cell structure, and the configuration information that function is stored by config memory determines, the configuration information that the function of working cardial cell and backup cell is stored by config memory determines there is unique cell address.With working cardial cell and backup cell difference be that input cell has increased an input end, for the data outside receiving array.Output cell has increased an output terminal in the structure of working cardial cell, for the data of array are outputed to outside array.All positions in bus are all connected (referring to Fig. 5) with input/output module.
1, config memory
Config memory in cell of the present invention is the same with config memory structure of the prior art, is all common storer.Both differences are the configuration information difference of storage just.Existing config memory is not only stored the configuration information of self cell, also to store the configuration information of the even whole array of flanking cell, consume a large amount of storage resources, config memory in cell of the present invention is only stored self configuration information, there is no the redundancy of configuration information, can reduce resource consumption.The content of configuration information: the configuration information of cell is by cell function module configuration information, cell self address, target cell address, the backup cell address that priority is the highest and cell state five parts compositions, as shown in table 1.Wherein cell function module configuration information is determined the logic function of cell; Cell self address is used for determining whether to receive bus data; Target cell address is the address of the transmission object of result of calculation; Repairing address is the backup cell address that priority is the highest, the target cell address of transmission of configuration information while being also fault generation; Cell state mainly contains work, backup and transparent three kinds, represents respectively with 01,00 and 11.The figure place of each ingredient is uncertain, can change according to practical situations.
Table 1 configuration information composition
2, input/output module
Traditional input/output module realizes based on MUX, need to complete the signal transmission of four direction, and wiring is complicated.Input/output module in cell of the present invention only need to realize the data transmission of both direction, i.e. the bi-directional of cell and bus, and wiring is simple, can adopt prior art to carry out routine and select.According to the feature of bus communication, input/output module is mainly made up of bidirectional buffer and register, Fig. 5 shows a kind of structure of input/output module in cell of the present invention, and register has two of input register and output registers, and the number of bidirectional buffer is identical with the figure place of bus.The A1 (A2...An) of bidirectional buffer 1 (2...n) meets the output terminal Reg_out of output register, the B1 (B2...Bn) of bidirectional buffer 1 (2...n) meets the input end Reg_in of input register, and the C1 (C2...Cn) of bidirectional buffer connects position corresponding in bus.
3, functional module completes corresponding logic function according to actual application, can adopt prior art to carry out routine and select.
4, control module can adopt prior art to carry out routine selection according to the control function that will complete, and its function is: 1) complete the exchange of data according to the communication protocol control inputs output module of bus; 2), in the time breaking down, self-repair method is realized array selfreparing designed according to this invention.
Because the position of each cell in bus is equality, realize smoothly array reconfiguration and must set the priority that backs up cell.The present invention utilizes the address of backup cell to determine priority, and first initialization address, in the each reconstruct of array, respectively backs up cell and adjusts self address, changes priority.
Communication protocol is the assurance that iuntercellular is realized correct data exchange, and the communication protocol of the present invention's design is as follows:
Input cell:
1) in the time being 000 from instruction 1 and instruction 2 of instruction 1 signal wire, instruction 2 signal wires receptions and being 0 from the fault-signal of fault-signal line reception, input data, the beginning that mark once calculates by data signal line from the export-oriented bus of bus type array;
2), in the time detecting that the instruction 2 of instruction 2 signal wires is 110, output high resistant, decontrols bus.
Output cell:
1) when detecting that the instruction 1 of instruction 1 signal wire is 111 and the fault-signal of fault-signal line while being 0, take off data and feed back 111 to bus by instruction 2 signal wires from bus by data signal line, then data are outputed to outside array;
2), in the time detecting that the instruction 1 of instruction 1 signal wire is 000, output high resistant, decontrols bus;
Working cardial cell:
1) input data: in the time detecting that address on address signal line is own cell address or public address, input data by data signal line, after having inputted, inform by instruction 2 signal wires the cell that sends data, then detect instruction 1, data input next time or output high resistant are carried out in judgement;
2) output data: when calculating completes and when fault-signal is 0, by data-signal alignment bus output data, judge reception condition and determine to continue output data or output high resistant by detecting instruction 2, output data are made up of instruction 1, data and destination address three parts;
Backup cell:
1), in the time that fault-signal is 1, the backup cell that priority level is the highest is set up and is contacted with fault cell by instruction 2 signal wire outputs 001, then completes the transmission of configuration information according to Normocellular communication protocol;
2) when fault-signal is 1, and to detect instruction 1 be 001 o'clock, and priority level is not the highest cell by the mode of self address decrement is promoted to one-level priority.
Selfreparing mechanism of the present invention
Conventional selfreparing mechanism has two kinds at present: row (column) removes and removes [8,9] with cell.Row (column) removes mode because a cell fault will remove whole row (column), and the wasting of resources is many.Cell removes the problem that can solve the utilization of resources, but wiring complexity between cell has limited recoverable cell quantity to a certain extent.
The present invention has proposed new cell according to the design feature of designed bus type array and has removed mechanism---and backup cell is directly replaced fault cell.As shown in Figure 6, the concrete repair process of bus type array is as follows: in the time that working cardial cell breaks down, become fault cell, control module informs by failure message the backup cell 1 that predefined priority is the highest by bus, the backup cell 1 that priority is the highest is caught fault-signal and is established a communications link with fault cell, and meanwhile the backup cell 2 of all the other priority levels subtracts an object that reaches raising one-level priority by the address of self and becomes new backup cell 1.Fault cell passes to backup cell 1 by own transparence by the configuration information of self by bus.Backup cell 1 receives configuration information and carries out self configuration, and then carrying out corresponding function becomes new working cardial cell 1, and other the normal work of working cardial cell 2,3,4 is constant, completes array selfreparing.
The present invention is for design and the checking of fuzzy controller
By design based on bus-structured embryo type one-level straight line inverted pendulum fuzzy controller and verify the validity of designed array structure and self-repair method by injecting the mode of fault.
1, design of Fuzzy Controller
Fuzzy control system is as Fig. 7, and wherein fuzzy controller forms [9] by obfuscation, fuzzy reasoning and de-fuzzy three parts.
The fuzzy model that the present invention selects is Mamdani model, and the quantity of fuzzy rule is with the number exponent function relation [9] of input quantity.In order to control the quantity of fuzzy rule, the present invention utilizes compositional variable method [10] that the input of inverted pendulum fuzzy controller is synthesized to composition error E and composition error rate of change EC.
1) obfuscation
According to working control accuracy requirement, composition error E, composition error rate of change EC and output quantity Z are set as 8 signed numbers, and domain is [96,96].NB, NM, NS, ZE, PS, PM, PB is the fuzzy subset on domain X (Y)=[96,96], represent successively " in negative large, negative, negative little, zero, just little, center, honest " Linguistic Value.The membership function of fuzzy set is " triangle " function, and registration is 2, i.e. any one input belongs at most two fuzzy sets, as shown in Figure 8.
For avoiding multiplication and division computing to consume a large amount of resources, the present invention adopts position choice and plus and minus calculation to calculate the degree of membership [11] of each input quantity.8 scale-of-two supposing input are X[7:0], represent respectively two subordinate functions corresponding to input quantity (subordinate function of MF1 as keeping left) take MF1 and MF2, the coding of membership function is as shown in table 2.
Table 2 membership function coding
| NB | NM | NS | ZE | PS | | PB | |
| E | |||||||
| 101 | 110 | 111 | 000 | 001 | 010 | 011 | |
| |
101 | 110 | 111 | 000 | 001 | 010 | 011 |
Two the relative degrees of membership (scope is 0-31) that represent input quantity with MS1 and MS2, have:
MF1＝X[7:5]
MF2＝X[7:5]+1
MS1＝31-X[4:0]
MS2＝X[4:0]
Wherein X[7:5] represent the high 3 of input quantity X, X[4:0] represent that input quantity X's is low 5.
2) fuzzy reasoning
The fuzzy rule [13] of fuzzy controller that is obtained the dual input list output of Single Linear Inverted-Pendulum by expertise is as shown in table 3.Because the registration of ambiguity function is 2, any two input quantity E, it is not 0 fuzzy rule that EC can only trigger at most 4 degrees of membership.
Table 3 Single Linear Inverted-Pendulum fuzzy rule
3) de-fuzzy
Fuzzy implication computing adopts minimum computing, represents the degree of membership of certain fuzzy rule output Z with M_z, and M_e and M_ec are respectively the degree of membership of input E and EC, have:
M_z＝min(M_e，M_ec)
Defuzzification uses maximum membership degree-principle of minimum [10], and maximum output degree of membership is:
M_Z_max＝max{M_z_1，M_z_2，M_z_3，M_z_4}
Wherein M_z_n (n=1,2,3,4) is non-zero fuzzy rule degree of membership, and the output valve of fuzzy controller is:
Z＝{xxx，{5′b11111-M_Z_max[4:0]}}
Wherein xxx represents to export the numbering of membership function, as shown in table 4, and 5 ' b11111 represents binary number 11111, M_Z_max[4:0] represent the low 5 of maximum membership degree output.
2, embryo type fuzzy controller is realized
1) function differentiation
Inputting arbitrarily E and EC, can only to trigger at most 4 degrees of membership be not 0 fuzzy rule, and 4 fuzzy rules are adjacent in the position of table 5.Due to the straightforward procedure that the present invention adopts plus and minus calculation and position to accept or reject, calculation resources consumes little, and in order to control the quantity of cell, each cell is processed the fuzzy operation of 4 adjacent fuzzy rules.Therefore, need altogether 36 working cardial cells, 2 input and output cells.Backup cell is designed to 6, and bus type array one has 44 cells.
2), bus structure:
The figure place of bus is 29, and wherein fault-signal line is 1, and instruction 1 signal wire is that 3 bit instruction 2 signal wires are 3, and address signal line is 6, and data signal line is 16, as shown in table 4.
Table 4 bus data form
| | Fault | Instruction | 1 | |
| Data |
| Position | ||||||
| 0 | 1～3 | 4～6 | 7～12 | 13～28 |
The implication of instruction 1 and instruction 2 is as shown in table 5.
Table 5 command signal form
3) function module design
Known by analysis above, the logic function of functional module mainly contains a choice, plus and minus calculation and minimizing operation.Therefore, functional module is mainly made up of comparer, totalizer and look-up table, and as shown in Figure 9, LUT is look-up table, is made up of code translator, and the content of look-up table is the rule of the fuzzy controller of this cell of fuzzy controller.
4) config memory design
Config memory is only stored the configuration information of self cell.The configuration information of functional module is four fuzzy rules, and the result of calculation of cell only need to be transferred to output cell, does not need target cell address.Therefore, the configuration information of working cardial cell (take the cell of fuzzy rule of realizing table 3 upper left corner as example) as shown in table 6.
Table 6 working cardial cell configuration information
3, simulating, verifying
In order to verify the validity of fuzzy controller and array self-repair function, the present invention utilizes the ISE software of Xilinx company to carry out corresponding emulation, and simulation result as shown in figure 11.In figure, clk is simulation clock, and frequency is 50Mhz.F_out is the output of array, and E and EC are the inputs of array, and as can be seen from the figure array has correctly been realized the logic function of fuzzy controller; Bus_io is bus signals, wherein Bus_io[0] be bus failure signal wire; Fault_cell is fault Injection Signal, in 200ns, injects fault to cell 1, as seen from Figure 11: array has been eliminated fault in 260ns, enters normal operating conditions, has completed selfreparing.
List of references
[1] Liu Hui, Zhu Mingcheng. a kind of Novel bionic hardware fault-tolerant system---embryo electronic system [J]. semiconductor technology, 2002,27 (5): 29-32
[2]H Kim，H J Jeon，K Lee.The Design and Evaluation of all Voting Triple Modular Redundancy System[C].Proc of the 2002 Reliability and Maintainability Symposium，2002：439-444
[3] Zheng Ruijuan, Wang Huiqiang. the biological fault-tolerant calculation technical research [J] inspiring. computer engineering and application, 2006,42 (4): 30-34
[4] woods is brave. the fault-tolerance approach research [D] based on Evolvable hardware. and Hefei: China Science & Technology University, 2007
[5] Zhou Guifeng. the bionical self-repair technology research of FIR wave filter [D] based on embryo type cellular circuit. Changsha: the National University of Defense Technology, 2010
[6] Yang Shanshan. the design of Embryonic System cellular circuit and self-repair method research [D]. Nanjing: Nanjing Aero-Space University, 2007
[7]G.L.Smith，L.Torre.Techniques to Enable FPGA Based Reconfigurable Fault Tolerant Space Computing[C].IEEE Aerospace Conference，2006：4-11
[8]S Wolfram.Theory and Applications of Cellular Automata[C].World Scientific，1986
[9] Ding Xueming. fuzzy control theory research and the application [D] in mobile inverted pendulum thereof. China Science & Technology University, 2005
[10] Huang is built Na Liu Lixin, Tang Jiansheng. the application of fuzzy control theory [J] in single inverted pendulum system. and Chinese manufacturing informationization, 2008:4
[11] Zhao Dongfang. the design of the fuzzy controller based on FPGA and realization [D]. Jiangsu: Jiangsu University, 2005.
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| CN104009749B (en) * | 2014-03-19 | 2017-01-18 | 中国人民解放军国防科学技术大学 | Modularization self-organization configuration circuit for reconfigurable hardware circuit |
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| CN105446836B (en) * | 2015-12-31 | 2017-12-01 | 中国科学院半导体研究所 | Embryonic arrays fault diagnosis system and diagnostic method based on biological immunological mechanism |
| CN106650103B (en) * | 2016-12-23 | 2018-05-08 | 中国人民解放军军械工程学院 | The design method of the fault detection circuit of part duplication redundancy |
| CN106777719B (en) * | 2016-12-23 | 2018-05-08 | 中国人民解放军陆军工程大学 | Fault detection method of dual-mode redundant fault detection device |
| CN106951955B (en) * | 2017-03-09 | 2019-12-17 | 中国人民解放军军械工程学院 | A method for selecting the number of electronic cells in the bus embryonic electronic cell array |
| CN109815589B (en) * | 2019-01-25 | 2022-12-09 | 中国人民解放军国防科技大学 | Bionic self-repair hardware fast wiring method and system |
| CN110210102B (en) * | 2019-05-27 | 2022-11-11 | 中国人民解放军国防科技大学 | Bionic Self-healing Hardware Distributed Global Dynamic Routing System |
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| CN110188453A (en) * | 2019-05-27 | 2019-08-30 | 中国人民解放军国防科技大学 | bionic self-repairing hardware dynamic layout optimization method and system |
| CN110188453B (en) * | 2019-05-27 | 2021-01-15 | 中国人民解放军国防科技大学 | Bionic self-repairing hardware dynamic layout optimization method and system |
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