CN110825687B - Dual-mode tracking method based on DSP multi-core architecture - Google Patents
Dual-mode tracking method based on DSP multi-core architecture Download PDFInfo
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Abstract
The invention relates to a dual-mode tracking method based on a DSP multi-core architecture, and belongs to the technical field of infrared imaging seeker equipment software terminal guidance. According to the multi-core architecture dual-mode tracking method, the multi-core DSP is utilized to achieve higher coupling and calculation efficiency, parallel calculation of complex tracking algorithms such as deep learning is increased, decision fusion is conducted on target position information by utilizing dual-mode tracking results, and tracking accuracy of tracking software in complex battlefield environments such as shielding is effectively improved.
Description
Technical Field
The invention belongs to the technical field of infrared imaging seeker equipment software terminal guidance, and particularly relates to a dual-mode tracking method based on a DSP multi-core architecture.
Background
According to the operational requirement of a missile weapon system, the infrared seeker needs to have stable tracking capability on a ground fixed target, and the terminal guidance tracking of a certain multi-type infrared imaging seeker on the ground fixed target is mainly based on template matching tracking.
Disclosure of Invention
First, the technical problem to be solved
The invention aims to solve the technical problems that: how to solve the technical problems that the universality of the traditional single-mode tracking algorithm is insufficient, the stable tracking capability of targets in typical battlefield environments such as shielding cannot be covered, and the processing capability of the traditional single-core DSP is difficult to meet the processing requirement of the complex tracking algorithm.
(II) technical scheme
In order to solve the technical problems, the invention provides a dual-mode tracking method based on a DSP multi-core architecture, wherein a master-slave parallel processing mode is designed in the method, an inter-core communication mechanism is established, a rapidIO interface is adopted to receive real-time image data from an FPGA and buffer the real-time image data into DDR3 of a dual-mode tracking module, the dual-mode tracking module is realized by adopting a DSP and comprises a buffer area DDR3, a master core and a slave core, a current image is addressed in the DDR3 and distributed to corresponding addresses of the master core and the slave core in the tracking process, the master core and the slave core respectively complete current frame image tracking and positioning, an interrupt signal is sent to the master core after the slave core finishes tracking, and the master core responds to the interrupt to complete dual-mode tracking result fusion.
Preferably, the RapidIO interface is configured into a DirectIO transmission mode, a communication mode and a baud rate are set through function parameters, and a mapping relation between a core number and a doorbell number is set according to the core number operated by the DSP and the doorbell number used by the FPGA, so that real-time image data is received in a ping-pong structure mode.
Preferably, in the method, the DDR3 working frequency is configured according to the frequency multiplication and frequency division parameters, the data bit width of the DDR3 is set, and 512MB DDR3 is allocated for CACHE and prefetching functions.
Preferably, the method adopts a mode of setting proxy tasks in the multi-core, achieves the purpose of multi-core parallel computing based on inter-IPC core communication, and after DDR3 addresses up to date frame real-time image data and addresses respectively distributed to a main core and a slave core, the main core sends an IPC interrupt message to inform the slave core of tracking computation, meanwhile, the main core starts the tracking computation in parallel, after the slave core completes the tracking computation, the main core sends an IPC interrupt message representing a completion signal to the main core, and the main core completes the fusion of dual-mode tracking results after receiving the IPC interrupt message sent by the slave core.
Preferably, when the dual-mode tracking results are fused, two-by-two combination judgment is performed according to the main core tracking state and the auxiliary core tracking state, the combination information of the tracking states including 4 cases is included, the Euclidean distance of two tracking points is calculated, meanwhile, the consistency of the dual-mode tracking image frame numbers and the tracking abnormality reasons are judged, the information fusion of the tracking results is completed through multi-feature information decision, and the fusion tracking results are obtained, wherein the multi-feature information includes the combination information of the tracking states, the Euclidean distance, the tracking abnormality reasons and the tracking image frame number consistency.
Preferably, the tracking state combination information of the 4 cases is as follows:
1: normal trace 0: and (5) carrying out anomaly tracking.
Preferably, the method further comprises the step of reporting the fusion result.
(III) beneficial effects
According to the multi-core architecture dual-mode tracking method, the multi-core DSP is utilized to achieve higher coupling and calculation efficiency, parallel calculation of complex tracking algorithms such as deep learning is increased, decision fusion is conducted on target position information by utilizing dual-mode tracking results, and tracking accuracy of tracking software in complex battlefield environments such as shielding is effectively improved.
Drawings
FIG. 1 is a schematic diagram of a dual-mode tracking method of a multi-core architecture of the present invention;
FIG. 2 is a flow chart of a multi-core parallel computing method of the present invention;
FIG. 3 is a flowchart of a tracking fusion method of the present invention.
Detailed Description
For the purposes of clarity, content, and advantages of the present invention, a detailed description of the embodiments of the present invention will be described in detail below with reference to the drawings and examples.
In the multi-Core architecture dual-mode tracking method, a master-slave parallel processing mode is designed, as shown in fig. 1, an inter-Core communication mechanism is established, a high-speed rapidIO interface is adopted to receive real-time image data from an FPGA and buffer the real-time image data into DDR3 of a dual-mode tracking module, the dual-mode tracking module is realized by adopting a DSP and comprises a buffer area DDR3, a master Core0 and a slave Core1, in the tracking process, a current image is addressed in the DDR3 and distributed to corresponding addresses of the master Core and the slave Core, the master Core and the slave Core respectively complete current frame image tracking and positioning, an interrupt signal is sent to the master Core after the slave Core finishes tracking, and the master Core responds to the interrupt to finish dual-mode tracking result fusion and report.
The rapidIO interface is a high-performance and low-pin-number interconnection interface aiming at an embedded system and the market, and has the characteristics of stable communication, low delay, low power consumption, high bandwidth, communication speed reaching Gbps and the like. The traditional single-core DSP tracking technology adopts an EMIF synchronous/asynchronous mode to receive real-time image data, the interface has limited transmission capacity for 640 x 512 x 8bit large area array real-time image data, and in order to solve the high-efficiency receiving of the image data and compress the image data receiving time, the invention designs a rapidIO interface to realize the real-time image data transmission between an FPGA and a DSP, the interface is configured into a DirectIO transmission mode, a communication mode and a baud rate are set through function parameters, and the mapping relation between a core number and a doorbell number is set according to the core number operated by the DSP and the doorbell number used by the FPGA, so that the real-time image data is efficiently received in a ping-pong structure mode, and the read-write conflict is avoided. Compared with the EMIF synchronous mode, the image receiving efficiency is improved by approximately 7 times, and compared with the EMIF asynchronous mode, the image receiving efficiency is improved by approximately 29 times, and the data transmission rate of the image interface is shown in Table 1.
Table 1 image interface data transmission rate table
The method comprises the steps of designing a DDR3 off-chip memory chip to CACHE 2s real-time images, setting the data bit width of DDR3, distributing DDR3 of 512MB to carry out CACHE and prefetching functions, and optimizing CACHE data access efficiency because access rates of an internal memory and an external memory of a DSP system are different by more than 20 times, wherein the access of a first-stage CACHE in a CPU core only needs 1 clock period, the two-stage CACHE and a multi-core shared memory only needs two clock periods, and data read-write of DDR3 at least needs 20 DDR3 clock periods to be completed, and the DDR3 read-write rate is improved.
The multi-core parallel processing mechanism is designed, the multi-core parallel computing purpose is achieved based on the communication between IPC cores by adopting a mode of setting proxy tasks in the multi-cores, and the principle of the cooperative work of the master core and the slave core is shown in figure 2. After the DDR3 buffer area addresses the latest frame real-time image data, the addresses are respectively distributed to a main core and a slave core, the main core sends an IPC interrupt message to inform the slave core to carry out tracking calculation, meanwhile, the main core starts the tracking calculation in parallel, after the slave core completes the tracking calculation, the slave core sends an IPC interrupt message representing a completion signal to the main core, and the main core completes the fusion of dual-mode tracking results after receiving the IPC interrupt message sent by the slave core.
When the dual-mode tracking results are fused, two-by-two combination judgment is carried out according to the main core tracking state and the auxiliary core tracking state, the combination information of the tracking states including 4 conditions is shown in a table 2, the Euclidean distance of two tracking points is calculated, meanwhile, the consistency of the frame numbers of dual-mode tracking images and the reasons of tracking abnormity are judged, the information fusion of the tracking results is completed through the decision of multi-feature information (the combination information of the tracking states, the Euclidean distance, the reasons of tracking abnormity and the consistency of the frame numbers of the tracking images), the fusion tracking results are obtained as shown in fig. 3, the terminal guidance tracking drift phenomenon which occurs under the condition of low contrast of the target can be solved, and the false alarm rate is reduced.
Table 2 tracking status combinations
1: normal trace 0: anomaly tracking
The DSP-based multi-core architecture dual-mode tracking method can realize parallel calculation of a plurality of tracking algorithms, and improves terminal guidance tracking precision through fusion decision of the impact target position information. The method improves the tracking capability of the tracking software to the complex battlefield environment by increasing the complexity of the tracking algorithm, has expansibility to subsequent development based on the DSP multi-core architecture dual-mode tracking architecture standard, and can effectively shorten the subsequent development period.
The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and variations could be made by those skilled in the art without departing from the technical principles of the present invention, and such modifications and variations should also be regarded as being within the scope of the invention.
Claims (4)
1. A dual-mode tracking method based on a DSP multi-core architecture is characterized in that a master-slave parallel processing mode is designed in the method, an inter-core communication mechanism is established, a rapidIO interface is adopted to receive real-time image data from an FPGA and buffer the real-time image data into DDR3 of a dual-mode tracking module, the dual-mode tracking module is realized by adopting a DSP and comprises a buffer area DDR3, a master core and a slave core, in the tracking process, a current image is addressed in the DDR3 and distributed to corresponding addresses of the master core and the slave core, the master core and the slave core respectively complete current frame image tracking and positioning, an interrupt signal is sent to the master core after the slave core finishes tracking, and the master core responds to the interrupt to complete dual-mode tracking result fusion;
in the method, DDR3 working frequency is configured according to frequency multiplication and frequency division parameters, the data bit width of DDR3 is set, and 512MB DDR3 is allocated to carry out CACHE and prefetching functions;
when the dual-mode tracking results are fused, carrying out combination judgment on the dual-mode tracking results according to the main core tracking state and the secondary core tracking state, wherein the combination judgment comprises tracking state combination information of 4 conditions, the Euclidean distance of two tracking points is calculated, meanwhile, the consistency of the dual-mode tracking image frame numbers and the tracking abnormality reasons are judged, the information fusion of the tracking results is completed through multi-feature information decision, and the fusion tracking results are obtained, and the multi-feature information comprises tracking state combination information, euclidean distance, tracking abnormality reasons and tracking image frame number consistency;
the tracking state combination information of the 4 cases comprises a normal tracking state of the master core and the slave core, an abnormal tracking state of the master core and the slave core, and an abnormal tracking state of the master core and the slave core.
2. The method of claim 1, wherein the RapidIO interface is configured into a DirectIO transmission mode, a communication mode and a baud rate are set through function parameters, and real-time image data is received in a table-tennis mode according to a core number operated by the DSP and a doorbell number used by the FPGA.
3. The method of claim 1, wherein the method adopts a mode of setting proxy tasks in a multi-core, achieves the purpose of multi-core parallel computation based on inter-IPC (inter-processor controller) core communication, and after DDR3 addresses the latest frame real-time image data and addresses respectively allocated to a master core and a slave core, the master core sends an IPC interrupt message to inform the slave core to carry out tracking computation, and simultaneously the master core starts the tracking computation in parallel, after the slave core completes the tracking computation, sends an IPC interrupt message representing a completion signal to the master core, and the master core completes the fusion of dual-mode tracking results after receiving the IPC interrupt message sent by the slave core.
4. A method according to any one of claims 1 to 3, further comprising the step of reporting the fusion result.
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| WO2018120446A1 (en) * | 2016-12-31 | 2018-07-05 | 华中科技大学 | Parallel and coordinated processing method for real-time target recognition-oriented heterogeneous processor |
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