CN110825687A - Dual-mode tracking method based on DSP (digital Signal processor) multi-core architecture - Google Patents

Dual-mode tracking method based on DSP (digital Signal processor) multi-core architecture Download PDF

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CN110825687A
CN110825687A CN201911021218.4A CN201911021218A CN110825687A CN 110825687 A CN110825687 A CN 110825687A CN 201911021218 A CN201911021218 A CN 201911021218A CN 110825687 A CN110825687 A CN 110825687A
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CN110825687B (en
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张迪飞
杜海静
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Tianjin Jinhang Institute of Technical Physics
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Abstract

The invention relates to a dual-mode tracking method based on a DSP (digital Signal processor) multi-core architecture, belonging to the technical field of infrared imaging seeker equipment software end guidance. According to the invention, by designing a multi-core framework dual-mode tracking method, the parallel computation of complex tracking algorithms such as deep learning is increased by utilizing higher coupling and computation efficiency of a multi-core DSP, and the decision fusion of target position information is carried out by utilizing a dual-mode tracking result, so that the tracking accuracy of tracking software in complex battlefield environments such as shielding is effectively improved.

Description

Dual-mode tracking method based on DSP (digital Signal processor) multi-core architecture
Technical Field
The invention belongs to the technical field of software terminal guidance of infrared imaging seeker equipment, and particularly relates to a DSP-based multi-core architecture dual-mode tracking method.
Background
According to the operational use requirements of a missile weapon system, an infrared seeker needs to have stable tracking capability on a ground fixed target, at present, the last guidance tracking of a certain multi-type infrared imaging seeker on the ground fixed target is mainly based on template matching tracking, the algorithm has high calculation speed and can realize the stable tracking capability on the fixed target with a complex background, however, the algorithm cannot effectively cope with target shielding scenes such as weak texture/non-texture target scenes, cloud layers, fire light and the like, and further influences the tracking result.
Disclosure of Invention
Technical problem to be solved
The technical problem to be solved by the invention is as follows: the technical problems that the universality of the traditional single-mode tracking algorithm is insufficient, the stable tracking capability of a target under typical battlefield environments such as shielding cannot be covered, and the processing capability of the traditional single-core DSP is difficult to meet the processing requirement of a complex tracking algorithm are solved.
(II) technical scheme
In order to solve the technical problem, the invention provides a dual-mode tracking method based on a DSP multi-core architecture, a master-slave parallel processing mode is designed in the method, an inter-core communication mechanism is established, a RapidIO interface is adopted to receive real-time image data from an FPGA and cache the real-time image data into a DDR3 of a dual-mode tracking module, the dual-mode tracking module is realized by adopting a DSP and comprises a cache region DDR3, a master core and a slave core, in the tracking process, a current image is firstly addressed in the DDR3 and distributed to corresponding addresses of the master core and the slave core, the master core and the slave core respectively complete current frame image tracking and positioning, an interrupt signal is sent to the master core after the slave core finishes tracking, and the master core responds to interrupt to complete dual-mode tracking result fusion.
Preferably, the RapidIO interface is configured in a directoi transmission mode, a communication mode and a baud rate are set through function parameters, a mapping relation between a core number and a doorbell number is set according to the core number operated by the DSP and the doorbell number used by the FPGA, and real-time image data is received in a ping-pong structure mode.
Preferably, in the method, the operating frequency of the DDR3 is configured according to frequency multiplication and division parameters, the data bit width of the DDR3 is set, and 512MB of DDR3 is allocated to perform CACHE and prefetch functions.
Preferably, the method adopts a mode of setting proxy tasks in multiple cores, the purpose of multi-core parallel computing is achieved based on IPC inter-core communication, after DDR3 addresses the latest frame of real-time image data and is respectively allocated to the addresses of a main core and a slave core, the main core sends an IPC interrupt message to inform the slave core to perform tracking computing, meanwhile, the main core starts the tracking computing in parallel, after the slave core completes the tracking computing, the IPC interrupt message representing a completion signal is sent to the main core, and the main core completes the fusion of dual-mode tracking results after receiving the IPC interrupt message sent by the slave core.
Preferably, when the dual-mode tracking result is fused, pairwise combination judgment is carried out according to the tracking state of the master core and the tracking state of the slave core, the Euclidean distance of two tracking points is calculated according to the tracking state combination information of 4 conditions, meanwhile, the consistency of the frame number of the dual-mode tracking image and the reason of tracking abnormity are judged, the information fusion of the tracking result is completed through multi-feature information decision, and the fused tracking result is obtained, wherein the multi-feature information comprises the tracking state combination information, the Euclidean distance, the reason of tracking abnormity and the consistency of the frame number of the tracking image.
Preferably, the tracking state combination information of the 4 cases is shown in the following table:
Figure BDA0002247283930000031
1: normal tracking 0: and (6) exception tracking.
Preferably, the method further comprises the step of reporting the fusion result.
(III) advantageous effects
According to the invention, by designing a multi-core framework dual-mode tracking method, the parallel computation of complex tracking algorithms such as deep learning is increased by utilizing higher coupling and computation efficiency of a multi-core DSP, and the decision fusion of target position information is carried out by utilizing a dual-mode tracking result, so that the tracking accuracy of tracking software in complex battlefield environments such as shielding is effectively improved.
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FIG. 1 is a schematic diagram of a dual-mode tracking method for a multi-core architecture according to the present invention;
FIG. 2 is a flow chart of a multi-core parallel computing method of the present invention;
FIG. 3 is a flowchart of a tracking fusion method of the present invention.
Detailed Description
In order to make the objects, contents, and advantages of the present invention clearer, the following detailed description of the embodiments of the present invention will be made in conjunction with the accompanying drawings and examples.
In the multi-Core architecture dual-mode tracking method, a master-slave parallel processing mode is designed, as shown in fig. 1, an inter-Core communication mechanism is established, a high-speed RapidIO interface is adopted to receive real-time image data from an FPGA and cache the real-time image data into a DDR3 of a dual-mode tracking module, the dual-mode tracking module is realized by adopting a DSP and comprises a cache region DDR3, a master Core0 and a slave Core1, in the tracking process, a current image is firstly addressed in the DDR3 and distributed to corresponding addresses of the master Core and the slave Core, the master Core and the slave Core respectively complete current frame image tracking and positioning, an interrupt signal is sent to the master Core after the slave Core completes tracking, and the master Core responds to interrupt to complete dual-mode tracking result fusion and report.
The RapidIO interface is an interconnection interface with high performance and low pin count for an embedded system and the market, and has the characteristics of stable communication, low time delay, low power consumption, high bandwidth, high communication speed up to Gbps and the like. The traditional single-core DSP tracking technology adopts an EMIF synchronous/asynchronous mode to receive real-time image data, the transmission capability of the interface for 640 x 512 x 8bit large-area array real-time image data is limited, in order to solve the problem of high-efficiency receiving of the image data and compress the receiving time of the image data, the RapidIO interface is designed to realize the real-time image data transmission between the FPGA and the DSP, the interface is configured to be a DirectIO transmission mode, a communication mode and a baud rate are set through function parameters, the mapping relation between a core number and a doorbell number is set according to the core number operated by the DSP and the doorbell number used by the FPGA, the real-time image data is efficiently received in a ping-pong structure mode, and reading and writing conflicts are avoided. Compared with the EMIF synchronous mode, the image acquisition efficiency is improved by about 7 times, and compared with the EMIF asynchronous mode, the image acquisition efficiency is improved by about 29 times, and the image interface data transmission speed table is detailed in table 1.
TABLE 1 image interface data transmission rate table
Figure BDA0002247283930000041
Figure BDA0002247283930000051
The DDR3 chip external memory chip is designed to CACHE 2s real-time images, because the access speed difference between the internal and external memories of the DSP system is more than 20 times, the first-level CACHE access in the CPU core only needs 1 clock cycle, the second-level CACHE and the multi-core shared memory need two clock cycles, and the data read-write of the DDR3 can be completed only by at least 20 DDR3 clock cycles, in order to improve the DDR3 read-write speed, the DDR3 working frequency is configured according to the frequency multiplication and frequency division parameters, the data bit width of the DDR3 is set, the DDR3 of 512MB is distributed to perform CACHE and pre-fetch functions, and the CACHE data access efficiency is optimized.
A multi-core parallel processing mechanism is designed, a mode of setting proxy tasks in multi-core is adopted, the purpose of multi-core parallel computing is achieved based on IPC inter-core communication, and the principle of cooperative work of a main core and a slave core is shown in figure 2. After the DDR3 cache area addresses the latest frame of real-time image data, the addresses are respectively allocated to the main core and the slave core, the main core sends an IPC interrupt message to inform the slave core to perform tracking calculation, meanwhile, the main core starts the tracking calculation in parallel, after the slave core completes the tracking calculation, the IPC interrupt message representing a completion signal is sent to the main core, and after receiving the IPC interrupt message sent by the slave core, the main core completes the fusion of dual-mode tracking results.
And when the dual-mode tracking result is fused, pairwise combination judgment is carried out according to the tracking state of the master core and the tracking state of the slave core, the Euclidean distance of two tracking points is calculated according to the tracking state combination information of 4 conditions shown in the table 2, the frame number consistency of the dual-mode tracking image and the reason of tracking abnormity are judged at the same time, the information fusion of the tracking result is completed through multi-feature information (the tracking state combination information, the Euclidean distance, the reason of tracking abnormity and the frame number consistency of the tracking image) decision, as shown in the figure 3, the fused tracking result is obtained, the problem of terminal guidance tracking drift phenomenon generated under the condition of low contrast of a target can be solved, and the false alarm rate is reduced.
TABLE 2 tracking State combinations
Figure BDA0002247283930000061
1: normal tracking 0: anomaly tracking
The dual-mode tracking method based on the DSP multi-core architecture realizes the parallel calculation of a plurality of tracking algorithms, and improves the final guidance tracking precision through the fusion decision of the position information of the hit target. The method improves the tracking capability of tracking software to a complex battlefield environment by increasing the complexity of a tracking algorithm, has expansibility to subsequent development based on a DSP multi-core framework dual-mode tracking framework standard, and can effectively shorten the subsequent development period.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

Claims (7)

1. A dual-mode tracking method based on a DSP multi-core architecture is characterized in that a master-slave parallel processing mode is designed in the method, an inter-core communication mechanism is established, a RapidIO interface is adopted to receive real-time image data from an FPGA and cache the real-time image data into a DDR3 of a dual-mode tracking module, the dual-mode tracking module is realized by adopting a DSP and comprises a cache region DDR3, a master core and a slave core, in the tracking process, a current image is addressed in the DDR3 and distributed to corresponding addresses of the master core and the slave core, the master core and the slave core respectively complete current frame image tracking and positioning, an interrupt signal is sent to the master core after the slave core completes tracking, and the master core responds to interrupt to complete dual-mode tracking result fusion.
2. The method of claim 1, wherein the RapidIO interface is configured in a directoi transmission mode, a communication mode and a baud rate are set through function parameters, a mapping relation between a core number and a doorbell number is set according to a core number operated by the DSP and the doorbell number used by the FPGA, and real-time image data is received in a ping-pong structure mode.
3. The method of claim 1, wherein in the method, DDR3 operating frequency is configured according to frequency multiplication and division parameters, data bit width of DDR3 is set, and 512MB of DDR3 is allocated for CACHE and pre-fetch functions.
4. The method as claimed in claim 1, wherein the method adopts a mode of setting proxy tasks in multiple cores to achieve the purpose of multi-core parallel computing based on IPC inter-core communication, after DDR3 addresses the latest frame of real-time image data and is respectively allocated to the addresses of the master core and the slave core, the master core sends an IPC interrupt message to inform the slave core to perform tracking computing, meanwhile, the master core starts the tracking computing in parallel, after the slave core completes the tracking computing, the master core sends an IPC interrupt message indicating a completion signal to the master core, and after receiving the IPC interrupt message sent by the slave core, the master core completes the fusion of dual-mode tracking results.
5. The method as claimed in claim 1, wherein the dual-mode tracking result is fused by performing pairwise combination judgment according to the tracking state of the master core and the tracking state of the slave core, including the tracking state combination information of 4 cases, calculating the Euclidean distance between two tracking points, simultaneously judging the frame number consistency of the dual-mode tracking image and the reason of tracking abnormality, and completing information fusion of the tracking result through multi-feature information decision to obtain a fused tracking result, wherein the multi-feature information includes the tracking state combination information, the Euclidean distance, the reason of tracking abnormality and the frame number consistency of the tracking image.
6. The method of claim 5, wherein the tracking state combination information for the 4 cases is as shown in the following table:
1: normal tracking 0: and (6) exception tracking.
7. The method according to any one of claims 1 to 6, further comprising the step of reporting the fusion result.
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CN113094324A (en) * 2021-03-30 2021-07-09 上海机电工程研究所 Guidance information inter-core interaction method and system based on shared memory

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CN113094324A (en) * 2021-03-30 2021-07-09 上海机电工程研究所 Guidance information inter-core interaction method and system based on shared memory

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