CN102649538B - Silica glass bonding-based SOI MEMS (silicon on insulator micro electro mechanical system) preparation method - Google Patents

Silica glass bonding-based SOI MEMS (silicon on insulator micro electro mechanical system) preparation method Download PDF

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CN102649538B
CN102649538B CN201210110746.9A CN201210110746A CN102649538B CN 102649538 B CN102649538 B CN 102649538B CN 201210110746 A CN201210110746 A CN 201210110746A CN 102649538 B CN102649538 B CN 102649538B
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soi
silicon
silicon chip
etching
mems
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CN102649538A (en
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张照云
施志贵
彭勃
高杨
苏伟
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Institute of Electronic Engineering of CAEP
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Institute of Electronic Engineering of CAEP
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Abstract

The invention provides a silica glass bonding-based SOI MEMS (silicon on insulator micro electro mechanical system) preparation method which comprises the following steps of: photoetching the surface of an SOI silicon chip structure layer, and manufacturing a metal electrode by a stripping technology; photoetching the back side of a silicon chip, and etching the back-side silicon to an insulation layer; etching the insulation layer exposed out of the back side of the silicon chip; bonding the silicon chip with the glass; photoetching the front side of the silicon chip to define an MEMS structural region, and realizing a micro-structure by adopting DRIE (deep reactive ion etching) anisotropic etching; and splintering, packaging and testing. The silica glass bonding-based SOI MEMS preparation method provided by the invention takes the insulation layer as an etching self-stopping layer, and the structure layer is good in thickness uniformity; and the structure layer can not be directly bonded with the glass, so that the influence of the stress induced by the bonding between a substrate and the glass on the performance of an MEMS device can be reduced.

Description

A kind of SOI MEMS preparation method based on silex glass bonding
Technical field
The present invention relates to microelectromechanical systems micro-processing technology field, be particularly related to silicon (the Silicon on insulator on a kind of insulator based on silex glass bonding, SOI) microelectromechanical systems (Micro-electromechanical Systems, MEMS) preparation method.
Background technology
In recent years, MEMS technology had obtained development fast, all had wide application space in a lot of fields.MEMS manufacturing technology is divided into three kinds of body processing technology, surface processing technique and LIGA techniques.Because body processing technology, surface processing technique utilize silicon as rapidoprint, there is good mechanical property, the feature of mass has obtained application widely.But surface treatment mass thickness is little, membrane stress is large, sacrificial layer structure discharges difficulty, is difficult to meet the requirement of high-performance inertial sensor.Therefore high-performance MEMS sensor all adopts bulk silicon MEMS technology.Current, bulk silicon MEMS technology mainly contains following several method:
(1) heavy doping self-stopping technology dissolved silicon chip technique.It is first on dense boron diffusion silicon chip, to etch bonding table top and movable silicon structure graph by inductively coupled plasma etching (ICP) technology, then back-off and glass substrate anode linkage, finally use the anisotropic etchants such as ethylenediamine-catechol-water (being called for short EPW) to erode the not heavily doped silicon in the back side, thereby discharge movable silicon structure.The method has the advantages such as technique is simple, distribution capacity is little, but it exists following shortcoming:
(a) owing to adopting dense boron diffusion technique to prepare structure sheaf, make Laminate construction thickness be less than 40 microns, and stress is larger, has hindered the further raising of device performance.
(b) (silicon movable structure is pulled to glass pole plate by the last capillary attraction that uses deionized water or methyl alcohol to be easy to occur " liquid bridge " adhesion, after liquid evaporation, van der waals force can be close together two surfaces) phenomenon, thereby cause MEMS component failure, the device especially moving both vertically.
(c) use poisonous EPW chemicals, produce thus a large amount of waste liquids, be unfavorable for safety operation and environmental protection.
(2) bonding-deep etching release process.It is first on silicon chip, to etch bonding table top and movable silicon structure graph by inductively coupled plasma etching (ICP) technology, then back-off and glass substrate anode linkage, then use KOH solution attenuate silicon chip, last etching discharges movable silicon structure.
Above two kinds of methods all adopt the method attenuate silicon chip of wet etching, and etching time is long, and structural thickness uniformity is poor; Structure sheaf is direct in addition and glass bonding, and bonding can be introduced stress, larger on the impact of MEMS device performance.
Summary of the invention
The object of this invention is to provide a kind of SOI MEMS preparation method based on silex glass bonding.
The present invention realizes in the following way:
A kind of SOI MEMS method for integrating monolithic, its step comprises: (a) carry out photoetching on SOI silicon chip structure sheaf surface, adopt stripping technology to make metal electrode.(b) carry out photoetching at silicon chip back side, back side silicon is carried out to etching until insulating barrier; (c) insulating barrier that etching silicon wafer back exposure goes out; (d) silicon chip is carried out to bonding with glass; (e), in front side of silicon wafer lithographic definition MEMS structural area, adopt DRIE anisotropic etching to discharge micro-structural; (f) sliver, encapsulation, test.
Be characterized in that the silicon chip in described step (a) is soi wafer, comprise silicon structure layer, layer-of-substrate silicon and the insulating barrier between silicon structure layer and layer-of-substrate silicon, insulating barrier comprises silica.
In step (c), the etching of silicon chip back side oxide layer comprises wet etching, dry etching.
In step (d), silicon chip is that silicon chip substrate layer is with glass bonding with the bonding region of glass bonding.
The present invention compared with prior art, have the following advantages and beneficial effect: prior art is generally used the method attenuate silicon chip of wet etching, the uniformity of silicon wafer thickness is poor, can cause physical dimension deviation, and etching time is long, this technology does not need to use the method attenuate silicon chip of wet etching, directly utilizes insulating barrier as etching self-stopping technology layer, Laminate construction thickness good uniformity, physical dimension deviation is little; In addition, prior art generally by structure sheaf directly with glass bonding, the stress that bonding is introduced is larger on device performance impact, and this technology by the substrate layer of SOI silicon chip with glass bonding, the impact of the stress that can greatly reduce bonding on MEMS device performance.
Brief description of the drawings
The SOI wafer vertical section schematic diagram of Fig. 1 for using in the inventive method processing;
Fig. 2 a ~ Fig. 2 e is the inventive method work flow schematic diagram.
Detailed description of the invention
Below in conjunction with specific embodiment and accompanying drawing, the present invention will be further described.
The material adopting is SOI silicon chip, 40 microns of structure sheaf 1 thickness, N-type silicon, resistivity , <110> crystal orientation; 1 micron of insulating barrier 2 thickness; 300 microns of substrate layer thickness, N-type silicon.
A SOI MEMS preparation method based on silex glass bonding, its step comprises:
(1) preparation of metal electrode, as shown in Figure 2 a:
(a) use soi wafer, adopt lithographic equipment to prepare the photoresist mask of electrode 4 shapes;
(b) with commercial magnetic control platform successively sputtered titanium tungsten (Tiw), gold (Au) on silicon chip structure sheaf, thickness is respectively 300 dusts, 3000 dusts;
(c) finally soak with acetone, and remove the photoresist on silicon chip with commercial supersonic wave cleaning machine, obtain electrode 4.
(2) etching in back of the body chamber, as shown in Figure 2 b:
(a) carry out photoetching at silicon chip back side, define the region of back of the body chamber etching;
(b) adopt DRIE deep etching, etch silicon substrate is to insulating barrier 2;
(3) adopt RIE to remove silicon dioxide insulating layer 2 or the HF acid corrosion silicon dioxide insulating layer 2 by 49% concentration, as shown in Figure 2 c;
(4) adopt bonder that Pyrex 5 and SOI silicon chip substrate layer are bonded to glass-silicon structure, as shown in Figure 2 d;
(5), in front side of silicon wafer lithographic definition MEMS structure, adopt DRIE anisotropic etching to discharge micro-structural, as shown in Figure 2 e;
In above-described embodiment, original material adopts SOI silicon chip, and the thickness of the thickness of silicon structure layer 1, the thickness of insulating barrier 2 and layer-of-substrate silicon 3 can increase as required or reduce.Sputtered titanium tungsten and golden thickness also can according to circumstances be adjusted variation to some extent.

Claims (5)

1. the SOI MEMS preparation method based on silex glass bonding, its step comprises:
(a) carry out photoetching on SOI silicon chip structure sheaf surface, adopt stripping technology to make metal electrode;
(b) carry out photoetching at SOI silicon chip back side, back side silicon is carried out to etching until insulating barrier;
(c) insulating barrier that etching SOI silicon chip back side exposes;
(d) SOI silicon chip and glass are carried out to bonding;
(e), in SOI front side of silicon wafer lithographic definition MEMS structural area, adopt DRIE anisotropic etching to discharge micro-structural;
(f) sliver, encapsulation, test.
2. the SOI MEMS preparation method based on silex glass bonding according to claim 1, is characterized in that, described soi wafer comprises the silicon structure layer (1), insulating barrier (2), the layer-of-substrate silicon (3) that connect successively.
3. the SOI MEMS preparation method based on silex glass bonding according to claim 2, is characterized in that, described insulating barrier (2) is silica.
4. the SOI MEMS preparation method based on silex glass bonding according to claim 1, is characterized in that, in described step (c), the etching of SOI silicon chip back side insulating barrier is wet etching or dry etching.
5. the SOI MEMS preparation method based on silex glass bonding according to claim 2, is characterized in that, in described step (d), the bonding region of SOI silicon chip and glass bonding is layer-of-substrate silicon and glass bonding.
CN201210110746.9A 2012-04-17 2012-04-17 Silica glass bonding-based SOI MEMS (silicon on insulator micro electro mechanical system) preparation method Expired - Fee Related CN102649538B (en)

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CN103193197B (en) * 2013-04-02 2016-04-06 厦门大学 A kind of micro element movable structure preparation method based on silicon/glass anode linkage
CN103420327B (en) * 2013-08-13 2015-09-09 中国电子科技集团公司第十三研究所 A kind of interface guard method being applied to patterned-SOI material etch technique
CN105523520A (en) * 2014-09-28 2016-04-27 中国科学院苏州纳米技术与纳米仿生研究所 Manufacturing method for motion sensor of micro-electro-mechanical system
CN104692319B (en) * 2015-03-16 2016-05-18 安徽北方芯动联科微系统技术有限公司 Manufacture method to the insensitive MEMS chip of encapsulation stress and MEMS chip thereof
CN106379858A (en) * 2016-11-25 2017-02-08 苏州工业园区纳米产业技术研究院有限公司 Manufacturing method of micro-electromechanical device, micro-electromechanical device and micro-electromechanical device base structure
CN106904839B (en) * 2017-03-31 2019-09-10 中国工程物理研究院电子工程研究所 A kind of masking method of glass corrosion

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CN101692016B (en) * 2009-07-17 2011-08-10 东南大学 Atmospheric pressure sensor compatible with CMOS process and preparation process thereof
CN101817497B (en) * 2010-05-28 2011-09-28 中国工程物理研究院电子工程研究所 Method for preparing all-dry etching dissolved silicon chip for microstructure manufacturing

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