CN102628923B - Test device of analog circuit - Google Patents
Test device of analog circuit Download PDFInfo
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- CN102628923B CN102628923B CN201210073244.3A CN201210073244A CN102628923B CN 102628923 B CN102628923 B CN 102628923B CN 201210073244 A CN201210073244 A CN 201210073244A CN 102628923 B CN102628923 B CN 102628923B
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Abstract
The invention discloses a test device of an analog circuit, which comprises a generation circuit for providing test vectors, a first acquisition circuit connected between the input end of a tested circuit and the generation circuit and used for acquiring the test vectors and exerting the test vectors to the tested circuit, a second acquisition circuit connected with the output end of the tested circuit and used for acquiring output information of the tested circuit and an analyzing circuit connected with the second acquisition circuit and used for judging function correctness of the tested circuit according to the output information of the tested circuit. The test device of the analog circuit solves the problem that the analog circuit needs to be connected with an external device to be tested in the related technology, and achieves an effect that the test device of the analog circuit can perform test without being connected with the external device.
Description
Technical field
The present invention relates to circuit field, in particular to a kind of analog circuit test device.
Background technology
Along with widely using of mimic channel, often need to test the function of mimic channel, also be, the function accuracy of test simulation circuit, but, in the prior art, when testing the carrying out of mimic channel, the receiving chip (as high-speed serial data receiver or analog-to-digital conversion device) connecting external test facility (such as high speed test instrument) or correspondence is needed to test, thus causing existing Analog Circuits Test Method cost high, the test duration is long.
Need connection external unit can carry out the problem of testing for the analog circuit test mode in correlation technique, not yet propose effective solution at present.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of analog circuit test device, needs in the analog circuit test mode solved in correlation technique the problem can carrying out testing connecting external unit equipment.
To achieve these goals, according to an aspect of the present invention, providing a kind of analog circuit test device, comprising: producing circuit, for providing test vector; First acquisition cuicuit, is connected to the input end of circuit-under-test and produces between circuit, for obtaining test vector and test vector being applied to circuit-under-test; Second acquisition cuicuit, is connected to the output terminal of circuit-under-test, for obtaining the output information of circuit-under-test; And analysis circuit, be connected with the second acquisition cuicuit, for judging the function accuracy of circuit-under-test according to the output information of circuit-under-test.
Further, produce circuit and comprise: character generators, for generation of characteristic sequence; And analog circuit test vector generator, be connected to character generators, for obtaining test vector according to characteristic sequence.
Further, produce circuit also to comprise: random sequence generator, be connected to analog circuit test vector generator, for generation of random test vector sequence, wherein, analog circuit test vector generator is used for the information of characteristic sequence being added random test vector sequence, to produce the test vector containing characteristic information.
Further, the first acquisition cuicuit is mimic channel vector acquisition cuicuit, and mimic channel vector acquisition cuicuit is used for obtaining test vector from digital and analog interface.
Further, the second acquisition cuicuit is deserialization circuitry, and wherein, the serial data in output information for obtaining the output information of circuit-under-test, and is converted to parallel data by deserialization circuitry.
Further, the second acquisition cuicuit is analog to digital conversion circuit, and wherein, the simulating signal in output information for obtaining the output information of circuit-under-test, and is converted to digital signal by analog to digital conversion circuit.
Further, comprise digital circuit, wherein, digital circuit comprises generation circuit and analysis circuit.
Further, analog circuit test device also comprises: Test Vectors Compression circuit, for extracting the characteristic information in the data stream of deserialization circuitry or analog to digital conversion circuit recovery, and being compressed, returning to digital circuit.
Further, analysis circuit is test vector signature analysis circuit, and test vector signature analysis circuit for analyzing the characteristic information crossed through Test Vectors Compression circuit compression, and detects the correctness of characteristic information.
Further, circuit-under-test is serializer change-over circuit or D/A converting circuit.
By adopting analog circuit test device provided by the present invention, owing to providing test vector by producing circuit, the input end and the first acquisition cuicuit produced between circuit that are connected to circuit-under-test obtain test vector and test vector are applied to circuit-under-test, and the second acquisition cuicuit being connected to the output terminal of circuit-under-test obtains the output information of circuit-under-test; And judged the function accuracy of circuit-under-test according to the output information of circuit-under-test by the analysis circuit that is connected with the second acquisition cuicuit, thus the analog circuit test mode solved in correlation technique needs connection external unit can carry out the problem of testing, and then reaches the effect making analog circuit test device also can carry out testing without the need to connecting external unit.
Accompanying drawing explanation
The accompanying drawing forming a application's part is used to provide a further understanding of the present invention, and schematic description and description of the present invention, for explaining the present invention, does not form inappropriate limitation of the present invention.In the accompanying drawings:
Fig. 1 is the schematic diagram of the analog circuit test device according to the embodiment of the present invention; And
Fig. 2 is the schematic diagram of analog circuit test device according to the preferred embodiment of the invention.
Embodiment
It should be noted that, when not conflicting, the embodiment in the application and the feature in embodiment can combine mutually.Below with reference to the accompanying drawings and describe the present invention in detail in conjunction with the embodiments.
Embodiments provide a kind of analog circuit test device.
Fig. 1 is the schematic diagram according to embodiment of the present invention analog circuit test device, and as shown in Figure 1, this analog circuit test device comprises generation circuit, the first acquisition cuicuit, the second acquisition cuicuit and analysis circuit.
Produce circuit, for providing test vector.This test vector is used for being supplied to mimic channel to test, and wherein, this test vector both can be the test vector that feature based sequence obtains, and also can be the test vector obtained based on both random test vector sequence and characteristic sequence.
First acquisition cuicuit, is connected between the input end of circuit-under-test and described generation circuit, for obtaining described test vector and described test vector being applied to described circuit-under-test.The test vector got as a part for mimic channel, for after getting test vector, can be applied to the circuit-under-test part in mimic channel by this first acquisition cuicuit.
Second acquisition cuicuit, is connected to the output terminal of described circuit-under-test, for obtaining the output information of described circuit-under-test.This second acquisition cuicuit also can as a part for mimic channel, for getting the output information of circuit-under-test from the output terminal of the circuit-under-test part in mimic channel.
Analysis circuit, is connected with described second acquisition cuicuit, for judging the function accuracy of described circuit-under-test according to the output information of described circuit-under-test.This analysis circuit can as a part for digital circuit, for analyzing based on the second acquisition cuicuit feedack from mimic channel, to judge the function accuracy of described circuit-under-test.
In the analog circuit test device that this embodiment provides, get due to the first acquisition cuicuit the test vector that carries out testing and test vector has been applied to circuit-under-test, second acquisition cuicuit obtains the information that circuit-under-test exports, and analysis circuit is analyzed according to the function accuracy of the second acquisition cuicuit feedack to circuit-under-test, thus the analog circuit test mode solved in correlation technique needs connection external unit can carry out the problem of testing, and then reach the effect making analog circuit test device also can carry out testing without the need to connecting external unit.
As a kind of Alternate embodiments of described generation circuit, above-mentioned generation circuit can comprise character generators and analog circuit test vector generator.
Character generators is for generation of characteristic sequence.
Analog circuit test vector generator, is connected to character generators, for obtaining described test vector according to described characteristic sequence.
By the generation circuit of this embodiment, because the characteristic sequence produced according to character generators obtains described test vector, thus, simplify the structure of proving installation.
In order to improve the coverage rate of test, preferably, above-mentioned generation circuit also comprises random sequence generator.
Random sequence generator, be connected to described analog circuit test vector generator, for generation of random test vector sequence, now, described analog circuit test vector generator is used for the information of described characteristic sequence being added described random test vector sequence, to produce the test vector containing characteristic information.
The first above-mentioned acquisition cuicuit can adopt at least two kinds of modes to realize, such as:
Mode one, the first acquisition cuicuit can be mimic channel vector acquisition cuicuit, and this mimic channel vector acquisition cuicuit is used for obtaining described test vector from digital and analog interface.
Mode two, the second acquisition cuicuit also can be deserialization circuitry, and wherein, the serial data in described output information for obtaining the output information of described circuit-under-test, and is converted to parallel data by described deserialization circuitry.
The second above-mentioned acquisition cuicuit is analog to digital conversion circuit, and wherein, the simulating signal in described output information for obtaining the output information of described circuit-under-test, and is converted to digital signal by analog-digital conversion circuit as described.
The analog circuit test device of the embodiment of the present invention can comprise digital circuit and mimic channel two parts, and wherein, digital circuit can comprise above-mentioned generation circuit and described analysis circuit.Mimic channel can comprise above-mentioned mimic channel vector acquisition cuicuit and deserialization circuitry.
Realize difficulty in order to what simplify mimic channel, preferably, analog circuit test device also comprises Test Vectors Compression circuit.
Test Vectors Compression circuit for extracting the characteristic information in the data stream of deserialization circuitry or analog to digital conversion circuit recovery, and is compressed, and returns to digital circuit.
Above-mentioned analysis circuit can be test vector signature analysis circuit, and this test vector signature analysis circuit for analyzing the characteristic information crossed through described Test Vectors Compression circuit compression, and detects the correctness of described characteristic information.
Above-mentioned circuit-under-test is serializer change-over circuit or D/A converting circuit.That is, namely the proving installation that the embodiment of the present invention provides may be used for testing serializer change-over circuit, also may be used for logarithmic mode change-over circuit and tests.
In the middle of specific implementation, test vector signature analysis circuit also can merge with Test Vectors Compression circuit.
Fig. 2 is the schematic diagram of analog circuit test device according to the preferred embodiment of the invention.
As shown in Figure 2, this analog circuit test device comprises digital circuit 10 and mimic channel 20.
Digital circuit 10 comprises random sequence generator 11, character generators 12, analog circuit test vector generator 13 and test vector signature analysis circuit 15.
Random sequence generator 11 is for generation of random test vector sequence.
Character generators 12 is for generation of characteristic sequence.
Analog circuit test vector generator 13 for the information of characteristic sequence is added random test vector sequence, and produces the new test vector sequence containing characteristic information.
Mimic channel 20 comprises mimic channel vector acquisition cuicuit 21, serializer change-over circuit or D/A converting circuit 22, deserialization circuitry or analog to digital conversion circuit 23 and Test Vectors Compression circuit 24.
Mimic channel vector acquisition cuicuit 21 is for obtaining test vector sequence from digital and analog interface.
Serializer change-over circuit or D/A converting circuit 22 are for being converted to serial data or parallel data being converted to simulating signal by parallel data.
Deserialization circuitry or analog to digital conversion circuit 23 are for being converted to parallel data or simulating signal being converted to digital signal by serial data.
Test Vectors Compression circuit 24 for extracting the characteristic information in the data stream of deserialization circuitry or analog to digital conversion circuit 23 recovery, and is compressed, and returns to digital circuit 10.
Test vector signature analysis circuit 15 for analyzing through the compressed characteristic information of Test Vectors Compression circuit 24, and detects the correctness of characteristic information rate.
By above-mentioned test circuit, serializer change-over circuit or D/A converting circuit 22 function accuracy can be tested.Below the principle of work of above-mentioned test circuit is further described below:
The Data Synthesis that random sequence generator 11 and character generators 12 produce is the test and excitation with characteristic information by analog circuit test vector generator 13.
Test and excitation is applied in serializer change-over circuit or D/A converting circuit 22.
Deserialization circuitry or analog to digital conversion circuit 23 and Test Vectors Compression circuit 24 obtain the output of 22, by compressed information back to test vector signature analysis circuit 15.
Test vector signature analysis circuit 15 judges the function accuracy of deserialization circuitry or analog to digital conversion circuit 23 by analytical characteristic information.
By the test circuit that the embodiment of the present invention provides, can under the condition not needing external test facility the function accuracy of quick test simulation circuit, test coverage is high, and test accuracy is high, test condition and normal running conditions similarity high.
The test circuit that the embodiment of the present invention provides also may be used for high speed analog circuit test, and test coverage is high, and test condition is consistent with actual service conditions, and test is efficient, and the test duration is short.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. an analog circuit test device, is characterized in that, comprising:
Produce circuit, for providing test vector;
First acquisition cuicuit, is connected between the input end of circuit-under-test and described generation circuit, for obtaining described test vector and described test vector being applied to described circuit-under-test;
Second acquisition cuicuit, is connected to the output terminal of described circuit-under-test, for obtaining the output information of described circuit-under-test; And
Analysis circuit, is connected with described second acquisition cuicuit, for judging the function accuracy of described circuit-under-test according to the output information of described circuit-under-test,
Wherein, described generation circuit comprises:
Character generators (12), for generation of characteristic sequence; And
Analog circuit test vector generator (13), is connected to described character generators (12), for obtaining described test vector according to described characteristic sequence,
Wherein, described generation circuit also comprises:
Random sequence generator (11), is connected to described analog circuit test vector generator (13), for generation of random test vector sequence,
Wherein, described analog circuit test vector generator (13) for the information of described characteristic sequence is added described random test vector sequence, to produce the test vector containing characteristic information.
2. analog circuit test device according to claim 1, it is characterized in that, described first acquisition cuicuit is mimic channel vector acquisition cuicuit (21), and described mimic channel vector acquisition cuicuit (21) is for obtaining described test vector from digital and analog interface.
3. analog circuit test device according to claim 1, it is characterized in that, described second acquisition cuicuit is deserialization circuitry, wherein, serial data in described output information for obtaining the output information of described circuit-under-test, and is converted to parallel data by described deserialization circuitry.
4. analog circuit test device according to claim 1, it is characterized in that, described second acquisition cuicuit is analog to digital conversion circuit, wherein, simulating signal in described output information for obtaining the output information of described circuit-under-test, and is converted to digital signal by analog-digital conversion circuit as described.
5. the analog circuit test device according to claim 3 or 4, is characterized in that, comprises digital circuit (10), and wherein, described digital circuit (10) comprises described generation circuit and described analysis circuit.
6. analog circuit test device according to claim 5, is characterized in that, also comprise:
Test Vectors Compression circuit (24), for extracting the characteristic information in data stream that deserialization circuitry or analog to digital conversion circuit (23) recover, and being compressed, being returned to described digital circuit (10).
7. analog circuit test device according to claim 6, it is characterized in that, described analysis circuit is test vector signature analysis circuit (15), described test vector signature analysis circuit (15) for analyzing through the compressed characteristic information of described Test Vectors Compression circuit (24), and detects the correctness of described characteristic information.
8. analog circuit test device according to claim 1, is characterized in that, described circuit-under-test is serializer change-over circuit or D/A converting circuit.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201210073244.3A CN102628923B (en) | 2012-03-19 | 2012-03-19 | Test device of analog circuit |
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| CN201210073244.3A CN102628923B (en) | 2012-03-19 | 2012-03-19 | Test device of analog circuit |
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| CN102628923A CN102628923A (en) | 2012-08-08 |
| CN102628923B true CN102628923B (en) | 2015-04-08 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103267943B (en) * | 2013-04-24 | 2016-09-28 | 上海华虹宏力半导体制造有限公司 | A kind of test device and method of integrated circuit |
| CN103257846B (en) * | 2013-05-08 | 2015-12-09 | 电子科技大学 | A kind of pseudo-random sequence generation device for compression sampling |
| CN107437942A (en) * | 2016-05-25 | 2017-12-05 | 成都锐成芯微科技股份有限公司 | SAR analog-digital converters test system and method |
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| US6653827B2 (en) * | 2000-08-10 | 2003-11-25 | Xilinx, Inc. | Analog signal test circuit and method |
| CN101501512A (en) * | 2006-06-13 | 2009-08-05 | 佛姆法克特股份有限公司 | Method of designing an application specific probe card test system |
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| JP2001147256A (en) * | 1999-11-19 | 2001-05-29 | Matsushita Electric Ind Co Ltd | Semiconductor device and its testing method |
| CN201576463U (en) * | 2009-12-03 | 2010-09-08 | 上海华虹Nec电子有限公司 | Device for producing and displaying bitmap information during embedded flash memory testing process |
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|---|---|---|---|---|
| US6653827B2 (en) * | 2000-08-10 | 2003-11-25 | Xilinx, Inc. | Analog signal test circuit and method |
| CN101501512A (en) * | 2006-06-13 | 2009-08-05 | 佛姆法克特股份有限公司 | Method of designing an application specific probe card test system |
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Address after: 100086 Haidian District, Zhongguancun, South Street, No. 2, building A, block, floor 28 Applicant after: Analogix Semiconductor(Beijing) Inc. Applicant after: Analogix International Co., Ltd. Address before: 100086, room 1503, block B, digital building, No. 2 South Avenue, Beijing, Haidian District, Zhongguancun Applicant before: Analogix Semiconductor(Beijing) Inc. Applicant before: Analogix International Co., Ltd. |
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