CN102628923A - Test device of analog circuit - Google Patents
Test device of analog circuit Download PDFInfo
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- CN102628923A CN102628923A CN2012100732443A CN201210073244A CN102628923A CN 102628923 A CN102628923 A CN 102628923A CN 2012100732443 A CN2012100732443 A CN 2012100732443A CN 201210073244 A CN201210073244 A CN 201210073244A CN 102628923 A CN102628923 A CN 102628923A
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Abstract
The invention discloses a test device of an analog circuit, which comprises a generation circuit for providing test vectors, a first acquisition circuit connected between the input end of a tested circuit and the generation circuit and used for acquiring the test vectors and exerting the test vectors to the tested circuit, a second acquisition circuit connected with the output end of the tested circuit and used for acquiring output information of the tested circuit and an analyzing circuit connected with the second acquisition circuit and used for judging function correctness of the tested circuit according to the output information of the tested circuit. The test device of the analog circuit solves the problem that the analog circuit needs to be connected with an external device to be tested in the related technology, and achieves an effect that the test device of the analog circuit can perform test without being connected with the external device.
Description
Technical field
The present invention relates to circuit field, in particular to a kind of analog circuit test device.
Background technology
Along with being widely used of mimic channel, often need test the function of mimic channel, also be; The function correctness of test simulation circuit, still, in the prior art; To the testing of mimic channel the time; The receiving chip (like high-speed serial data receiver or analog-to-digital conversion device) that needs to connect external test facility (for example high speed test instrument) or correspondence can be tested, thereby causes existing Analog Circuits Test Method cost high, and the test duration is long.
Analog circuit test mode in the correlation technique need connect the problem that external unit can be tested, and does not propose effective solution at present as yet.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of analog circuit test device, need connect the problem that can test of external unit equipment with the analog circuit test mode in the solution correlation technique.
To achieve these goals, according to an aspect of the present invention, a kind of analog circuit test device is provided, has comprised: produced circuit, be used to provide test vector; First acquisition cuicuit is connected between the input end and generation circuit of circuit-under-test, is used to obtain test vector and test vector is applied to circuit-under-test; Second acquisition cuicuit is connected in the output terminal of circuit-under-test, is used to obtain the output information of circuit-under-test; And analysis circuit, be connected with second acquisition cuicuit, be used for judging the function correctness of circuit-under-test according to the output information of circuit-under-test.
Further, producing circuit comprises: the characteristic generator is used to produce characteristic sequence; And the analog circuit test vector generator, be connected in the characteristic generator, be used for obtaining test vector according to characteristic sequence.
Further; Producing circuit also comprises: random sequence generator; Be connected in the analog circuit test vector generator, be used to produce the random test vector sequence, wherein; The analog circuit test vector generator is used for the information of characteristic sequence is added the random test vector sequence, contains the test vector of characteristic information with generation.
Further, first acquisition cuicuit is a mimic channel vector acquisition cuicuit, and mimic channel vector acquisition cuicuit is used for obtaining test vector from digital and analog interface.
Further, second acquisition cuicuit is the de-serialization circuit, and wherein, the de-serialization circuit is used to obtain the output information of circuit-under-test, and converts the serial data in the output information into parallel data.
Further, second acquisition cuicuit is an analog to digital conversion circuit, and wherein, analog to digital conversion circuit is used to obtain the output information of circuit-under-test, and is digital signal with the analog signal conversion in the output information.
Further, comprise digital circuit, wherein, digital circuit comprises generation circuit and analysis circuit.
Further, the analog circuit test device also comprises: the Test Vectors Compression circuit, and be used for extracting the characteristic information of de-serialization circuit or analog to digital conversion circuit data recovered stream, and compress, digital circuit is given in passback.
Further, analysis circuit is a test vector signature analysis circuit, and test vector signature analysis circuit is used to analyze the characteristic information of crossing through the Test Vectors Compression circuit compression, and the correctness of detected characteristics information.
Further, circuit-under-test is serializer change-over circuit or D/A converting circuit.
Through adopting analog circuit test device provided by the present invention; Owing to test vector is provided through producing circuit; First acquisition cuicuit that is connected in the input end of circuit-under-test and produces between the circuit obtains test vector and test vector is applied to circuit-under-test, and second acquisition cuicuit that is connected in the output terminal of circuit-under-test obtains the output information of circuit-under-test; And the function correctness of judging circuit-under-test through the analysis circuit that is connected with second acquisition cuicuit according to the output information of circuit-under-test; Thereby solved the analog circuit test mode in the correlation technique and need connect the problem that external unit can be tested, and then reached and make the analog circuit test device need not to connect the effect that external unit also can be tested.
Description of drawings
The accompanying drawing that constitutes the application's a part is used to provide further understanding of the present invention, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Fig. 1 is the analog circuit test schematic representation of apparatus according to the embodiment of the invention; And
Fig. 2 is an analog circuit test schematic representation of apparatus according to the preferred embodiment of the invention.
Embodiment
Need to prove that under the situation of not conflicting, embodiment and the characteristic among the embodiment among the application can make up each other.Below with reference to accompanying drawing and combine embodiment to specify the present invention.
The embodiment of the invention provides a kind of analog circuit test device.
Fig. 1 is according to embodiment of the invention analog circuit test schematic representation of apparatus, and is as shown in Figure 1, and this analog circuit test device comprises generation circuit, first acquisition cuicuit, second acquisition cuicuit and analysis circuit.
Produce circuit, be used to provide test vector.This test vector is used to offer mimic channel to test, and wherein, this test vector both can be based on the test vector that characteristic sequence obtains, and also can be based on the two resulting test vector of random test vector sequence and characteristic sequence.
First acquisition cuicuit is connected between the input end and said generation circuit of circuit-under-test, is used to obtain said test vector and said test vector is applied to said circuit-under-test.This first acquisition cuicuit can be used as the part of mimic channel, is used for after getting access to test vector, and the test vector that gets access to is applied to the circuit-under-test part in the mimic channel.
Second acquisition cuicuit is connected in the output terminal of said circuit-under-test, is used to obtain the output information of said circuit-under-test.This second acquisition cuicuit also can be used as the part of mimic channel, is used for getting access to from the circuit-under-test output terminal partly of mimic channel the output information of circuit-under-test.
Analysis circuit is connected with said second acquisition cuicuit, is used for judging according to the output information of said circuit-under-test the function correctness of said circuit-under-test.This analysis circuit can be used as the part of digital circuit, is used for analyzing based on the second acquisition cuicuit feedack from mimic channel, to judge the function correctness of said circuit-under-test.
In the analog circuit test device that this embodiment provided; Because first acquisition cuicuit has got access to the test vector tested and test vector has been applied to circuit-under-test; Second acquisition cuicuit obtains the information of circuit-under-test output; And analysis circuit is analyzed the function correctness of circuit-under-test according to the second acquisition cuicuit feedack; Thereby solved the analog circuit test mode in the correlation technique and need connect the problem that external unit can be tested, and then reached and make the analog circuit test device need not to connect the effect that external unit also can be tested.
As a kind of optional embodiment of said generation circuit, above-mentioned generation circuit can comprise characteristic generator and analog circuit test vector generator.
The characteristic generator is used to produce characteristic sequence.
The analog circuit test vector generator is connected in the characteristic generator, is used for obtaining said test vector according to said characteristic sequence.
Through the generation circuit of this embodiment, because the characteristic sequence that produces according to the characteristic generator obtains said test vector, thereby, simplified the structure of proving installation.
In order to improve the coverage rate of test, preferably, above-mentioned generation circuit also comprises random sequence generator.
Random sequence generator; Be connected in said analog circuit test vector generator; Be used to produce the random test vector sequence; At this moment, said analog circuit test vector generator is used for the information of said characteristic sequence is added said random test vector sequence, contains the test vector of characteristic information with generation.
The first above-mentioned acquisition cuicuit can adopt at least dual mode to realize, for example:
Mode one, the first acquisition cuicuit can be mimic channel vector acquisition cuicuit, and this mimic channel vector acquisition cuicuit is used for obtaining said test vector from digital and analog interface.
Mode two, the second acquisition cuicuits also can be the de-serialization circuit, and wherein, said de-serialization circuit is used to obtain the output information of said circuit-under-test, and converts the serial data in the said output information into parallel data.
The second above-mentioned acquisition cuicuit is an analog to digital conversion circuit, and wherein, analog-digital conversion circuit as described is used to obtain the output information of said circuit-under-test, and is digital signal with the analog signal conversion in the said output information.
The analog circuit test device of the embodiment of the invention can comprise digital circuit and mimic channel two parts, and wherein, digital circuit can comprise above-mentioned generation circuit and said analysis circuit.Mimic channel can comprise above-mentioned mimic channel vector acquisition cuicuit reconciliation serializer circuit.
In order to simplify the realization difficulty of mimic channel, preferably, the analog circuit test device also comprises the Test Vectors Compression circuit.
The Test Vectors Compression circuit is used for extracting the characteristic information of de-serialization circuit or analog to digital conversion circuit data recovered stream, and compresses, and digital circuit is given in passback.
Above-mentioned analysis circuit can be test vector signature analysis circuit, and this test vector signature analysis circuit is used to analyze the characteristic information of crossing through said Test Vectors Compression circuit compression, and detects the correctness of said characteristic information.
Above-mentioned circuit-under-test is serializer change-over circuit or D/A converting circuit.That is, the proving installation that the embodiment of the invention provided promptly can be used for the serializer change-over circuit is tested, and also can be used for the logarithmic mode change-over circuit and test.
In the middle of concrete the realization, test vector signature analysis circuit also can merge with the Test Vectors Compression circuit.
Fig. 2 is an analog circuit test schematic representation of apparatus according to the preferred embodiment of the invention.
As shown in Figure 2, this analog circuit test device comprises digital circuit 10 and mimic channel 20.
Digital circuit 10 comprises random sequence generator 11, characteristic generator 12, analog circuit test vector generator 13 and test vector signature analysis circuit 15.
Random sequence generator 11 is used to produce the random test vector sequence.
Characteristic generator 12 is used to produce characteristic sequence.
Analog circuit test vector generator 13 is used for the information of characteristic sequence is added the random test vector sequence, and produces the new test vector sequence that contains characteristic information.
Mimic channel 20 comprises mimic channel vector acquisition cuicuit 21, serializer change-over circuit or D/A converting circuit 22, de-serialization circuit or analog to digital conversion circuit 23 and Test Vectors Compression circuit 24.
Mimic channel vector acquisition cuicuit 21 is used for obtaining test vector sequence from digital and analog interface.
Serializer change-over circuit or D/A converting circuit 22 are used for parallel data is converted into serial data or converts parallel data into simulating signal.
De-serialization circuit or analog to digital conversion circuit 23 are used for serial data is converted into parallel data or is digital signal with analog signal conversion.
Test Vectors Compression circuit 24 is used for extracting the characteristic information of de-serialization circuit or analog to digital conversion circuit 23 data recovered stream, and compresses, and digital circuit 10 is given in passback.
Test vector signature analysis circuit 15 is used to analyze the characteristic information that compressed through Test Vectors Compression circuit 24, and the correctness of detected characteristics information rate.
Through above-mentioned test circuit, can test serializer change-over circuit or D/A converting circuit 22 function correctness.Below the principle of work of above-mentioned test circuit is further set forth as follows:
Analog circuit test vector generator 13 synthesizes the test and excitation with characteristic information with random sequence generator 11 and the data that characteristic generator 12 produces.
Test and excitation is applied in serializer change-over circuit or D/A converting circuit 22.
De-serialization circuit or analog to digital conversion circuit 23 and Test Vectors Compression circuit 24 obtain 22 output, will compress information retransmission and give test vector signature analysis circuit 15.
Test vector signature analysis circuit 15 is judged the function correctness of de-serialization circuit or analog to digital conversion circuit 23 through analytical characteristic information.
Through the test circuit that the embodiment of the invention provided, can be under the condition that does not need external test facility the function correctness of test simulation circuit fast, test coverage is high, test accuracy is high, test condition and normal running conditions similarity height.
The test circuit that the embodiment of the invention provided also can be used for the high speed analog circuit test, and test coverage is high, test condition and real work term harmonization, and test is efficient, and the test duration is short.
The above is merely the preferred embodiments of the present invention, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.All within spirit of the present invention and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. an analog circuit test device is characterized in that, comprising:
Produce circuit, be used to provide test vector;
First acquisition cuicuit is connected between the input end and said generation circuit of circuit-under-test, is used to obtain said test vector and said test vector is applied to said circuit-under-test;
Second acquisition cuicuit is connected in the output terminal of said circuit-under-test, is used to obtain the output information of said circuit-under-test; And
Analysis circuit is connected with said second acquisition cuicuit, is used for judging according to the output information of said circuit-under-test the function correctness of said circuit-under-test.
2. analog circuit test device according to claim 1 is characterized in that, said generation circuit comprises:
Characteristic generator (12) is used to produce characteristic sequence; And
Analog circuit test vector generator (13) is connected in said characteristic generator (12), is used for obtaining said test vector according to said characteristic sequence.
3. analog circuit test device according to claim 2 is characterized in that, said generation circuit also comprises:
Random sequence generator (11) is connected in said analog circuit test vector generator (13), is used to produce the random test vector sequence,
Wherein, said analog circuit test vector generator (13) is used for the information of said characteristic sequence is added said random test vector sequence, contains the test vector of characteristic information with generation.
4. analog circuit test device according to claim 1 is characterized in that, said first acquisition cuicuit is a mimic channel vector acquisition cuicuit (21), and said mimic channel vector acquisition cuicuit (21) is used for obtaining said test vector from digital and analog interface.
5. analog circuit test device according to claim 1; It is characterized in that said second acquisition cuicuit is the de-serialization circuit, wherein; Said de-serialization circuit is used to obtain the output information of said circuit-under-test, and converts the serial data in the said output information into parallel data.
6. analog circuit test device according to claim 1; It is characterized in that said second acquisition cuicuit is an analog to digital conversion circuit, wherein; Analog-digital conversion circuit as described is used to obtain the output information of said circuit-under-test, and is digital signal with the analog signal conversion in the said output information.
7. according to claim 5 or 6 described analog circuit test devices, it is characterized in that comprise digital circuit (10), wherein, said digital circuit (10) comprises said generation circuit and said analysis circuit.
8. analog circuit test device according to claim 7 is characterized in that, also comprises:
Test Vectors Compression circuit (24) is used for extracting the characteristic information of de-serialization circuit or analog to digital conversion circuit (23) data recovered stream, and compresses, and said digital circuit (10) is given in passback.
9. analog circuit test device according to claim 8; It is characterized in that; Said analysis circuit is a test vector signature analysis circuit (15); Said test vector signature analysis circuit (15) is used for analyzing the characteristic information that compressed through said Test Vectors Compression circuit (24), and detects the correctness of said characteristic information.
10. analog circuit test device according to claim 1 is characterized in that, said circuit-under-test is serializer change-over circuit or D/A converting circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201210073244.3A CN102628923B (en) | 2012-03-19 | 2012-03-19 | Test device of analog circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201210073244.3A CN102628923B (en) | 2012-03-19 | 2012-03-19 | Test device of analog circuit |
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| CN102628923A true CN102628923A (en) | 2012-08-08 |
| CN102628923B CN102628923B (en) | 2015-04-08 |
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| CN201210073244.3A Active CN102628923B (en) | 2012-03-19 | 2012-03-19 | Test device of analog circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103257846A (en) * | 2013-05-08 | 2013-08-21 | 电子科技大学 | Pseudorandom sequence generating device for compressive sampling |
| CN103267943A (en) * | 2013-04-24 | 2013-08-28 | 上海宏力半导体制造有限公司 | Integrated circuit testing device and integrated circuit testing method |
| CN107437942A (en) * | 2016-05-25 | 2017-12-05 | 成都锐成芯微科技股份有限公司 | SAR analog-digital converters test system and method |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103267943A (en) * | 2013-04-24 | 2013-08-28 | 上海宏力半导体制造有限公司 | Integrated circuit testing device and integrated circuit testing method |
| CN103267943B (en) * | 2013-04-24 | 2016-09-28 | 上海华虹宏力半导体制造有限公司 | A kind of test device and method of integrated circuit |
| CN103257846A (en) * | 2013-05-08 | 2013-08-21 | 电子科技大学 | Pseudorandom sequence generating device for compressive sampling |
| CN103257846B (en) * | 2013-05-08 | 2015-12-09 | 电子科技大学 | A kind of pseudo-random sequence generation device for compression sampling |
| CN107437942A (en) * | 2016-05-25 | 2017-12-05 | 成都锐成芯微科技股份有限公司 | SAR analog-digital converters test system and method |
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Address after: 100086 Haidian District, Zhongguancun, South Street, No. 2, building A, block, floor 28 Applicant after: Analogix Semiconductor(Beijing) Inc. Applicant after: Analogix International Co., Ltd. Address before: 100086, room 1503, block B, digital building, No. 2 South Avenue, Beijing, Haidian District, Zhongguancun Applicant before: Analogix Semiconductor(Beijing) Inc. Applicant before: Analogix International Co., Ltd. |
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