CN102594103A - High-voltage input fly-back topology-based series-wound field effect tube driving circuit - Google Patents
High-voltage input fly-back topology-based series-wound field effect tube driving circuit Download PDFInfo
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Abstract
The invention discloses a high-voltage input fly-back topology-based series-wound field effect tube driving circuit in the technical field of direct current power conversion. The circuit comprises a filter capacitor, a grid voltage clamping circuit, a top tube driving circuit and an output circuit, wherein the output circuit consists of a primary winding and two field effect tubes, which are sequentially connected in series; the filter capacitor, the grid voltage clamping circuit and the output circuit are arranged on the positive and negative electrodes of a high-voltage direct current input end respectively; the grid voltage clamping end of the grid voltage clamping circuit is connected with a first port of the top tube driving circuit; and a second port and a third port of the top tube driving circuit are connected with the gate of a second field effect tube and the drain of a first field effect tube respectively. A problem about the driving of series-wound field effect tubes is solved; an isolated power supply is not required by the circuit; a top and down tube driving pulse time sequence is consistent with a theoretical design time sequence; the field effect tubes can be prevented from over-voltage and failures caused by unequal voltage division; limitation on a driving duty ratio is broken; and the influence of field effect tube distribution parameters on parameters of the driving circuit is avoided.
Description
Technical field
What the present invention relates to is the device in a kind of direct current power converter technique field, specifically is a kind of based on the anti-series field effect tube drive circuit that swashs topology of high voltage input.
Background technology
Development along with the high-power electric and electronic technology; The application of high voltage converter, high pressure dynamic reactive compensation device increases gradually; This kind equipment adopts the multimode chain structure mostly; Direct voltage on the individual module is between 1000V～2500V, and high voltage input DC to DC converter can effectively solve inside modules low-voltage circuit plate powerup issue.
Small-power, the DC to DC converter of high voltage input, anti-sharp topology is comparatively suitable; The voltage that the anti-switching device (FET) that swashs in the topology will bear is input voltage and secondary reflected voltage sum; The high withstand voltage FET of better performances can bear the drain-source voltage maximum at 1700V at present, and the voltage that can't directly be applied in input is higher than the occasion of 1700V; Though two FET series connection can meet the demands on integral body is withstand voltage; But because two FET drain potential are different, generally need to go up tube drive circuit and do photoelectricity or electromagnetic isolation processing, apply drive pulse signal again.Separated and the electromagnetic isolation such as as depicted in figs. 1 and 2 of typical photoelectricity.
The control signal of pulse generator output control fet switch among Fig. 1; Because FET is at same earth potential under pulse generator and the series connection; The control signal of pulse generator output can drive to the FET of connecting down directly that (pulse generator has certain driving force; If driving force is not enough, then need adding power amplification circuit) in the centre.Because last FET drain potential is different with the earth potential of pulse generator; Potential difference is pipe FET drain-source voltage down to the maximum; Therefore pulse generator is gone up the drive signal of FET to connecting; Pass to the drive circuit of FET through optocoupler, generally going up tube drive circuit is active driving, therefore also will in circuit, increase an insulating power supply; The input of insulating power supply and pulse generator, series connection FET down get final product altogether, and the output earth potential of insulating power supply is gone up field effect tube drive circuit equipotential with series connection.This kind photoelectricity isolation drive mode circuit constitutes complicated; Also to increase an insulating power supply; The drive signal that FET is gone up in series connection simultaneously receives the influence of optocoupler operating lag, under the high situation of switching frequency influence particularly outstanding, the switching frequency of circuit is restricted.
Fig. 2 has adopted the mode of transformer electromagnetic isolation; This mode directly passes to upward FET of series connection through the magnetic coupling of the former secondary of transformer with control impuls; Though this kind scheme has been omitted insulating power supply, receive the restriction of transformer magnetic reset, promptly duty ratio is limited; Reach the wave distortion that pulse signal exists in the process of transformer transmission, all can influence the whole effect that drives.
More than two kinds of type of drive or the drive waveforms distortion that causes because of the optocoupler operating lag or because of transformer; Make and manage switching sequence up and down and Design Theory has deviation; Mainly be to go up pipe driving time-delay to cause, can cause pipe to bear the voltage inequality when serious, the FET overvoltage was lost efficacy.
Summary of the invention
The present invention is directed to above-mentioned deficiency; Provide a kind of based on the anti-series field effect tube drive circuit that swashs topology of high voltage input, solve the driving difficult problem of series connection FET, circuit need not insulating power supply; It is consistent with the Design Theory sequential to manage the driving pulse sequential up and down; FET can not lose efficacy because of the unbalanced-voltage-division overvoltage, drives not restriction of duty ratio simultaneously, and drive circuitry parameter does not receive the FET effects of distribution parameters.
The present invention realizes through following technical scheme; The present invention includes: filter capacitor, grid voltage clamp circuit, go up tube drive circuit and by former limit winding and two output circuits that FET is formed of series connection successively; Wherein: filter capacitor, grid voltage clamp circuit and output circuit are arranged at the both positive and negative polarity of HVDC input end respectively; The grid voltage clamper end of grid voltage clamp circuit links to each other with first port of last tube drive circuit, and second port of last tube drive circuit links to each other with the grid of second FET and the drain electrode of first FET respectively with the 3rd port.
The described tube drive circuit of going up comprises: storage capacitor, first voltage stabilizing didoe, first diode and second diode; Wherein: first diode and energy storage capacitor in series are connected between first port and the 4th port of tube drive circuit; First voltage stabilizing didoe oppositely is connected between second port and the 3rd port of tube drive circuit, and the anode of second diode links to each other with the anode of first voltage stabilizing didoe and the anode of first diode respectively with negative electrode.
Described grid voltage clamp circuit comprises: the mega-ohms resistance of two series connection, the voltage clamp end of this grid voltage clamp circuit is provided with second voltage stabilizing didoe.
Described first FET is realized conducting control through control Driver Circuit is set at grid.
The present invention through swash series connection FET anti-add as the diode capacitance hybrid network in the topology on tube drive circuit and as the grid voltage clamp circuit of resistance voltage-stabiliser tube; Solve the driving difficult problem of series connection FET; Circuit need not insulating power supply, and it is consistent with the Design Theory sequential to manage the driving pulse sequential up and down, and FET can not lose efficacy because of the unbalanced-voltage-division overvoltage; Drive not restriction of duty ratio simultaneously, drive circuitry parameter does not receive the FET effects of distribution parameters.
Description of drawings
Fig. 1 is existing optical couple isolation drive circuit.
Fig. 2 is existing transformer photoelectric isolating driving circuit.
Fig. 3 is a circuit diagram of the present invention.
Fig. 4 is the crucial voltage waveform view of embodiment.
Embodiment
Elaborate in the face of embodiments of the invention down, present embodiment provided detailed execution mode and concrete operating process, but protection scope of the present invention is not limited to following embodiment being to implement under the prerequisite with technical scheme of the present invention.
Embodiment
As shown in Figure 3; Present embodiment comprises: filter capacitor C1, grid voltage clamp circuit 1, go up tube drive circuit 2 and by former limit winding T and two output circuits 3 that FET M1, M2 form of series connection successively; Wherein: filter capacitor C1, grid voltage clamp circuit 1 and output circuit 3 are arranged at the both positive and negative polarity of HVDC input end respectively; 1. the voltage clamp end of grid voltage clamp circuit 1 links to each other with first port of last tube drive circuit 2, and 3. 2. second port of last tube drive circuit 2 link to each other with the grid of the second FET M2 and the drain electrode of the first FET M1 respectively with the 3rd port.
The described tube drive circuit 2 of going up comprises: storage capacitor C2, the first voltage stabilizing didoe ZD1, the first diode D1 and the second diode D2; Wherein: first port that the first diode D1 and storage capacitor C2 are connected in series in tube drive circuit 2 1. and the 4th port 4. between; Second port that the first voltage stabilizing didoe ZD1 oppositely is connected in tube drive circuit 2 2. and the 3rd port 3. between, the anode of the second diode D2 links to each other with the anode of the first voltage stabilizing didoe ZD1 and the anode of the first diode D1 respectively with negative electrode.
Described grid voltage clamp circuit 1 comprises: the mega-ohms resistance R 1 of two series connection, R2, the voltage clamp end of this bleeder circuit 1 is provided with the second voltage stabilizing didoe ZD2.
The described first FET M1 realizes conducting control through control Driver Circuit 4 is set at grid, and this control Driver Circuit 4 adopts conventional FET controller or chip.
The described tube drive circuit 2 of going up also is applicable to the series connection insulated gate bipolar transistor, and promptly two FET M1 replace with two insulated gate bipolar transistors of connecting with M2 in the present embodiment.Grid voltage clamp circuit and go up in the tube drive circuit component parameter and also adjust accordingly and get final product mainly is that the appearance value of storage capacitor C2 will be mated with the input capacitance appearance value of insulated gate bipolar transistor of connect upward.
The present embodiment course of work is following:
Like Fig. 3 and shown in Figure 4, for circuit working principle of the present invention, be divided into the initial start state, opening process, turn off process three parts.
Initial condition T0～T1: when circuit DC is pressed input; At first pass through filter capacitor C1 voltage regulation filtering; Direct voltage makes that through resistance R 1, resistance R 2 dividing potential drops resistance R 1 resistance R 2 series connection mid-point voltages are half the or higher (this voltage is by the resistance ratio decision of resistance R 1 and resistance R 2, and two resistances are all more than megaohm) of input direct voltage; This voltage is designated as VT; The voltage stabilizing value of the second voltage stabilizing didoe ZD2 can tune to VT, plays a protective role, and makes resistance R 1 and resistance R 2 series connection mid-point voltages can not be higher than VT.The initial voltage of first FET M1 drain electrode is less than VT 3 to 5V (this 3 to 5V voltage is determined by the second FET M2 turn-on threshold voltage), and storage capacitor C2 voltage is lower than (this 0.5V voltage is the second diode D2 conduction voltage drop) about the first FET M1 drain voltage 0.5V.The second FET M2 drain voltage equates with input direct voltage.
Opening process T1～T2: when control Driver Circuit 4 is opened the first FET M1; The first FET M1 drain-source voltage descends rapidly, near 0V, in the process that descends; Storage capacitor C2 voltage is greater than the first FET M1 drain voltage, and the second diode D2 oppositely ends.In the process that the first FET M1 drain voltage descends; The second FET M2 grid voltage also descends thereupon; The first diode D1 forward conduction because the reverse requirement of withstand voltage of the first diode D1 is very low, can bears 30V and get final product (its reverse voltage receives the first voltage stabilizing didoe clamper to 15V); The forward conduction electric current is very little again; Then the element of the first diode D1 selects the available forward on-delay at the diode of 1～2 nanosecond, for nanosecond, can think that the first diode D1 conducting is undelayed with respect to tens nanoseconds of service time of whole FET or hundreds of.Storage capacitor C2 electric charge shifts (because resistance R 1 resistance is very big through first diode D1 electric capacity between the grid source of the second FET M2; The increase of the second FET M2 grid source capacitance charge all comes from storage capacitor C2 in opening process; The appearance value of storage capacitor C2 is selected according to the actual input voltage and the second FET M2 grid source capacitance; Because storage capacitor C2 only works when opening; Promptly to the second FET M2 grid source electric capacity electric charge is provided, as long as the appearance value enough greatly, no matter the distributivity difference of the grid source electric capacity of the second FET M2 is much; It is open-minded can not to influence pipe), finally make the second FET M2 grid voltage between source electrodes reach the voltage stabilizing value (representative value is 15V) of the first voltage stabilizing didoe ZD1.In this process; After the second FET M2 grid voltage between source electrodes is higher than turn-on threshold voltage; The second FET M2 gets final product conducting, the first FET M1, and the second FET M2 is open-minded basically simultaneously; The situation that does not have two pipe unbalanced-voltage-divisions in the opening process, promptly the first FET M1 and the second FET M2 open sequential and expected design is identical.After two FETs were opened fully, storage capacitor C2 voltage was higher than the second FET M2 grid voltage 0.5V (this voltage is the conduction voltage drop of the first diode D1), and winding T bears input direct voltage.
Turn off process T3～T5: when control Driver Circuit 4 is turn-offed the first FET M1; The first FET M1 drain voltage rises gradually; In the uphill process; The second diode D2 forward conduction, storage capacitor C2 voltage are along with the first FET M1 drain voltage rises together, for open the second FET M2 store charge next time.In the first FET M1 drain voltage uphill process, (the first diode D1 oppositely ends approach, and resistance R 2 resistance values are more than megaohm because capacitance charge is not released between the second FET M2 grid source; In turn off process, can ignore this path) the second FET M2 grid voltage between source electrodes is constant basically; The second FET M2 still is in conducting state, and when the first FET M1 drain voltage is raised to when approaching VT, promptly T4 constantly; The second FET M2 grid voltage has reached VT; Receive the clamping action of the second voltage stabilizing didoe ZD2, the second FET M2 grid source electric charge is released from the second voltage stabilizing didoe ZD2 approach, and the second FET M2 grid voltage between source electrodes reduces; Reduce to cut-in voltage at last, the second FET M2 turn-offs.So far the second FET M2, two pipes of the first FET M1 turn-off, and the first FET M1 drain-source voltage across poles is VT to the maximum, and the second FET M2 bears the difference of voltage for all the other direct voltages and VT.
Storage capacitor C2 voltage in three processes, the first FET drain-source voltage, second FET M2 drain electrode are seen Fig. 3 to the first FET M1 source voltage waveform.
Turn-off the analysis knowledge through above opening: circuit of the present invention need not insulating power supply; It is consistent with the Design Theory sequential to manage the driving pulse sequential up and down; FET can not lose efficacy because of the unbalanced-voltage-division overvoltage; Drive not restriction of duty ratio simultaneously, drive circuitry parameter does not receive the FET effects of distribution parameters.
Claims (3)
1. one kind based on the anti-series field effect tube drive circuit that swashs topology of high voltage input; It is characterized in that; Comprise: filter capacitor, grid voltage clamp circuit, go up tube drive circuit and by former limit winding and two output circuits that FET is formed of series connection successively; Wherein: filter capacitor, grid voltage clamp circuit and output circuit are arranged at the both positive and negative polarity of HVDC input end respectively; The grid voltage clamper end of grid voltage clamp circuit links to each other with first port of last tube drive circuit, and second port of last tube drive circuit links to each other with the grid of second FET and the drain electrode of first FET respectively with the 3rd port;
The described tube drive circuit of going up comprises: storage capacitor, first voltage stabilizing didoe, first diode and second diode; Wherein: first diode and energy storage capacitor in series are connected between first port and the 4th port of tube drive circuit; First voltage stabilizing didoe oppositely is connected between second port and the 3rd port of tube drive circuit, and the anode of second diode links to each other with the anode of first voltage stabilizing didoe and the anode of first diode respectively with negative electrode.
2. according to claim 1 based on the anti-series field effect tube drive circuit that swashs topology of high voltage input; It is characterized in that; Described grid voltage clamp circuit comprises: the mega-ohms resistance of two series connection, the voltage clamp end of this grid voltage clamp circuit is provided with second voltage stabilizing didoe.
3. the series field effect tube drive circuit based on the anti-sharp topology of high voltage input according to claim 1 is characterized in that, described first FET is realized conducting control through control Driver Circuit is set at grid.
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| CN2012100751711A CN102594103A (en) | 2012-03-20 | 2012-03-20 | High-voltage input fly-back topology-based series-wound field effect tube driving circuit |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103036196A (en) * | 2012-12-03 | 2013-04-10 | 华为技术有限公司 | Device for overvoltage protection and method thereof |
| CN103812346A (en) * | 2012-11-12 | 2014-05-21 | 苏州工业园区新宏博通讯科技有限公司 | Super-high voltage input switch power source module |
| CN103997205A (en) * | 2012-11-05 | 2014-08-20 | 矽力杰半导体技术(杭州)有限公司 | Self power supplying source electrode drive circuit and switching power supply using same |
| CN104242612A (en) * | 2013-06-21 | 2014-12-24 | 英飞凌科技奥地利有限公司 | System and Method for Driving Transistors |
| CN104682696A (en) * | 2012-11-05 | 2015-06-03 | 矽力杰半导体技术(杭州)有限公司 | Self-powered source driving circuit and switching power supply using same |
| CN108535700A (en) * | 2018-04-04 | 2018-09-14 | 海华电子企业(中国)有限公司 | Navigation radar transceiver device based on networking model and its working method |
| CN110048599A (en) * | 2019-05-28 | 2019-07-23 | 苏州力生美半导体有限公司 | Switch power source driving circuit |
| CN110336549A (en) * | 2019-06-28 | 2019-10-15 | 华中科技大学 | A kind of single driving series average-voltage circuit based on two-line voltage synthesis type device |
| CN114900157A (en) * | 2022-07-12 | 2022-08-12 | 深圳迈微医疗科技有限公司 | Pulse generating circuit, pulse generator and medical equipment |
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Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103997205A (en) * | 2012-11-05 | 2014-08-20 | 矽力杰半导体技术(杭州)有限公司 | Self power supplying source electrode drive circuit and switching power supply using same |
| CN104682696A (en) * | 2012-11-05 | 2015-06-03 | 矽力杰半导体技术(杭州)有限公司 | Self-powered source driving circuit and switching power supply using same |
| CN104682696B (en) * | 2012-11-05 | 2019-07-16 | 矽力杰半导体技术(杭州)有限公司 | A kind of self-powered source electrode drive circuit and the Switching Power Supply using it |
| CN103812346A (en) * | 2012-11-12 | 2014-05-21 | 苏州工业园区新宏博通讯科技有限公司 | Super-high voltage input switch power source module |
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| CN103036196B (en) * | 2012-12-03 | 2015-11-25 | 华为技术有限公司 | Over-pressure safety device and method |
| CN103036196A (en) * | 2012-12-03 | 2013-04-10 | 华为技术有限公司 | Device for overvoltage protection and method thereof |
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| CN104242612A (en) * | 2013-06-21 | 2014-12-24 | 英飞凌科技奥地利有限公司 | System and Method for Driving Transistors |
| US9397636B2 (en) | 2013-06-21 | 2016-07-19 | Infineon Technologies Austria Ag | System and method for driving transistors |
| CN104242612B (en) * | 2013-06-21 | 2018-04-20 | 英飞凌科技奥地利有限公司 | Method and system for driving transistor |
| CN108535700A (en) * | 2018-04-04 | 2018-09-14 | 海华电子企业(中国)有限公司 | Navigation radar transceiver device based on networking model and its working method |
| CN110048599A (en) * | 2019-05-28 | 2019-07-23 | 苏州力生美半导体有限公司 | Switch power source driving circuit |
| CN110048599B (en) * | 2019-05-28 | 2024-03-01 | 苏州力生美半导体有限公司 | Switching power supply driving circuit |
| CN110336549A (en) * | 2019-06-28 | 2019-10-15 | 华中科技大学 | A kind of single driving series average-voltage circuit based on two-line voltage synthesis type device |
| CN110336549B (en) * | 2019-06-28 | 2020-11-24 | 华中科技大学 | Single-drive series voltage-sharing circuit based on double-voltage control device |
| CN114900157A (en) * | 2022-07-12 | 2022-08-12 | 深圳迈微医疗科技有限公司 | Pulse generating circuit, pulse generator and medical equipment |
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Application publication date: 20120718 |