CN102593134B - Image sensor and manufacturing method thereof - Google Patents

Image sensor and manufacturing method thereof Download PDF

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CN102593134B
CN102593134B CN201110002778.2A CN201110002778A CN102593134B CN 102593134 B CN102593134 B CN 102593134B CN 201110002778 A CN201110002778 A CN 201110002778A CN 102593134 B CN102593134 B CN 102593134B
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photodiode
substrate
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doped region
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CN102593134A (en
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霍介光
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Galaxycore Shanghai Ltd Corp
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Galaxycore Shanghai Ltd Corp
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Abstract

The invention discloses an image sensor and a manufacturing method thereof. The image sensor comprises a photodiode formed on a substrate as well as an insulating layer and a transparent conductive layer which are sequentially coated on the photodiode, wherein a negative voltage signal loading end is arranged on the transparent conductive layer. The manufacturing method for the image sensor includes the following steps: providing a substrate; forming the photodiode on the substrate; sequentially forming the insulating layer and the transparent conductive layer on the photodiode; and depositing an interlaminar dielectric layer on the photodiode; and forming a plug which is positioned in the interlaminar dielectric layer and is electrically connected to the transparent conducting layer. The action of changing pinning can be changed by changing a negative voltage signal, so that the photodiode can obtain optimal pinning effect.

Description

Imageing sensor and manufacture method thereof
Technical field
The present invention relates to image processing field, particularly relate to a kind of imageing sensor and manufacture method thereof.
Background technology
Complementary metal oxide semiconductors (CMOS) (Complementary Metal Oxide Semiconductor, CMOS) image sensing technology is a kind of technology based on CMOS technology, develops fast obtaining nearly ten years.Cmos image sensor is gathered image by integrated analogy and digital circuit, transmit, processes and is exported.This technology is compared to the image sensing technology of other types, and having the advantages such as integrated level is high, low in energy consumption, cost is low, powerful, is a kind of technology having bright prospects.
In the Chinese patent of notification number CN100452417C, disclose a kind of cmos image sensor, with reference to figure 1, show the schematic diagram of described imageing sensor.Described imageing sensor comprises: luminous zone (in figure left field) and circuit region (in figure right side area), wherein circuit region is provided with the control circuit carrying out image display for controlling each display unit in luminous zone, described luminous zone comprises multiple display unit, wherein each display unit includes a photodiode and a transistor, and Fig. 1 is for a display unit.
Described display unit comprises: substrate 100, is positioned at the P type trap zone 110 on substrate 100, is arranged at the area of isolation 115 in P type trap zone 110, and described area of isolation 115 isolates luminous zone and circuit region 180; Wherein said photodiode 140 comprises the dark doped region of the N-type being arranged in P type trap zone 110 142, the p type semiconductor layer 144 be covered on the dark doped region 142 of described N-type.Wherein, p type semiconductor layer 144 is formed on the dark doped region 142 of N-type by the pinning process of ion implantation, described p type semiconductor layer 144.
But, after forming p type semiconductor layer 144 by ion implantation mode, it is a particular value that ion in described p type semiconductor layer 144 mixes concentration, namely the pinning effect of photodiode 140 is fixing, but, the pinning effect that described ion mixes the p type semiconductor layer 144 of concentration is likely not enough to photodiode 140 is had preferably electrically, because ion implantation completes, it is immutable that ion in described p type semiconductor layer 144 mixes concentration, thus make photodiode cannot obtain best pinning effect.
Summary of the invention
The problem that the present invention solves is to provide the good imageing sensor of a kind of pinning effect.
For solving the problem, a kind of imageing sensor, comprises the photodiode be formed on substrate; Be covered in the insulating barrier on described photodiode and transparency conducting layer successively; Described transparency conducting layer has negative voltage signal loading end.
The material of described transparency conducting layer is zinc oxide or tin indium oxide.
The thickness of described transparency conducting layer exists scope in.
The material of described insulating barrier is one in silicon dioxide, silicon nitride, silicon oxynitride or its combination.
The thickness of described insulating barrier exists scope in.
Also comprise the connector being connected to transparency conducting layer, described connector and exterior negative electrode press signal source to be connected.
Correspondingly, the present invention also provides a kind of manufacture method of imageing sensor, comprising: provide substrate; Substrate forms photodiode; Form insulating barrier, transparency conducting layer successively on the photodiode.
Also comprise interlayer dielectric layer on the photodiode, formation is arranged in described interlayer dielectric layer, is electrically connected on the connector of transparency conducting layer.
The described step forming photodiode on substrate comprises the photodiode of the output forming metal-oxide-semiconductor and be connected to metal-oxide-semiconductor.
Described formation metal-oxide-semiconductor comprises with the step of the output photodiode being connected to metal-oxide-semiconductor: the substrate providing P type, forms multiple P type trap zone over the substrate, in P type trap zone, form isolated area, comprises first area and second area between described isolated area; The P type trap zone of first area forms gate-dielectric, grid successively; Deep ion injection is carried out to the substrate of second area, in the substrate of P type, forms the dark doped region of N-type; Be that mask carries out N-type light dope to the P type trap zone of first area with grid; Form the side wall surrounding described gate-dielectric and grid; For mask, deep ion injection is carried out to the P type trap zone of first area with grid and side wall, form N-type doped region.
Insulating barrier is formed by chemical vapour deposition technique or boiler tube method.
Transparency conducting layer is formed by the method for magnetron sputtering.Compared with prior art, the present invention has the following advantages:
1. load negative voltage signal by connector to transparency conducting layer, thus form inversion layer on the surface of photodiode, described inversion layer plays pinning effect to photodiode, can pinning effect be changed by changing described negative voltage signal, and then make described photodiode can obtain best pinning effect.
2. the photodiode of pinning described in can also reduce the leakage current of imageing sensor, improve the conversion efficiency of blue light.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of imageing sensor one embodiment in prior art;
Fig. 2 is the schematic diagram of imageing sensor one embodiment of the present invention;
Fig. 3 is the schematic flow sheet of method for making image sensor one execution mode of the present invention;
Fig. 4 to Figure 11 is the schematic diagram of imageing sensor one embodiment that method for making image sensor of the present invention is formed.
Embodiment
For enabling above-mentioned purpose of the present invention, feature and advantage become apparent more, are described in detail the specific embodiment of the present invention below in conjunction with accompanying drawing.
Set forth a lot of detail in the following description so that fully understand the present invention, but the present invention can also adopt other to be different from alternate manner described here to implement, therefore the present invention is not by the restriction of following public specific embodiment.
For the problem described in background technology, the invention provides a kind of imageing sensor, show the schematic diagram of imageing sensor one embodiment of the present invention with reference to figure 2.Imageing sensor of the present invention comprises luminous zone and circuit region, wherein, luminous zone comprises the display unit of multiple matrix arrangement, each display unit is divided into first area and second area, described second area comprises photodiode, and described first area comprises the metal-oxide-semiconductor being connected to described photodiode; Described circuit region is provided with control circuit, and described control circuit controls photodiode by metal-oxide-semiconductor and sends light signal, and to complete image display, in the present embodiment, the structure of control circuit is same as the prior art, does not repeat them here.
In order to make accompanying drawing more succinct, clear, in Fig. 2, only illustrate luminous zone, and only with luminous zone display unit exemplarily.
The imageing sensor of the present embodiment comprises: the silicon substrate 201 of P type; Be positioned at the multiple P type trap zone 203 on silicon substrate 201; Be formed at the shallow channel isolation area (Shallow trenchIsolation, STI) 207 in P type trap zone 203, described shallow channel isolation area 207 for isolating luminous zone and circuit region, also for isolating each display unit; In the first area of display unit, comprise and be positioned at grid 215 in described P type trap zone 203 and gate-dielectric 210, surround the side wall 217 of described gate-dielectric 210 and grid 215, and be positioned at the doped region 219 of P type trap zone 203 surface below described grid 215 and gate-dielectric 210.State doped region 219, gate-dielectric 210, grid 215 and side wall 217 and form metal-oxide-semiconductor.Particularly, described doped region 219 is N-type doped region, but the present invention is not restricted to this.Described metal-oxide-semiconductor is a transfer tube, and for photodiode transmission charge, described metal-oxide-semiconductor comprises output, and described output is connected to photodiode.
The second area of display unit comprises the silicon substrate 201 being arranged in P type, the dark doped region 205 of the N-type being connected to metal-oxide-semiconductor, is formed with PN junction between the silicon substrate 201 of described P type and the dark doped region 205 of N-type, forms photodiode;
Described imageing sensor also comprises and is covered in insulating barrier 213 on the dark doped region 205 of described N-type and transparency conducting layer 211 successively, and described transparency conducting layer 211 has negative voltage signal loading end;
Described imageing sensor also comprises the interlayer dielectric layer 212 covered on metal-oxide-semiconductor and photodiode, be formed with the first connector 209 being electrically connected on described transparency conducting layer 211 in described interlayer dielectric layer 212, described first connector 209 is connected to the negative voltage signal loading end of described transparency conducting layer.Preferably, described first connector 209 is formed on shallow channel isolation area 207, thus the light avoiding the first connector 209 to block light-emitting diode sending, described imageing sensor also comprises the second connector 208 of the doped region 219 being electrically connected on metal-oxide-semiconductor.Described control circuit passes through the second connector 208 to metal-oxide-semiconductor charging electric charge.
Described first connector 209 is connected to exterior negative electrode pressure signal source (not shown), by loading negative voltage signal to the first connector 209, thus the transparency conducting layer 211 making to be electrically connected on the first connector 209 is loaded with negative voltage signal, described negative voltage signal can make the surface of the dark doped region of N-type 205 formed inversion layer (described transparency conducting layer 211 and insulating barrier 213 respectively with the grid of PMOS and gate-dielectric similar).The process that described loading negative voltage forms inversion layer is similar to PMOS pressurized operation process.Described inversion layer is as the pinning layer of photodiode, and described P type trap zone 203, the dark doped region of N-type 205 and anti-shape layer form the photodiode of pinning.
The photodiode of pinning can reduce the impact of the surface state (dangling bonds of such as surface) of silicon, thus reduces the electric current of photodiode surface movable charge formation, and then reduces the leakage current of photodiode;
In addition, the photodiode due to pinning is easy to collect blue electron, and therefore the photodiode of pinning can increase the conversion efficiency of blue light;
Further, because pinning effect is relevant to inversion layer, the pinning effect of inversion layer can be changed by changing the negative voltage signal loaded on described first connector, after the making completing imageing sensor, the negative voltage signal that also can be loaded on the first connector by adjustment, to obtain the photodiode of best pinning effect.
Correspondingly, the present invention also provides a kind of manufacture method of imageing sensor, shows the schematic flow sheet of invention method for making image sensor one execution mode with reference to figure 3.Described method for making image sensor comprises the following steps:
Step S1, provides the substrate of P type, substrate is formed multiple P type trap zone, in P type trap zone, forms isolated area, comprises first area and second area between described isolated area;
Step S2, the P type trap zone of first area forms gate-dielectric, grid successively;
Step S3, carries out deep ion injection to second area, forms the dark doped region of N-type in the substrate of P type;
Step S4 is that mask carries out N-type light dope to the P type trap zone of first area with grid;
Step S5, forms the side wall surrounding described gate-dielectric medium and grid;
Step S6, carries out deep ion injection for mask to the P type trap zone of first area with grid and side wall, forms N-type doped region;
Step S7, the dark doped region of the N-type of first area forms insulating barrier and transparency conducting layer successively;
Step S8, dielectric layer between described transparency conducting layer, grid, isolated area upper caldding layer, forms the first connector be electrically connected on described transparency conducting layer, is electrically connected on the second connector of doped region in described interlayer dielectric layer.
Below in conjunction with specific embodiments and the drawings, above steps is described further.
With reference to figure 4 to the schematic diagram showing imageing sensor one embodiment that method for making image sensor of the present invention is formed with reference to Figure 11.In order to make accompanying drawing more succinct, clear, in Fig. 4 to Figure 11, only illustrate luminous zone, and only with luminous zone display unit exemplarily.
With reference to figure 4, perform step S1, described substrate 301 can be monocrystalline silicon or SiGe; Also can be silicon-on-insulator (Silicon on insulator, SOI), in the present embodiment, the substrate that described substrate 301 adulterates for P type; Described P type trap zone 303 can be formed on substrate 301 by the method for ion implantation or diffusion, and described P type trap zone 303 can adopt boron ion doping to form; Described isolated area 307 is for the viewing area of isolation view image-position sensor and circuit region, and also for each display unit of viewing area of insulating, particularly, described isolated area 307 can be shallow channel isolation area or field oxide region.
Be divided into first area and second area between described isolated area 307, wherein first area is for the formation of metal-oxide-semiconductor, and second area is for the formation of photodiode.
With reference to figure 5, perform step S2, the material of described gate-dielectric 302 can be silicon dioxide, particularly, forms gate-dielectric by thermal oxidation process in the P type trap zone 303 of first area; The material of described grid 304 is polysilicon, particularly, forms grid 304 by Low Pressure Chemical Vapor Deposition on gate-dielectric 302.
With reference to figure 6, perform step S3, in the present embodiment, carry out the injection of N-type deep ion to the P type substrate of second area, particularly, described N-type ion is arsenic ion or phosphonium ion, is injected to example with arsenic ion, and Implantation Energy is in the scope of 35 ~ 50KeV, and dosage is 1 × 10 14~ 6 × 10 15atoms/cm 2, form the dark doped region 308 of N-type in the second area, between the substrate 301 of described P type and the dark doped region 308 of N-type, form PN junction, to form photodiode.
With reference to figure 7, perform step S4, with described gate-dielectric 302 and grid 304 for mask, N-type light dope is carried out to the P type trap zone 303 exposed in first area, form N-type light doping section 305.Particularly, described N-type Doped ions is arsenic ion or phosphonium ion, can be formed at P type trap zone 303, be injected to example with arsenic ion by the method for ion implantation or diffusion, and Implantation Energy is in the scope of 9 ~ 11KeV, and dosage is 1 × 10 12~ 6 × 10 13atoms/cm 2.
With reference to figure 8, perform step S5, form the dielectric layer that conformal covers described gate-dielectric 302 and grid 304, remove the dielectric layer on grid and the dielectric layer in P type trap zone 303 by dry etching, form the side wall 306 surrounding described gate-dielectric 302 and grid 304.
With reference to figure 9, perform step S6, particularly, the dark doped region 308 of N-type forms photoresist layer, graphical described photoresist layer defines first area, then for mask, deep ion injection is carried out to first area with grid 304 and side wall 306, form N-type doped region 319, particularly, it is arsenic ion or phosphonium ion that described deep ion injects the N-type ion adopted, be injected to example with arsenic ion, Implantation Energy is in the scope of 35 ~ 501KeV, and dosage is 1 × 10 14~ 6 × 10 15atoms/cm 2.
Thus complete the manufacture process forming metal-oxide-semiconductor in the first region.
With reference to Figure 10, perform step S7, the dark doped region 308 of the N-type of second area forms insulating barrier 313 and transparency conducting layer 311 successively, graphical described insulating barrier 313 and transparency conducting layer 311 afterwards, removes insulating barrier 313 and the transparency conducting layer 311 in other regions outside photodiode area, the isolated area adjacent with photodiode;
Particularly, the material of described insulating barrier 313 can be one in silicon dioxide, silicon nitride or silicon oxynitride or its combination, and preferably, the thickness of described insulating barrier 313 is described insulating barrier 313 can be formed by the method etc. of chemical vapour deposition technique or boiler tube;
The material of described transparency conducting layer 311 can be zinc oxide or tin indium oxide (ITO), in order to avoid thicker transparency conducting layer 311 can cause light utilization efficiency lower, preferably, the thickness of described transparent electrode layer 311 between described transparency conducting layer 311 can be formed by the method for magnetron sputtering.
With reference to Figure 11, perform step S8, the material of described interlayer dielectric layer 321 is silica or boron phosphorus silicate glass (BPSG), and the thickness of described interlayer dielectric layer 321 at least covers described grid 304, and particularly, the thickness of described interlayer dielectric layer 321 exists scope in, described interlayer dielectric layer 321 can be formed by chemical vapour deposition technique.
Preferably, form the first connector 315, second connector 317 in described interlayer dielectric layer 321 before, flatening process is carried out to described interlayer dielectric layer 321, to make the surface of interlayer dielectric layer 321 comparatively smooth.
Particularly, the first opening is formed until described first opening exposes transparency conducting layer 311 by the interlayer dielectric layer 321 of reactive ion etching method in isolated area 307; Interlayer dielectric layer 321 on source/drain regions 319 forms the second opening until described second opening exposes source/drain regions 319.
By magnetron sputtering method or physical vaporous deposition to deposits conductive material in described first opening and the second opening, to form the first connector 315 being filled in the first opening, be filled in the second connector 317 in the second opening.Particularly, described electric conducting material is the metal material of tungsten, copper etc.
Preferably, after having deposited electric conducting material, by the surface of interlayer dielectric layer 321 described in chemical mechanical milling method planarization.
So far the manufacturing process of imageing sensor of the present invention is completed.
In the application process of imageing sensor, negative voltage signal is loaded to transparency conducting layer 311 by the first connector 315, thus form inversion layer (P-type layer) on the surface of the dark doped region 308 of N-type, described inversion layer plays pinning effect to photodiode, can pinning effect be changed by changing described negative voltage signal, and then make described photodiode can obtain best pinning effect.
In addition, the photodiode of described pinning can also reduce the leakage current of imageing sensor, improve the conversion efficiency of blue light.
It should be noted that, in above-described embodiment, described first connector is formed at isolated area, but the present invention is not restricted to this, can also be arranged in the interlayer dielectric layer of other positions on transparency conducting layer, those skilled in the art correspondingly can be out of shape the present invention according to above-described embodiment, revise and replace.
Also it should be noted that, in the above-described embodiments, described substrate carries out N-type doping to form photodiode, but the present invention is not restricted to this, can also be in N substrate, carry out the doping of P type to form photodiode, those skilled in the art correspondingly can be out of shape the present invention according to above-described embodiment, revise and replace.
Although the present invention with preferred embodiment openly as above; but it is not for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; the Method and Technology content of above-mentioned announcement can be utilized to make possible variation and amendment to technical solution of the present invention; therefore; every content not departing from technical solution of the present invention; the any simple modification done above embodiment according to technical spirit of the present invention, equivalent variations and modification, all belong to the protection range of technical solution of the present invention.

Claims (12)

1. an imageing sensor, is characterized in that, comprises the photodiode be formed in substrate, described substrate is the silicon substrate of P type, also be formed with the dark doped region of N-type in the silicon substrate of described P type, be formed with PN junction between the silicon substrate of described P type and the dark doped region of N-type, form described photodiode;
Described imageing sensor also comprises: the insulating barrier being covered in surface, described N-type dark doped region, is covered in the transparency conducting layer of described surface of insulating layer; Described transparency conducting layer has negative voltage signal loading end, for forming inversion layer on surface, described N-type dark doped region, described inversion layer as the pinning layer of photodiode, the electric current that the impact for reducing the surface state of silicon is formed to reduce photodiode surface movable charge; Described negative voltage signal loading end is loaded with the negative voltage signal that can change.
2. imageing sensor as claimed in claim 1, it is characterized in that, the material of described transparency conducting layer is zinc oxide or tin indium oxide.
3. imageing sensor as claimed in claim 1, it is characterized in that, the thickness of described transparency conducting layer exists scope in.
4. imageing sensor as claimed in claim 1, is characterized in that, the material of described insulating barrier is one in silicon dioxide, silicon nitride, silicon oxynitride or its combination.
5. imageing sensor as claimed in claim 1, it is characterized in that, the thickness of described insulating barrier exists scope in.
6. imageing sensor as claimed in claim 1, it is characterized in that, also comprise the connector being connected to transparency conducting layer, described connector and exterior negative electrode press signal source to be connected.
7. a manufacture method for imageing sensor, is characterized in that, provides substrate, and described substrate is the silicon substrate of P type; In the silicon substrate of P type, form the dark doped region of N-type, between the silicon substrate of described P type and the dark doped region of N-type, be formed with PN junction, form photodiode; Insulating barrier is covered on the surface in the dark doped region of described N-type; Described insulating barrier covers transparency conducting layer, described transparency conducting layer has negative voltage signal loading end, for forming inversion layer on surface, described N-type dark doped region, described inversion layer as the pinning layer of photodiode, the electric current that the impact for reducing the surface state of silicon is formed to reduce photodiode surface movable charge; Described negative voltage signal loading end loads the negative voltage signal that can change.
8. manufacture method as claimed in claim 7, is characterized in that, also comprise interlayer dielectric layer on the photodiode, and formation is arranged in described interlayer dielectric layer, is electrically connected on the connector of transparency conducting layer.
9. manufacture method as claimed in claim 7, is characterized in that, the described step forming photodiode on substrate comprises the photodiode of the output forming metal-oxide-semiconductor and be connected to metal-oxide-semiconductor.
10. manufacture method as claimed in claim 9, it is characterized in that, described formation metal-oxide-semiconductor comprises with the step of the output photodiode being connected to metal-oxide-semiconductor: the substrate providing P type, form multiple P type trap zone over the substrate, in P type trap zone, form isolated area, between described isolated area, comprise first area and second area; The P type trap zone of first area forms gate-dielectric, grid successively; Deep ion injection is carried out to the substrate of second area, in the substrate of P type, forms the dark doped region of N-type; Be that mask carries out N-type light dope to the P type trap zone of first area with grid; Form the side wall surrounding described gate-dielectric and grid; For mask, deep ion injection is carried out to the P type trap zone of first area with grid and side wall, form N-type doped region.
11. manufacture methods as claimed in claim 7, is characterized in that, form insulating barrier by chemical vapour deposition technique or boiler tube method.
12. manufacture methods as claimed in claim 7, is characterized in that, form transparency conducting layer by the method for magnetron sputtering.
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