Cmos image sensor
Technical field
The present invention relates to a kind of imageing sensor, particularly a kind of cmos image sensor.
Background technology
Existing cmos image sensor is that pixel unit circuit and cmos circuit form by photosensitive pixel, with respect to ccd image sensor, cmos image sensor is because adopt CMOS standard manufacture craft, but therefore there is better integrated level, can be integrated on the same chip with other digital-to-analogue computings and control circuit, more adapt to following development.
According to the contained transistor size of pixel unit circuit of existing cmos image sensor, it mainly is divided into 3T type structure and 4T type structure.The pixel unit circuit of existing cmos image sensor comprises photosensitive structure and cmos pixel reading circuit.For 3T type structure, described cmos pixel reading circuit is 3T type image element circuit, comprises reset transistor, amplifier tube, selection pipe, described photosensitive structure and described reset transistor and amplifier tube Interconnected.For 4T type structure, described cmos pixel reading circuit is 4T type image element circuit, comprises reset transistor, amplifier tube, selection pipe and transfering transistor, described photosensitive structure and described transfering transistor Interconnected.
Existing cmos image sensor described photosensitive structure be generally light sensitive diode, existing light sensitive diode generally is formed in the body silicon materials and the p type island region HeNXing district of light sensitive diode is the vertical structure.
But need to have stronger antijamming capability in some fields, so just described light sensitive diode need to be formed on silicon substrate (SOI) material with insulating buried layer, described SOI material comprises top layer silicon, insulating barrier, support silicon from top to bottom.Reason is that insulating buried layer is generally oxygen buried layer and can eliminates latch-up common in the Bulk CMOS structure, suppresses substrate current and disturbs, and stronger isolation effect can be provided.
While on the SOI material, making cmos image sensor, because the top layer silicon of SOI material is too thin, cause the light sensitive diode technique of existing vertical structure to obtain enough depletion regions at vertical direction.Therefore existing photosensitive structure can adopt horizontal PIN structure usually.
As shown in Figure 1, be the structural representation of existing 3T type SOI cmos image sensor, existing 3T type SOI cmos image sensor comprises:
The SOI material, comprise that top layer silicon, insulating barrier 102, support substrates are silicon substrate 101 from top to bottom.
The PIN knot, be comprised of three transversely arranged doped regions, the I type district that the second doped region 104 is described PIN knot; The first doped region 103 is connected for p type island region, a side that is positioned at described the second doped region 104, described the first doped region 103 and described the second doped region 104 contacts; The 3rd doped region 105WeiNXing district, the opposite side that is positioned at described the second doped region 104, described the 3rd doped region 105 and described the second doped region 104 contacts are connected.
3T type cmos pixel reading circuit, comprise reset transistor 106, amplifier tube 107, select pipe 108, described PIN knot and described reset transistor 106 and amplifier tube 107 Interconnecteds.
Described the first doped region 103 and described the 3rd doped region 105 are high-concentration dopant, and described the second doped region 104 is low concentration doping, and described the second doped region 104 exhausts fully, is photosensitive area.When illumination enters the second doped region 102, the electron hole pair of generation shifts to the 3rd doped region 105 and the first doped region 103 respectively, finally by the cmos pixel reading circuit, reads.
There is following shortcoming in the existing cmos image sensor technology that comprises horizontal PIN structure as described in Figure 1:
Be limited to the carrier diffusion length that I type district is described the second doped region 104, the electron institute that easily is transferred to the N-type district near the hole that the 3rd doped region 105 places produce, N-type district in transferring to the process that p type island region is the first doped region 103 is compound.Therefore when I type section length has surpassed diffusion length, then increase I type section length and also can't improve the photoresponse rate, so limited the effective feeling light area of photosensitive area.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of cmos image sensor, can increase the transfer efficiency of the photogenerated charge of photosensitive area, thereby can increase length and the effective feeling light area of photosensitive area, can improve the photoresponse rate.
For solving the problems of the technologies described above, cmos image sensor provided by the invention is formed on Semiconductor substrate, and the pixel unit circuit of cmos image sensor comprises photosensitive structure, cmos pixel reading circuit; Described photosensitive structure comprises PIN knot and a polysilicon gate.
Described PIN knot is comprised of three transversely arranged doped regions, the I type district that the second doped region is described PIN knot; The first doped region is p type island region, be positioned at a side of described the second doped region, described the first doped region and described the second doped region contact are connected; The 3rd doped region WeiNXing district, the opposite side that is positioned at described the second doped region, described the 3rd doped region and described the second doped region contact are connected;
Described polysilicon gate is formed at isolation between described the second doped region top and described polysilicon gate and described the second doped region gate oxide.
Further improve is that described polysilicon gate is that N-type doping or described polysilicon gate are the doping of P type.
Further improving is that the p type impurity concentration of described the first doped region is 1E17CM
-3~1E21CM
-3, the N-type impurity concentration of described the 3rd doped region is 1E17CM
-3~1E21CM
-3.
Further improve is that described the second doped region is that the doping of P type and concentration are 1E10CM
-3~1E16CM
-3, be less than doping content described first, the 3rd doped region; Perhaps, described the second doped region is that N-type doping and concentration are 1E10CM
-3~1E16CM
-3, be less than doping content described first, the 3rd doped region.
Further improving is that described cmos pixel reading circuit is 3T type image element circuit, comprises reset transistor, amplifier tube, selection pipe, described photosensitive structure and described reset transistor and amplifier tube Interconnected.
Further improving is that described cmos pixel reading circuit is 4T type image element circuit, comprises reset transistor, amplifier tube, selection pipe and transfer pipeline, described photosensitive structure and described transfer pipeline Interconnected.
Further improvement is, described silicon materials are the silicon substrate with insulating buried layer, and the described silicon substrate with insulating buried layer comprises top layer silicon, insulating barrier, support substrates from top to bottom; Described cmos image sensor is formed on described top layer silicon.
Further improving is that described cmos image sensor is the back-illuminated type structure.
The photosensitive structure of cmos image sensor of the present invention adopts the PIN knot of transverse type, can make cmos image sensor of the present invention be formed on the top layer silicon of SOI material, thereby can make cmos image sensor of the present invention have very strong antijamming capability.
Photosensitive structure of the present invention also comprises a polysilicon gate in the I type district that is formed at PIN knot.I type district is photosensitive area, it is crooked that polysilicon gate can make being with of I type district produce, thereby can increase the transfer ability of the photogenerated charge that makes I type district, when I type section length has surpassed the diffusion length of light induced electron or photohole, also can make light induced electron or photohole effectively transfer in N-type district or p type island region, thereby can reduce the recombination probability of transfer in transfer process of photogenerated charge, can increase the transfer efficiency of the photogenerated charge of photosensitive area, also can increase length and the effective feeling light area of photosensitive area, can improve the photoresponse rate.
Cmos image sensor of the present invention adopts the back-illuminated type structure to adopt back-illuminated type daylighting, because polysilicon gate is formed at the front of cmos image sensor, so cmos image sensor of the present invention improves photon absorption efficiency.
The accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation:
Fig. 1 is the structural representation of existing 3T type SOI cmos image sensor;
Fig. 2 is the structural representation of embodiment of the present invention cmos image sensor;
Fig. 3-Fig. 7 is the structural representation in each step of manufacture method of embodiment of the present invention cmos image sensor.
Embodiment
Fig. 2 is the structural representation of embodiment of the present invention cmos image sensor.Embodiment of the present invention cmos image sensor is formed on the top layer silicon 03 of the silicon substrate (SOI) with insulating buried layer, and the described silicon substrate with insulating buried layer comprises that described top layer silicon 03, insulating barrier 02, support substrates are silicon substrate 01 from top to bottom.
The pixel unit circuit of cmos image sensor comprises photosensitive structure, cmos pixel reading circuit; Described photosensitive structure comprises PIN knot and a polysilicon gate 07.
Described PIN knot is comprised of three transversely arranged doped regions.
The I type district that the second doped region 06 is described PIN knot.Described the second doped region is that the doping of P type and concentration are 1E10CM
-3~1E16CM
-3; Perhaps, described the second doped region is that N-type doping and concentration are 1E10CM
-3~1E16CM
-3.
The first doped region 04 is connected for p type island region, a side that is positioned at described the second doped region 06, described the first doped region 04 and described the second doped region 06 contact.The p type impurity concentration of described the first doped region 04 is 1E17CM
-3~1E21CM
-3.
The 3rd doped region 05WeiNXing district, the opposite side that is positioned at described the second doped region 06, described the 3rd doped region 05 and described the second doped region 06 contact are connected.The N-type impurity concentration of described the 3rd doped region 05 is 1E17CM
-3~1E21CM
-3.Certainly, the position of described the first doped region 04 and described the 3rd doped region 05 can exchange.
From the doping content of described the first doped region 04, described the 3rd doped region 05 and described the second doped region 06, the doping content of described the second doped region 06 is low, can be completely depleted, and described the second doped region 06 is photosensitive area.Described cmos image sensor is the back-illuminated type structure, and light is from the back surface incident of described the second doped region 06, i.e. the direction incident to described the second doped region 06 by described insulating barrier 02.
Described polysilicon gate 07 is formed at described the second doped region 06 top and described polysilicon gate 07 and 06 isolation of described the second doped region gate oxide.Described polysilicon gate 07 adulterates for N-type or described polysilicon gate is the doping of P type.
Described cmos pixel reading circuit is 3T type image element circuit, comprises reset transistor 08, amplifier tube 09, selects pipe 10, described photosensitive structure and described reset transistor 08 and amplifier tube 09 Interconnected.Certainly, described cmos pixel reading circuit can be also 4T type image element circuit.
As shown in Fig. 3 to Fig. 7, it is the structural representation in each step of manufacture method of embodiment of the present invention cmos image sensor.The manufacture method of embodiment of the present invention cmos image sensor comprises the steps:
As shown in Figure 3, prepare a SOI substrate, described SOI substrate comprises that described top layer silicon 03, insulating barrier 02, support substrates are silicon substrate 01 from top to bottom.
Form three transversely arranged doped regions of PIN knot.Comprise as follows step by step:
As shown in Figure 4, the position of the p type island region of tying at needs formation PIN carries out P type ion implantation technology or diffusion technology forms the first doped region 04, and the p type impurity concentration of described the first doped region 04 is 1E17CM
-3~1E21CM
-3.
As shown in Figure 5, N-type ion implantation technology or diffusion technology formation the 3rd doped region 05 are carried out in the position that forms PIN JieNXing district at needs, and the N-type impurity concentration of described the 3rd doped region 05 is 1E17CM
-3~1E21CM
-3.Certainly, the position of described the first doped region 04 and described the 3rd doped region 05 is to exchange.
The position in the I type district of tying at needs formation PIN as shown in Figure 6, carries out ion implantation technology or diffusion technology forms the second doped region 06.Described the second doped region 06 be positioned at described the first doped region 04 with in the middle of described the 3rd doped region 05, and with described the first doped region 04, with described the 3rd doped region 05, contact respectively.The impurity of described the second doped region 06 Implantation is that P type and doping content are 1E10CM
-3~1E16CM
-3; Perhaps, the impurity of described the second doped region 06 Implantation is that N-type and doping content are 1E10CM
-3~1E16CM
-3.
As shown in Figure 7, form polysilicon gate 07.Described polysilicon gate 07 is positioned at described the second doped region 06 top and described polysilicon gate 07 and 06 isolation of described the second doped region gate oxide; Described PIN knot and described polysilicon gate 07 form photosensitive structure.
As shown in Figure 2, form the cmos pixel reading circuit.After forming described photosensitive structure, before this described top layer silicon 03 around photosensitive structure was etched away, then make described cmos pixel reading circuit in the described top layer silicon 03 in the zone of described cmos pixel reading circuit, in Fig. 2, described cmos pixel reading circuit is 3T type image element circuit, comprises reset transistor 08, amplifier tube 09, selects pipe 10.Certainly, described cmos pixel reading circuit can be also 4T type image element circuit.
Abovely by specific embodiment, the present invention is had been described in detail, but these not are construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.