CN102573316A - Resistance welding layer processing method and circuit board manufacturing method - Google Patents
Resistance welding layer processing method and circuit board manufacturing method Download PDFInfo
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- CN102573316A CN102573316A CN2010105939287A CN201010593928A CN102573316A CN 102573316 A CN102573316 A CN 102573316A CN 2010105939287 A CN2010105939287 A CN 2010105939287A CN 201010593928 A CN201010593928 A CN 201010593928A CN 102573316 A CN102573316 A CN 102573316A
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- 238000003672 processing method Methods 0.000 title claims abstract description 32
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 21
- 238000003466 welding Methods 0.000 title abstract description 10
- 238000000034 method Methods 0.000 claims abstract description 45
- 238000001020 plasma etching Methods 0.000 claims abstract description 21
- 229910000679 solder Inorganic materials 0.000 claims description 103
- 239000007789 gas Substances 0.000 claims description 51
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 28
- 239000001301 oxygen Substances 0.000 claims description 28
- 229910052760 oxygen Inorganic materials 0.000 claims description 28
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 claims description 14
- 239000003595 mist Substances 0.000 claims description 9
- 238000001035 drying Methods 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 6
- 238000005516 engineering process Methods 0.000 description 7
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 2
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000004567 concrete Substances 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 230000003064 anti-oxidating effect Effects 0.000 description 1
- 239000004568 cement Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 230000008034 disappearance Effects 0.000 description 1
- 239000003814 drug Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 230000011218 segmentation Effects 0.000 description 1
- 229910000029 sodium carbonate Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 description 1
- 229960000909 sulfur hexafluoride Drugs 0.000 description 1
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- Manufacturing Of Printed Wiring (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
The invention provides a resistance welding layer processing method and a circuit board manufacturing method, which belongs to the technical field of circuits, and can solve the problem that a conventional resistance welding layer easily be damaged. The resistance welding layer processing method provided by the invention comprises that a solidified plasma etching process is carried out for the resistance welding layer. The circuit board manufacturing method provided by the invention comprises the steps that firstly the solidified resistance welding layer is formed on the surface of the base plate of the circuit board; and secondly the resistance welding layer is processed by adopting the resistance welding layer processing method. The methods provided by the invention are suitable for processing the resistance welding layer of a thin circuit board.
Description
Technical field
The present invention relates to the wiring board technical field, relate in particular to a kind of solder mask processing method and wiring board manufacturing approach.
Background technology
Owing to have plurality of advantages such as cost is low, volume is little, manufacturing is simple, integrated level height, the application of wiring board (claiming circuit board, printed circuit board (PCB) again) more and more widely.Need form solder mask (Solder Mask claims green oil usually again) through technologies such as silk-screens when wiring board is made, also will solder mask be made public, develop the solder mask that again its curing is obtained solidifying afterwards.Solder mask can prevent in technologies such as heavy tin, heavy silver, to produce short circuit or cause incorrect welding, also can play effects such as improving insulating properties, protective circuit, anti-oxidation simultaneously.
The inventor finds to exist at least in the prior art following problem: solder mask hardness before curing is very low; Therefore in the technologies such as the silk-screen before curing, exposure, development; Be easy to form cut on the solder mask, inhale trace, roller seal equivalent damage, thereby cause wiring board bad order finally to occur even scrap.
Summary of the invention
Embodiments of the invention provide a kind of solder mask processing method, and it can eliminate or reduce the damage on solder mask surface.
For achieving the above object, embodiments of the invention adopt following technical scheme:
A kind of solder mask processing method comprises:
Solder mask to having cured carries out plasma etching treatment.
Wherein, Plasma etching treatment is a kind of Cement Composite Treated by Plasma commonly used technology; It places process gas with pending substrate, uses afterwards through glow discharge process gas ionization is plasma, utilizes the effect of plasma and substrate surface material that etching processing is carried out in substrate.
Owing to comprise the step of solder mask being carried out plasma etching treatment in the solder mask processing method of embodiments of the invention; And plasma etching treatment can make the molecule volatilization on solder mask surface and form " volatilization mist " at the solder mask near surface; Should " volatilization mist " can uniform deposition when solidifying again and fill up cut, inhale trace, in the roller seal equivalent damage (formation and the curing of " volatilization mist " are generally the process of carrying out simultaneously), thereby eliminate or reduce the damage on solder mask surface.
As a kind of preferred version of embodiments of the invention, said plasma etching treatment comprises that the phase I handles with second stage to be handled, in the said phase I processing with oxygen as process gas; During said second stage is handled with the mist of oxygen and carbon tetrafluoride gas as process gas.
A kind of preferred version as embodiments of the invention; Oxygen flow is in 1.2SLM (gas flow unit in the said phase I processing; Standard Liter Per Minute; Rise every mole under the standard state) between the 1.8SLM, process gas pressure at 200mTorr (pressure unit, millitorr) between the 280mTorr; Oxygen flow was between 1.2SLM to 1.8SLM during said second stage was handled, and the carbon tetrafluoride gas flow is between 0.01SLM to 0.07SLM, and process gas pressure is between 200mTorr to 280mTorr.
As a kind of preferred version of embodiments of the invention, oxygen flow is 1.5SLM in the said phase I processing, and process gas pressure is 240mTorr; Oxygen flow was 1.46SLM during said second stage was handled, and the carbon tetrafluoride gas flow is 0.04SLM, and process gas pressure is 240mTorr.
As a kind of preferred version of embodiments of the invention, the radio-frequency power (radio-frequency power is meant the discharge power that activated plasma is used) that adopts in the said phase I processing is between 4.5kW to 7kW; The radio-frequency power that adopts during said second stage is handled is between 4.5kW to 7kW.
As a kind of preferred version of embodiments of the invention, the radio-frequency power that adopts in the said phase I processing is 5.5kW; The radio-frequency power that adopts during said second stage is handled is 5.5kW.
As a kind of preferred version of embodiments of the invention, treatment temperature is between 30 degrees centigrade to 70 degrees centigrade in the said phase I processing, and the processing time is between 4 minutes to 10 minutes; Treatment temperature was between 30 degrees centigrade to 70 degrees centigrade during said second stage was handled, and the processing time is between 2 minutes to 8 minutes.
As a kind of preferred version of embodiments of the invention, treatment temperature is 50 degrees centigrade in the said phase I processing, and the processing time is 7 minutes; Treatment temperature was 50 degrees centigrade during said second stage was handled, and the processing time is 5 minutes.
Embodiments of the invention also provide a kind of wiring board manufacturing approach, the few or not damage of the solder mask surface damage of the wiring board of its manufacturing.
For achieving the above object, embodiments of the invention adopt following technical scheme:
A kind of wiring board manufacturing approach comprises:
Form the solder mask that solidifies on circuit base board surface;
Solder mask processing method by above-mentioned is handled said solder mask.
Owing to comprise above-mentioned solder mask processing method in the wiring board manufacturing approach of embodiments of the invention, so the solder mask surface damage of the wiring board of its manufacturing is few or not damage.
As a kind of preferred version of embodiments of the invention, the said solder mask that forms curing on circuit base board surface comprises: form solder mask at said wiring board substrate surface; Said solder mask is carried out preliminary drying; Said solder mask is made public; Said solder mask is developed; Said solder mask is cured.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art; To do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below; Obviously, the accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the flow chart of the solder mask processing method of the embodiment of the invention one;
Fig. 2 is the flow chart of the wiring board manufacturing approach of the embodiment of the invention two.
Embodiment
The present invention provides a kind of solder mask processing method, it is characterized in that, comprising:
Solder mask to having cured carries out plasma etching treatment.
By this method, can repair the defective that circuit board solder mask surface exists.
Preferably, in various embodiments of the present invention, said plasma etching treatment comprises that the phase I handles and second stage is handled, wherein,
Said phase I handle in oxygen as process gas;
During said second stage is handled with the mist of oxygen and carbon tetrafluoride gas as process gas.
Preferably, in various embodiments of the present invention:
Oxygen flow is between 1.2SLM to 1.8SLM in the said phase I processing, and process gas pressure is between 200mTorr to 280mTorr;
Oxygen flow was between 1.2SLM to 1.8SLM during said second stage was handled, and the carbon tetrafluoride gas flow is between 0.01SLM to 0.07SLM, and process gas pressure is between 200mTorr to 280mTorr.
Preferably, in various embodiments of the present invention:
Oxygen flow is 1.5SLM in the said phase I processing, and process gas pressure is 240mTorr;
Oxygen flow was 1.46SLM during said second stage was handled, and the carbon tetrafluoride gas flow is 0.04SLM, and process gas pressure is 240mTorr.
Preferably, in various embodiments of the present invention:
The radio-frequency power that adopts in the said phase I processing is between 4.5kW to 7kW;
The radio-frequency power that adopts during said second stage is handled is between 4.5kW to 7kW.
Preferably, in various embodiments of the present invention:
The radio-frequency power that adopts in the said phase I processing is 5.5kW;
The radio-frequency power that adopts during said second stage is handled is 5.5kW.
Preferably, in various embodiments of the present invention:
Treatment temperature is between 30 degrees centigrade to 70 degrees centigrade in the said phase I processing, and the processing time is between 4 minutes to 10 minutes;
Treatment temperature was between 30 degrees centigrade to 70 degrees centigrade during said second stage was handled, and the processing time is between 2 minutes to 8 minutes.
Preferably, in various embodiments of the present invention:
Treatment temperature is 50 degrees centigrade in the said phase I processing, and the processing time is 7 minutes;
Treatment temperature was 50 degrees centigrade during said second stage was handled, and the processing time is 5 minutes.
The present invention provides a kind of wiring board manufacturing approach, it is characterized in that, comprising:
Form the solder mask that solidifies on circuit base board surface;
By aforesaid solder mask processing method said solder mask is handled.
Preferably, in various embodiments of the present invention, the said solder mask that forms curing on circuit base board surface comprises:
Form solder mask at said wiring board substrate surface;
Said solder mask is carried out preliminary drying;
Said solder mask is made public;
Said solder mask is developed;
Said solder mask is cured.
To combine the accompanying drawing in the embodiment of the invention below, the technical scheme of the embodiment of the invention is carried out clear, intactly description, obviously, described embodiment only is a part of embodiment of the present invention, rather than whole embodiment.Based on the embodiment among the present invention, all other embodiment that those of ordinary skills are obtained under the prerequisite of not making creative work belong to the scope that the present invention protects.
The embodiment of the invention provides a kind of solder mask processing method, comprising:
Solder mask to having cured carries out plasma etching treatment.
Owing to comprise the step of solder mask being carried out plasma etching treatment in the solder mask processing method of embodiments of the invention; And plasma etching treatment can make the molecule volatilization on solder mask surface and form " volatilization mist " at the solder mask near surface; Should " volatilization mist " can uniform deposition when solidifying again and fill up cut, inhale trace, in the roller seal equivalent damage, thereby eliminate or reduce the damage on solder mask surface; Also can improve the surface quality of wiring board thus, improve its rate of finished products, reduce its cost.And plasma etching treatment can be handled the solder mask of whole PCB surface simultaneously, and can handle the polylith wiring board simultaneously, so it is simple to operate, efficient is high, cost is low.
Embodiment one
The embodiment of the invention provides a kind of solder mask processing method, and as shown in Figure 1, it comprises:
S01, the wiring board that the surface is had a solder mask that has cured place the chamber of plasma etching treatment equipment, and chamber is vacuumized.Wherein wiring board is preferably the slim wiring board solder mask of slim wiring board (because be damaged more easily), and this wiring board has preferably passed through the solder mask cured but also do not carried out character, heavy tin, gold-plated finger, mills processing such as plate, heavy silver; Certainly, be in solid state as long as guarantee solder mask, wiring board also can carry out the solder mask of present embodiment again after carrying out other treatment step handles.Alternatively, wiring board is carried out the surface detect, find that many cuts are arranged on its solder mask, to inhale surfaces such as trace, roller seal bad.
S02, phase I handle: with flow aerating oxygen (process gas) in chamber of 1.2～1.8SLM, and produce plasma so that solder mask is carried out plasma etching treatment through glow discharge; Wherein the pressure of process gas (being the pressure in the chamber) remains on 200～280mTorr, and radio-frequency power is at 4.5～7kW, and treatment temperature is at 30～70 ℃, and the processing time is 4～10 minutes.
S03, second stage are handled: the mist of using oxygen and carbon tetrafluoride gas instead is as process gas; Wherein the flow of oxygen is 1.2～1.8SLM; The flow of carbon tetrafluoride gas is 0.01～0.07SLM; Carbon tetrafluoride gas can feed in the chamber in advance with after the oxygen mix again, also can feed chamber respectively with oxygen; And process gas pressure still can remain on 200～280mTorr, and radio-frequency power is at 4.5～7kW, and treatment temperature is at 30～70 ℃, and the processing time is 2～8 minutes.
S04, stop to discharge and the feeding of process gas, make chamber recover normal temperature and pressure, the wiring board after handling is taken out.Alternatively, wiring board is carried out the surface detect, find the various bad disappearance basically on its solder mask.
Embodiment two
The embodiment of the invention provides a kind of solder mask processing method, and the solder mask processing method of itself and embodiment one is similar, and difference is:
The technological parameter that phase I handles in (S02 step) is chosen as: oxygen flow 1.5SLM, process gas pressure 240mTorr, radio-frequency power 5.5kW, 50 ℃ of treatment temperatures, 7 minutes processing times;
The technological parameter that second stage is handled in (S03 step) is chosen as: oxygen flow 1.46SLM, carbon tetrafluoride flow 0.04SLM, process gas pressure 240mTorr, radio-frequency power 5.5kW, 50 ℃ of treatment temperatures, 5 minutes processing times.
The process gas and the selection of process parameters of above-mentioned two embodiment ionic medium body etching processing are reasonable, can well guarantee solder mask is not being produced the damage of repairing under other dysgenic situation on the solder mask.Above-mentioned process gas and selection of process parameters are a kind of preferred version of the present invention but obviously; Should be appreciated that the process gas of selecting other conventional plasma etching treatment for use and technological parameter also can realize repairing the purpose of solder mask damage; For example, the oxygen in the process gas can be by replacements such as nitrogen, argon gas, and carbon tetrafluoride gas can be by sulphur hexafluoride (SF
6), fluoroform (CHF
3) wait replacement; Handling the segmentation situation (for example can not carry out the phase I and handle, handle and directly begin second stage; Perhaps also can be, and second stage is with replacement oxygen such as argon gas at logical oxygen of phase I), technological parameters such as process gas flow, process gas pressure, radio-frequency power, treatment temperature, processing time all can select other different value.Because plasma etching is a technique known, so ability can be easy to according to the knowledge of self above-mentioned process gas, technological parameter etc. are selected in the technical staff.
The embodiment of the invention provides a kind of wiring board manufacturing approach, comprising:
Form the solder mask that solidifies on circuit base board surface;
Solder mask processing method by above-mentioned is handled said solder mask.
Because comprise above-mentioned solder mask processing method in the wiring board manufacturing approach of embodiments of the invention, so the solder mask surface damage of the wiring board of its manufacturing is few or not damage, surface quality is high, rate of finished products is high, and cost is low.
Embodiment three
The embodiment of the invention provides a kind of wiring board manufacturing approach, and as shown in Figure 2, it comprises:
S11, form solder mask on circuit base board surface; This solder mask can also can wait other known method manufacturing through spraying certainly through the known automatic or technological formation of semi-automatic silk-screen.
S12, solder mask is carried out preliminary drying; This preliminary drying temperature is at 70～80 ℃, and about 1 hour of time, preliminary drying is waited and can be made solder mask have certain intensity so that carry out subsequent treatment.
S13, solder mask is made public; The exposure sources of this available routine of making public carries out, thus the part generation polymerization that solder mask need be retained.
S14, solder mask is developed; This available sodium carbonate liquid medicine that develops carries out, thereby removes unpolymerized solder mask, exposes the resistance weldering window of operations such as being used to weld.Alternatively, but after develop accomplishing the surface quality of detection line plate, find that a lot of cuts are arranged on the solder mask this moment, inhale trace, roller seal equivalent damage.
S15, solder mask is cured; This curing temperature can be divided two sections and carry out (back one section temperature is higher) at 90～150 ℃, about 1.5～2 hours of total time, obtains the solder mask that solidifies after the curing.
S16, the solder mask that has cured is handled, repaired its surface damage with above-mentioned solder mask processing method.Alternatively, the surface quality of detection line plate finds that the damage on the solder mask disappears.
S17, alternatively proceeds character printing, heavy tin, gold-plated finger, mills known operations such as plate, heavy silver.
Obviously, the solder mask processing method of various embodiments of the present invention and wiring board manufacturing approach also can be carried out many known variations.For example, plasma etching treatment can be selected different process gases and technological parameter for use; In the process of making wiring board, the order of other step except that plasma etching treatment, concrete technology etc. all can change.In a word, no matter how concrete technology changes,, promptly belong to protection scope of the present invention as long as comprise the step of solder mask being carried out plasma etching treatment.
The above; Be merely embodiment of the present invention, but protection scope of the present invention is not limited thereto, any technical staff who is familiar with the present technique field is in the technical scope that the present invention discloses; The variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of said claim.
Claims (10)
1. a solder mask processing method is characterized in that, comprising:
Solder mask to having cured carries out plasma etching treatment.
2. solder mask processing method according to claim 1 is characterized in that, said plasma etching treatment comprises that the phase I handles and second stage is handled, wherein,
Said phase I handle in oxygen as process gas;
During said second stage is handled with the mist of oxygen and carbon tetrafluoride gas as process gas.
3. solder mask processing method according to claim 2 is characterized in that,
Oxygen flow is between 1.2SLM to 1.8SLM in the said phase I processing, and process gas pressure is between 200mTorr to 280mTorr;
Oxygen flow was between 1.2SLM to 1.8SLM during said second stage was handled, and the carbon tetrafluoride gas flow is between 0.01SLM to 0.07SLM, and process gas pressure is between 200mTorr to 280mTorr.
4. solder mask processing method according to claim 3 is characterized in that,
Oxygen flow is 1.5SLM in the said phase I processing, and process gas pressure is 240mTorr;
Oxygen flow was 1.46SLM during said second stage was handled, and the carbon tetrafluoride gas flow is 0.04SLM, and process gas pressure is 240mTorr.
5. solder mask processing method according to claim 2 is characterized in that,
The radio-frequency power that adopts in the said phase I processing is between 4.5kW to 7kW;
The radio-frequency power that adopts during said second stage is handled is between 4.5kW to 7kW.
6. solder mask processing method according to claim 5 is characterized in that,
The radio-frequency power that adopts in the said phase I processing is 5.5kW;
The radio-frequency power that adopts during said second stage is handled is 5.5kW.
7. solder mask processing method according to claim 2 is characterized in that,
Treatment temperature is between 30 degrees centigrade to 70 degrees centigrade in the said phase I processing, and the processing time is between 4 minutes to 10 minutes;
Treatment temperature was between 30 degrees centigrade to 70 degrees centigrade during said second stage was handled, and the processing time is between 2 minutes to 8 minutes.
8. solder mask processing method according to claim 7 is characterized in that,
Treatment temperature is 50 degrees centigrade in the said phase I processing, and the processing time is 7 minutes;
Treatment temperature was 50 degrees centigrade during said second stage was handled, and the processing time is 5 minutes.
9. a wiring board manufacturing approach is characterized in that, comprising:
Form the solder mask that solidifies on circuit base board surface;
By any described solder mask processing method in the aforesaid right requirement 1 to 8 said solder mask is handled.
10. wiring board manufacturing approach according to claim 9 is characterized in that, the said solder mask that forms curing on circuit base board surface comprises:
Form solder mask at said wiring board substrate surface;
Said solder mask is carried out preliminary drying;
Said solder mask is made public;
Said solder mask is developed;
Said solder mask is cured.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010593928.7A CN102573316B (en) | 2010-12-09 | 2010-12-09 | Resistance welding layer processing method and circuit board manufacturing method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010593928.7A CN102573316B (en) | 2010-12-09 | 2010-12-09 | Resistance welding layer processing method and circuit board manufacturing method |
Publications (2)
| Publication Number | Publication Date |
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| CN102573316A true CN102573316A (en) | 2012-07-11 |
| CN102573316B CN102573316B (en) | 2014-08-20 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5910341A (en) * | 1996-10-31 | 1999-06-08 | International Business Machines Corporation | Method of controlling the spread of an adhesive on a circuitized organic substrate |
| US20060094225A1 (en) * | 2004-10-28 | 2006-05-04 | Cheng-Yuan Lin | Methods for forming solder bumps on circuit boards |
| US20060226203A1 (en) * | 2005-03-31 | 2006-10-12 | Daoqiang Lu | Selective solder deposition by self-assembly of nano-sized solder paricles, and methods of assembling soldered packages |
| CN101772274A (en) * | 2009-01-04 | 2010-07-07 | 欣兴电子股份有限公司 | Method for electroplating surface of circuit substrate |
-
2010
- 2010-12-09 CN CN201010593928.7A patent/CN102573316B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5910341A (en) * | 1996-10-31 | 1999-06-08 | International Business Machines Corporation | Method of controlling the spread of an adhesive on a circuitized organic substrate |
| US20060094225A1 (en) * | 2004-10-28 | 2006-05-04 | Cheng-Yuan Lin | Methods for forming solder bumps on circuit boards |
| US20060226203A1 (en) * | 2005-03-31 | 2006-10-12 | Daoqiang Lu | Selective solder deposition by self-assembly of nano-sized solder paricles, and methods of assembling soldered packages |
| CN101772274A (en) * | 2009-01-04 | 2010-07-07 | 欣兴电子股份有限公司 | Method for electroplating surface of circuit substrate |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140820 |