CN102565653A - Wafer testing method - Google Patents

Wafer testing method Download PDF

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Publication number
CN102565653A
CN102565653A CN2010106202899A CN201010620289A CN102565653A CN 102565653 A CN102565653 A CN 102565653A CN 2010106202899 A CN2010106202899 A CN 2010106202899A CN 201010620289 A CN201010620289 A CN 201010620289A CN 102565653 A CN102565653 A CN 102565653A
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test
wafer
testing
test procedure
procedure
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CN102565653B (en
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张宇飞
陈宏领
周第延
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
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Abstract

The invention provides a wafer testing method which comprises the steps of: firstly, testing one part of crystal grains on a wafer to be tested in parallel, carrying out statistic analysis on a testing result by applying a script program so that the total yield of the wafer to be tested is judged; if the yield is better, properly reducing the testing requirement, i.e. testing residual crystal grains which are not tested by adopting a testing program for simplifying testing contents according to a product so that testing time is saved; and if the yield is poorer, keeping the original testing requirement even increasing the testing requirement, i.e. testing the residual crystal grains which are not tested by adopting the original testing program or a testing program which is stricter than the original testing program so that the accuracy of testing is ensured, wherein the testing programs are replaced automatically by depending on the script program. By adopting the wafer testing method provided by the invention, the accuracy of the testing result of the wafer can be ensured, and the testing time can be effectively saved, thus the testing cost is saved.

Description

A kind of crystal round test approach
Technical field
The present invention relates to the semiconductor test technical field, particularly a kind of crystal round test approach.
Background technology
The manufacture process of semiconductor subassembly can be divided into silicon wafer process, wafer sort, encapsulation and last test haply, and silicon wafer process is on Silicon Wafer, to make electric circuitry packages; After completing, become crystal grain (die) one by one on the wafer, then the wafer sort step is made testing electrical property to crystal grain; Underproof crystal grain is eliminated; And wafer cut into several crystal grain, and encapsulation be with qualified crystal grain through the step of packing with routing, make crystal grain become integrated circuit (Integrated Circuit; IC), to guarantee the quality of integrated circuit at last again through testing electrical property.
Please referring to Fig. 1, Fig. 1 is the wafer parallel test method synoptic diagram of prior art.As shown in Figure 1, in the crystal round test approach of prior art, when wafer to be measured was carried out concurrent testing, the identical crystal grain of shade in the each hookup 1 of the probe on the probe was written into corresponding testing program through test machine and tests.The test procedure that test machine is moved when testing the full wafer wafer at every turn is identical.No matter therefore the yield of wafer to be tested how, each crystal grain on the wafer is accomplished test successively all needs the identical time.Therefore the method for testing of prior art can not be adjusted Test Strategy according to the yield situation of wafer, thereby needs a large amount of test duration of cost.
Summary of the invention
The technical matters that the present invention will solve provides a kind of crystal round test approach, can not adjust Test Strategy according to the yield situation of wafer with the method for testing that solves prior art, thereby needs the cost problem of a large amount of test durations.
For solving the problems of the technologies described above, the present invention provides a kind of crystal round test approach, may further comprise the steps:
Step 1 provides a wafer to be measured, and said first test procedure of operation carries out the parallel probe test first time to said wafer to be measured on test machine; Part crystal grain on the said wafer to be measured of the said parallel probe test test first time; Said first test procedure is normal test procedure, comprises required test event and content measurement usually;
Step 2; Operation one shell script carries out statistical study to the result of the said parallel probe test first time on test machine; And analysis result is set certain criterion through said shell script; Said shell script judges to said analysis result that according to said criterion if said analysis result meets said criterion, then said shell script calls second test procedure and carries out step 4; If said analysis result does not meet said criterion, then said shell script calls the 3rd test procedure and carries out step 5;
Step 4, said test machine are moved second test procedure residue crystal grain are tested, the test procedure of said second test procedure for more simplifying than said first test procedure; Repeated execution of steps four, the crystal grain on said wafer to be measured all carried out test;
Step 5, said test machine moves the 3rd test procedure said test result is tested, and said the 3rd test procedure is with the identical program of said first test procedure or than the more strict test procedure of said first test procedure; Repeated execution of steps five, the crystal grain on said wafer to be measured all advanced test.
Optional, also comprise: step 6, test the full wafer wafer after, said shell script is written into said first test procedure again and prepares for next wafer test.
Crystal round test approach of the present invention at first through the first time probe test a part of crystal grain on the wafer to be measured is tested; And test result is carried out analysis and judgement through shell script, through the test analysis of wafer to be measured top crystal grain is judged the yield situation that this wafer to be measured is overall.If yield is better, then can suitably loosen test request, promptly residue is tested without the loose test procedure of crystal grain employing of test, so that save the test duration; If yield is relatively poor, then keep original test request even improve test request, promptly adopt original test procedure or more strict test procedure to test without the crystal grain of testing, to guarantee accuracy of test to residue.Adopt crystal round test approach of the present invention not only can guarantee the wafer sort analytical accuracy, can effectively save the test duration simultaneously, thereby practice thrift testing cost.
Description of drawings
Fig. 1 is the wafer parallel test method synoptic diagram of prior art;
Fig. 2 is a crystal round test approach first step method synoptic diagram of the present invention.
Embodiment
For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, below specific embodiments of the invention do detailed explanation.
Crystal round test approach of the present invention multiple substitute mode capable of using realizes; Be to explain below through preferred embodiment; Certainly the present invention is not limited to this specific embodiment, and the general replacement that the one of ordinary skilled in the art knew is encompassed in protection scope of the present invention undoubtedly.
Please referring to Fig. 2, Fig. 2 is a crystal round test approach first step method synoptic diagram of the present invention.As shown in Figure 2, crystal round test approach of the present invention has been done further improvement based on existing wafer parallel test method, may further comprise the steps:
Step 1; One wafer to be measured is provided; Said first test procedure of operation carries out the parallel probe test first time to said wafer to be measured on test machine, and the part crystal grain on the said wafer to be measured is tested in the said parallel probe test first time, divides the crystal grain of representative like black part among Fig. 1; Said first test procedure is normal test procedure, comprises required test event and content measurement usually;
Step 2; Operation one shell script carries out statistical study to the result of the said parallel probe test first time on test machine; And analysis result is set certain criterion through said shell script; Said shell script judges to said analysis result that according to said criterion if said analysis result meets said criterion, then said shell script calls second test procedure and carries out step 4; If said analysis result does not meet said criterion, then said shell script calls the 3rd test procedure and carries out step 5;
Step 4; Said test machine moves second test procedure residue crystal grain is tested; The test procedure of said second test procedure for more simplifying than said first test procedure; For example reduce certain test event compared to said first test procedure, or for example test the flash product the part storage area but not all; Repeated execution of steps four, the crystal grain on said wafer to be measured all carried out test;
Step 5; Said test machine moves the 3rd test procedure said test result is tested; Said the 3rd test procedure can be for the identical program of said first test procedure; Also can for example increase more test event for than the more strict test procedure of said first test procedure compared to said first test procedure; Repeated execution of steps five, the crystal grain on said wafer to be measured all advanced test.
Step 6, test the full wafer wafer after, said shell script is written into said first test procedure again and prepares for the test of next wafer.
Crystal round test approach of the present invention at first through the first time probe test a part of crystal grain on the wafer to be measured is tested and test result is carried out analysis and judgement, through the test analysis of wafer to be measured top crystal grain is judged the yield situation that this wafer to be measured is overall.If yield is better, then can suitably loosen test request, when promptly residue being tested without the loose test procedure of crystal grain employing of test, so that save the test duration; If yield is relatively poor, then keep original test request even improve test request, promptly adopt original test procedure or more strict test procedure to test without the crystal grain of testing, to guarantee accuracy of test to residue.Adopt crystal round test approach of the present invention not only can guarantee the wafer sort analytical accuracy, can effectively save the test duration simultaneously, thereby practice thrift testing cost.
Please, adopt the method for testing of prior art and the inventive method to test the final needed test duration of back than right respectively to about 500 wafer in the table 1 referring to following table 1.Can find out that through table 1 the inventive method is more saved time compared to art methods, practice thrift cost.
Figure BSA00000406882000041
Table 1
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, belong within the scope of claim of the present invention and equivalent technologies thereof if of the present invention these are revised with modification, then the present invention also is intended to comprise these changes and modification interior.

Claims (2)

1. crystal round test approach may further comprise the steps:
Step 1 provides a wafer to be measured, and said first test procedure of operation carries out the parallel probe test first time to said wafer to be measured on test machine; Part crystal grain on the said wafer to be measured of the said parallel probe test test first time; Said first test procedure is normal test procedure, comprises required test event and content measurement usually;
Step 2; Operation one shell script carries out statistical study to the result of the said parallel probe test first time on test machine; And analysis result is set certain criterion through said shell script; Said shell script judges to said analysis result that according to said criterion if said analysis result meets said criterion, then said shell script calls second test procedure and carries out step 4; If said analysis result does not meet said criterion, then said shell script calls the 3rd test procedure and carries out step 5;
Step 4, said test machine are moved second test procedure residue crystal grain are tested, the test procedure of said second test procedure for more simplifying than said first test procedure; Repeated execution of steps four, the crystal grain on said wafer to be measured all carried out test;
Step 5, said test machine moves the 3rd test procedure said test result is tested, and said the 3rd test procedure is with the identical program of said first test procedure or than the more strict test procedure of said first test procedure; Repeated execution of steps five, the crystal grain on said wafer to be measured all advanced test.
2. crystal round test approach as claimed in claim 1 is characterized in that, also comprises: step 6, test the full wafer wafer after, said shell script is written into said first test procedure again and prepares for the test of next wafer.
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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104778525A (en) * 2014-01-15 2015-07-15 讯利电业股份有限公司 Quality control method by using test data
CN107462821A (en) * 2016-06-02 2017-12-12 南茂科技股份有限公司 Remote monitoring method and system for wafer test machine
CN107544010A (en) * 2016-06-28 2018-01-05 中芯国际集成电路制造(上海)有限公司 Test equipment and method of testing
CN109741779A (en) * 2018-12-29 2019-05-10 西安紫光国芯半导体有限公司 A kind of On-Wafer Measurement method that dynamic adjusts test condition in the process
CN109860069A (en) * 2019-01-31 2019-06-07 上海华虹宏力半导体制造有限公司 The test method of wafer
CN110160918A (en) * 2018-02-12 2019-08-23 黄彦凯 The method that wafer is tested again
CN111257715A (en) * 2020-02-19 2020-06-09 上海韦尔半导体股份有限公司 Wafer testing method and device
CN113488401A (en) * 2021-06-30 2021-10-08 海光信息技术股份有限公司 Chip testing method and device
CN114443474A (en) * 2021-12-30 2022-05-06 杭州广立微电子股份有限公司 Automatic testing method for WAT testing software
CN116666248A (en) * 2023-07-26 2023-08-29 北京象帝先计算技术有限公司 Test result abnormality determination method, device, electronic equipment and readable storage medium

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CN101359015A (en) * 2007-07-30 2009-02-04 中芯国际集成电路制造(上海)有限公司 Method and apparatus for detecting semi-conductor device
CN101561474A (en) * 2008-04-14 2009-10-21 京元电子股份有限公司 Testing method with dynamically changed test procedure

Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
CN101359015A (en) * 2007-07-30 2009-02-04 中芯国际集成电路制造(上海)有限公司 Method and apparatus for detecting semi-conductor device
CN101561474A (en) * 2008-04-14 2009-10-21 京元电子股份有限公司 Testing method with dynamically changed test procedure

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104778525A (en) * 2014-01-15 2015-07-15 讯利电业股份有限公司 Quality control method by using test data
CN107462821A (en) * 2016-06-02 2017-12-12 南茂科技股份有限公司 Remote monitoring method and system for wafer test machine
CN107462821B (en) * 2016-06-02 2019-11-26 南茂科技股份有限公司 Remote monitoring method and system for wafer test machine
CN107544010A (en) * 2016-06-28 2018-01-05 中芯国际集成电路制造(上海)有限公司 Test equipment and method of testing
CN110160918A (en) * 2018-02-12 2019-08-23 黄彦凯 The method that wafer is tested again
CN109741779A (en) * 2018-12-29 2019-05-10 西安紫光国芯半导体有限公司 A kind of On-Wafer Measurement method that dynamic adjusts test condition in the process
CN109860069A (en) * 2019-01-31 2019-06-07 上海华虹宏力半导体制造有限公司 The test method of wafer
CN109860069B (en) * 2019-01-31 2022-03-08 上海华虹宏力半导体制造有限公司 Wafer testing method
CN111257715A (en) * 2020-02-19 2020-06-09 上海韦尔半导体股份有限公司 Wafer testing method and device
CN113488401A (en) * 2021-06-30 2021-10-08 海光信息技术股份有限公司 Chip testing method and device
CN113488401B (en) * 2021-06-30 2022-10-14 海光信息技术股份有限公司 Chip testing method and device
CN114443474A (en) * 2021-12-30 2022-05-06 杭州广立微电子股份有限公司 Automatic testing method for WAT testing software
CN116666248A (en) * 2023-07-26 2023-08-29 北京象帝先计算技术有限公司 Test result abnormality determination method, device, electronic equipment and readable storage medium
CN116666248B (en) * 2023-07-26 2023-11-17 北京象帝先计算技术有限公司 Test result abnormality determination method, device, electronic equipment and readable storage medium

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