CN102548211B - Printed circuit board with built-in capacitor and manufacturing method thereof - Google Patents
Printed circuit board with built-in capacitor and manufacturing method thereof Download PDFInfo
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- CN102548211B CN102548211B CN201210000931.2A CN201210000931A CN102548211B CN 102548211 B CN102548211 B CN 102548211B CN 201210000931 A CN201210000931 A CN 201210000931A CN 102548211 B CN102548211 B CN 102548211B
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Abstract
The invention discloses a printed circuit board with a built-in capacitor. The printed circuit board with the built-in capacitor comprises a plurality of circuit layers, and a plurality of insulating layers which are positioned between the circuit layers respectively, wherein each insulating layer comprises a first substrate layer and a second substrate layer; the capacitor is arranged inside the second substrate layer and is positioned on the upper surface of the first substrate layer; and the printed circuit board with the built-in capacitor is characterized in that: two electrodes of the capacitor are two comb tooth-shaped capacitor electrode sheets in staggered arrangement; micro through holes penetrating through the second substrate layer are formed on the upper surfaces of the two capacitor electrode sheets; and connecting ends of the micro through holes are second arranged on the surface of the substrate layer and are connected with the circuit layers. The printed circuit board with the built-in capacitor has the advantages that: the encapsulating volume is reduced; the electrical performance is improved; the capacitance of the built-in capacitor in the printed circuit board is increased; in a manufacturing method for the printed circuit board with the built-in capacitor, the curing temperature is relatively low; by the manufacturing method, the production efficiency can be improved and the cost is reduced; the adopted substrate material is wide in source, low in price, and relatively low in curing temperature; and requirements on equipment and technology are greatly lowered.
Description
Technical field
The present invention relates to printed circuit board (PCB) (PCB) and manufacture method thereof, especially a kind of Printed circuit board and manufacturing methods of embedded set capacitor.
Background technology
Along with the development of electronic product, current surface installation technique (SMT) is widely used in microelectronics assewbly and encapsulation, generally speaking, in a typical SMT technique, passive component occupies about whole PCB substrate 40% and above area, constrains the development of electronic product to miniaturized, multi-functional, low cost, high-performance direction.According to international semiconductor route map (ITRS), substrate embedded set passive device technology (EPT), as a kind of advanced form of system in package (SIP), has clear superiority compared to the surface installation technique (SMT) of passive device.
Embedded set passive device is as a kind of advanced form of microelectronics surface-assembled (SMT), because the development of technology and some circuit design are to the requirement of embedding passive device, embed-type PCB thinner under requiring less embedding volume and specific condition, higher electrical property; Also require that passive device comprises resistance and electric capacity simultaneously, need higher resistance value and the capacitance of Geng Gao respectively.
Publication number be CN1468448 " there is Electronic Packaging and the manufacture method thereof of embedded capacitors " patent in disclose one embedded capacitor technology on a silicon substrate, wherein silicon substrate requires higher to technique curing temperature, limits the enforcement of embedding technique and the reduction of cost; Publication number is disclose one " Printed circuit board and manufacturing methods of embedded capacitors " in the patent of CN101170869, the embedding electric capacity bottom crown of the method is directly connected with Copper Foil or circuit layer, but the increase of its capacitance of its process technology limit; Publication number is disclose a kind of laminated body, capacitor increasing the effective corresponding area of electric capacity during CN1738513 " comprises the Printed circuit board and manufacturing methods of embedded capacitor " to increase the embedded capacitor level manufacture method of capacitance, and the laminating technology step that the method requires is more.
Summary of the invention
The object of the invention is for the deficiencies in the prior art, cater to miniaturization of electronic products, multi-functional, low cost, high performance mainstream development direction, and a kind of Printed circuit board and manufacturing methods with the embedded set capacitor of high-capacitance is provided.
The object of the invention is to be realized by following technical scheme:
A kind of printed circuit board (PCB) of embedded set capacitor, comprise capacitor, multiple circuit layer, and multiple insulating barrier be separately positioned between each circuit layer, described insulating barrier comprises first substrate layer and second substrate layer, capacitor to be arranged in second substrate layer and to be positioned at the upper surface place of first substrate layer, unlike the prior art: two very two staggered electric capacity pole pieces of comb teeth-shaped of capacitor, the upper surface of two electric capacity pole pieces is provided with the micro through hole through second substrate layer, the surface that the link of micro through hole is arranged on second substrate layer is connected with circuit layer.
Described first substrate layer is FR-4 epoxy resin.
Described second substrate layer is FR-4 epoxy resin or polyimides.
Manufacture the method for the printed circuit board (PCB) of above-mentioned embedded set capacitor, comprise
A () provides insulating barrier first substrate layer, on first substrate layer, spin-on-dielectric material, slightly solidify to form dielectric layer;
B () be rotary coating photoresist on the dielectric layer, slightly solidify;
C () photoresist exposes, define two comb teeth shape electric capacity pole piece figures, then etch dielectric material, forms the comb teeth shape electric capacity pole piece groove of the interlaced arrangement of two panels;
D () removes the photoresist of dielectric layer surface;
E (), in the groove of two comb teeth shape electric capacity pole pieces and dielectric layer surface electro-coppering, forms Seed Layer;
The Seed Layer that f whole electro-copperings that () removes dielectric layer upper surface are formed, forms the comb teeth shape electric capacity pole piece of the interlaced arrangement of two panels;
(g) dielectric layer surface rotary coating photoresist;
H () photoresist exposes, remove the outer unnecessary dielectric material of two electric capacity pole piece profiles;
(i) remove the photoresist after exposure, obtain the comb teeth shape capacitor of the interlaced arrangement of two panels on first substrate layer surface;
J () (carry out surface treatment to the comb teeth shape electric capacity produced, to increase component surface adhesion, then) rotary coating insulating material on the surface of capacitor and first substrate layer, forms second substrate layer;
K (), at the upper surface rotary coating photoresist of second substrate layer, slightly solidifies;
L () photoresist exposes, etching second substrate layer, forms micropore;
M () removes the photoresist of second substrate layer upper surface;
N () be electro-coppering on micro-pore wall, form micro through hole, forms Seed Layer at the upper surface of second substrate layer simultaneously;
O () is at the upper surface rotary coating photoresist of Seed Layer;
P () photoresist exposes, etch the Seed Layer copper facing of removing second substrate layer surface electrical copper facing formation, form micro through hole link;
Q () removes photoresist, form the insulating barrier with the embedded set electric capacity of micro through hole.
Curing temperature is 60-80 DEG C.
After insulating barrier of the present invention completes, lamination Copper Foil makes circuitous pattern on the insulating layer, namely circuit layer is made, embedded set capacitor in insulating barrier by micro through hole and circuit layer interconnected, repeat above step, between layers interconnected is connected by via, finally produces the printed circuit board (PCB) of embedded set capacitor.
The present invention has the following advantages:
1. reduce encapsulation volume, apparent surface's packaging technology, Electronic Packaging volume can be reduced, save material, make electronic product more miniaturized;
2. improve electric property, apparent surface's packaging technology, can improve Electronic Packaging aspect electric property, and mainly its volume reduces to cause its electrical interconnection circuit shorter, and integrated level is higher;
3. increase the capacitance of embedded set capacitor in printed circuit board (PCB), effectively can improve the device property capacity of capacitor;
4. present invention process making printed circuit board (PCB) curing temperature is lower, effectively can enhance productivity, reduce costs.The first substrate that the present invention is used and second substrate material source extensively, low price, curing temperature is lower, greatly reduces the requirement of equipment and process technology.
Accompanying drawing explanation
Fig. 1 is the cross-sectional view of embodiment insulating barrier;
Fig. 2 is A-A line of vision structural representation in Fig. 1;
Fig. 3 a-Fig. 3 q is sectional view, that schematically shows the method that the embodiment of the present invention manufactures embedded set capacitor printed circuit board.
Embodiment
Below in conjunction with embodiment and accompanying drawing, content of the present invention is described in further detail, but is not limitation of the invention.
Embodiment:
With reference to Fig. 1 Fig. 2, a kind of printed circuit board (PCB) of embedded set capacitor, comprise capacitor, multiple circuit layer and multiple insulating barrier be separately positioned between each circuit layer, insulating barrier comprises first substrate layer 1 and second substrate layer 3, capacitor 2 to be arranged in second substrate layer 3 and to be positioned at the upper surface place of first substrate layer 1, two very two staggered electric capacity pole pieces 4 of comb teeth-shaped of capacitor 2, the upper surface of two electric capacity pole pieces 4 is provided with the micro through hole 5 through second substrate layer 3, and the surface that the link of micro through hole 5 is arranged on second substrate layer 3 is connected with circuit layer.
The two poles of the earth of capacitor 2 are set to two staggered electric capacity pole pieces 4 of comb teeth-shaped, the effective corresponding area of positive and negative electrode pole piece can be increased relative to traditional both positive and negative polarity parallel-plate structure, due to the inherent characteristic of capacitance, capacitance is directly proportional with the effective corresponding area of electric capacity positive/negative plate, therefore two mutual staggered comb teeth shape electric capacity pole pieces of the utility model design effectively can improve capacitance, thus meet the demand of circuit to embedded capacitor high capacitance capacity.In addition, the comb teeth shape electric capacity pole piece 4 produced all is arranged on same layer, and only need copper facing deposition, less relative to the capacitor manufacturing process step of existing manufacture embedded set high power capacity, cost is lower.
First substrate layer 1 is FR-4 epoxy resin.
Second substrate layer 3 is FR-4 epoxy resin or polyimides.
First substrate layer 1 adopts FR-4 epoxy resin, second substrate layer 3 adopts FR-4 epoxy resin or polyimide foam insulation, effectively can lower the curing temperature of whole technological requirement, enhance productivity, the low price of its material own, effectively can reduce production cost.
As shown in Fig. 3 a-Fig. 3 q, a kind of method manufacturing the printed circuit board (PCB) of above-mentioned embedded set capacitor, comprises
A () provides insulating barrier first substrate layer 301, spin-on-dielectric material on first substrate layer 301, slightly solidify to form dielectric layer 302, as shown in Figure 3 a, dielectric material is solidificated on first substrate layer 301, thus makes dielectric layer 302;
B () be rotary coating photoresist 306 on dielectric layer 302, slightly solidify, and as shown in Figure 3 b, prepares for making electric capacity pole piece;
C () photoresist 306 exposes, define two comb teeth shape electric capacity pole piece figures, then etch dielectric material, form the comb teeth shape electric capacity pole piece groove of the interlaced arrangement of two panels, as shown in Figure 3 c, photoetching, after 306 exposures, according to the size of capacitance, design and define two comb teeth shape electric capacity pole piece figures, etch the profile groove of two panels comb teeth shape electric capacity pole piece on the dielectric layer, and the connection micro through hole district arranged there is wide region, preparing for making electric capacity pole piece;
D () removes the photoresist on dielectric layer 302 surface, as shown in Figure 3 d, produce electric capacity pole piece groove;
E (), in the groove of two comb teeth shape electric capacity pole pieces and the copper facing of dielectric layer 302 surface electrical, forms Seed Layer 304, as shown in Figure 3 e, in the electric capacity pole piece groove formed in above step, copper facing is filled, and copper facing also forms Seed Layer 304 at dielectric layer 302 upper surface;
F () removes the Seed Layer of dielectric layer 302 upper surface, form the comb teeth shape electric capacity pole piece of the interlaced arrangement of two panels, as illustrated in figure 3f, removes the Seed Layer of dielectric layer 302 upper surface, produce two comb teeth-shaped electric capacity pole pieces with mechanical lapping, corrosion or additive method;
G the surperficial rotary coating photoresist 306 of () dielectric layer 302, as shown in figure 3g, prepares for removing unnecessary dielectric material;
H () photoresist 306 exposes, remove the outer unnecessary dielectric material of two electric capacity pole piece profiles, as illustrated in figure 3h, and two comb teeth shape capacitance pole chip architectures below reservation photoresist 306 and the dielectric substance figure sandwiched between two pole pieces;
(i) remove the photoresist after exposure, obtain the comb teeth shape capacitor of the interlaced arrangement of two panels on first substrate layer 301 surface, as shown in figure 3i, after removing photoresist, complete the making of comb teeth shape capacitor;
J () be rotary coating insulating material on the surface of capacitor and first substrate layer 301, form second substrate layer 303, as shown in Fig. 3 j;
K (), at the upper surface rotary coating photoresist 306 of second substrate layer 303, slightly solidifies, as shown in figure 3k;
L () photoresist 306 exposes, etching second substrate layer 303, form micropore, as shown in Fig. 3 l, after photoresist 306 exposes, etching second substrate layer 303 insulating material, etch micropore, micropore is shaped, prepare electro-coppering on micropore, prepare micro through hole, thus to realize the circuit interconnects outside embedded capacitors and insulating barrier;
M () removes the photoresist of second substrate layer 303 upper surface, as shown in figure 3m, directly exposure or additive method remove the photoresist on second substrate layer 303 insulating material surface;
N () be electro-coppering on micro-pore wall, form micro through hole, form Seed Layer 305 on second substrate layer 303 surface simultaneously, as shown in figure 3n, there is second substrate layer 303 hole wall and the copper facing of second substrate layer 303 insulating material surface electrical of micropore after removing photoresist, formed plating micro through hole and second substrate layer 303 surface on Seed Layer 305;
(o) at the upper surface rotary coating photoresist 306 of Seed Layer 305, as shown in Fig. 3 o;
P () photoresist 306 exposes, etch the Seed Layer copper facing of removing second substrate layer 303 surface electrical copper facing formation, form micro through hole link, as shown in Fig. 3 p, the electro-coppering that removing Seed Layer is unnecessary, retains the Seed Layer of micro through hole upper end, forms micro through hole link;
Q () removes photoresist, form the insulating barrier with the embedded set electric capacity of micro through hole, as shown in Fig. 3 q, completes embedded set comb teeth shape electric capacity and makes.
Curing temperature in above-mentioned steps is 60-80 DEG C, and manufacture capacitive method relative to conventional high-temperature, the complexity of present invention process manufacture to process equipment and manufacture technics reduces greatly, can effectively enhance productivity, and reduces production cost.
First surface treatment is carried out to first substrate layer 301 before the step (a); (i) and between step (j) surface treatment is carried out to the surface of capacitor in step, to improve inter-layer bonding force.
After photoresist exposure, the insulating barrier of embedded set resistance completes, after insulating barrier completes, lamination Copper Foil makes circuitous pattern on the insulating layer, namely circuit layer is made, embedded set capacitor in insulating barrier by micro through hole and circuit layer interconnected, repeat above step, between layers interconnected is connected by via, finally produces the printed circuit board (PCB) of embedded set capacitor.
Claims (1)
1. a manufacture method for the printed circuit board (PCB) of embedded set capacitor, is characterized in that: comprise
A () provides insulating barrier first substrate layer, on first substrate layer, spin-on-dielectric material, slightly solidify to form dielectric layer;
B () be rotary coating photoresist on the dielectric layer, slightly solidify;
C () photoresist exposes, define two comb teeth shape electric capacity pole piece figures, then etch dielectric material, forms the comb teeth shape electric capacity pole piece groove of the interlaced arrangement of two panels;
D () removes the photoresist of dielectric layer surface;
E (), in the groove of two comb teeth shape electric capacity pole pieces and dielectric layer surface electro-coppering, forms Seed Layer;
The Seed Layer that f whole electro-copperings that () removes dielectric layer upper surface are formed, forms the comb teeth shape electric capacity pole piece of the interlaced arrangement of two panels;
(g) dielectric layer surface rotary coating photoresist;
H () photoresist exposes, remove the outer unnecessary dielectric material of two electric capacity pole piece profiles;
(i) remove the photoresist after exposure, obtain the comb teeth shape capacitor of the interlaced arrangement of two panels on first substrate layer surface;
J () be rotary coating insulating material on the surface of capacitor and first substrate layer, form second substrate layer;
K (), at the upper surface rotary coating photoresist of second substrate layer, slightly solidifies;
L () photoresist exposes, etching second substrate layer, forms micropore;
M () removes the photoresist of second substrate layer upper surface;
N () be electro-coppering on micro-pore wall, form micro through hole, forms Seed Layer at the upper surface of second substrate layer simultaneously;
O () is at the upper surface rotary coating photoresist of Seed Layer;
P () photoresist exposes, etch the Seed Layer copper facing of removing second substrate layer surface electrical copper facing formation, form micro through hole link;
Q () removes photoresist, form the insulating barrier with the embedded set electric capacity of micro through hole;
The curing temperature of slight solidification is 60-80 DEG C; Wherein micro through hole realizes the circuit interconnects outside embedded set capacitor and insulating barrier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210000931.2A CN102548211B (en) | 2012-01-04 | 2012-01-04 | Printed circuit board with built-in capacitor and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210000931.2A CN102548211B (en) | 2012-01-04 | 2012-01-04 | Printed circuit board with built-in capacitor and manufacturing method thereof |
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| Publication Number | Publication Date |
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| CN102548211A CN102548211A (en) | 2012-07-04 |
| CN102548211B true CN102548211B (en) | 2015-03-11 |
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| CN201210000931.2A Expired - Fee Related CN102548211B (en) | 2012-01-04 | 2012-01-04 | Printed circuit board with built-in capacitor and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114585157A (en) * | 2020-12-01 | 2022-06-03 | 深南电路股份有限公司 | Capacitor-embedded circuit board and manufacturing method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1253465A (en) * | 1998-11-10 | 2000-05-17 | 华通电脑股份有限公司 | Built-in fingered flat capacitor and resistor and making method thereof |
| EP1517596A2 (en) * | 2003-09-18 | 2005-03-23 | E.I. du Pont de Nemours and Company | High tollerance embedded capacitors |
| CN101534610A (en) * | 2008-03-12 | 2009-09-16 | 欣兴电子股份有限公司 | Built-in capacitor element circuit board and manufacture method thereof |
| CN202406391U (en) * | 2012-01-04 | 2012-08-29 | 桂林电子科技大学 | Printed circuit board with built-in capacitor |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4912992B2 (en) * | 2007-09-12 | 2012-04-11 | 新光電気工業株式会社 | Capacitor-embedded substrate and manufacturing method thereof |
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2012
- 2012-01-04 CN CN201210000931.2A patent/CN102548211B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1253465A (en) * | 1998-11-10 | 2000-05-17 | 华通电脑股份有限公司 | Built-in fingered flat capacitor and resistor and making method thereof |
| EP1517596A2 (en) * | 2003-09-18 | 2005-03-23 | E.I. du Pont de Nemours and Company | High tollerance embedded capacitors |
| CN101534610A (en) * | 2008-03-12 | 2009-09-16 | 欣兴电子股份有限公司 | Built-in capacitor element circuit board and manufacture method thereof |
| CN202406391U (en) * | 2012-01-04 | 2012-08-29 | 桂林电子科技大学 | Printed circuit board with built-in capacitor |
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| CN102548211A (en) | 2012-07-04 |
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