CN102510286B - Frequency conversion sampling method - Google Patents
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- CN102510286B CN102510286B CN201110342434.6A CN201110342434A CN102510286B CN 102510286 B CN102510286 B CN 102510286B CN 201110342434 A CN201110342434 A CN 201110342434A CN 102510286 B CN102510286 B CN 102510286B
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Abstract
The invention discloses a frequency conversion sampling method and belongs to the technical field of electronic test and signal acquisition. The method comprises the following steps of: in a test process, performing point extraction sampling on an analog signal at equal intervals by using a selected frequency f0; performing analog/digital (A/D) conversion to obtain a digital signal, and reading, writing and storing the digital into a first memory; and during reading, writing and storing of the digital signal, dividing the test process into 1, 2, ..., and n sub-processes according to the frequency characteristic change of the sampled signal, performing point extraction sampling on data which are read, written and stored in the first memory by using changed frequencies f1, f2, ..., and fi of the promotion address of the memory according to each sub-process, and storing the data into a second memory to obtain frequency conversion sampling data between the n sub-processes of the test process to realize frequency conversion sampling, wherein n is not less than i. The frequency conversion sampling method has the advantages that: the defects of the conventional frequency conversion sampling method are overcome; the frequency conversion sampling data can be completely recovered; a whole set of electronic circuit device is designed and researched; by adoption of the device, the frequency conversion sampling method can be implemented; and the frequency conversion sampling method can be applied and popularized.
Description
One. technical field
Frequency conversion sampling method disclosed by the invention belongs to Electronic Testing and Signal Collection Technology field, and what be specifically related to is that a kind of changing features according to measured signal changes the method that address frequency realizes frequency-change sampling that pushes away.
Two. background technology
Sample frequency determines quality and the quantity of sampled signal.Sample frequency is too high, can make to adopt number of signals increase severely, take a large amount of memory cell; Sample frequency is too low, can make some information dropout of analog signal, if like this signal after sampling is reverted to original signal, there will be distortion phenomenon.Therefore in order to reach optimum efficiency, must, according to the feature of signal, select suitable sample frequency.
According to nyquist sampling theorem, for band-limited measured signal, when sample frequency is the twice of measured signal highest frequency, can guarantee information not lose.Yet complicated measured signal variation is varied in actual applications, sometimes changes soon, sometimes changes slow.Therefore, only by the maximum cut-off frequency of signal, determine sample frequency, gather a certain physical process not necessarily optimum, particularly, for specific (special) requirements such as low-power consumption, the microbody of adverse circumstances storage dynamic test are long-pending, it be unpractical needing very large memory space.Meanwhile, cannot adopt in some cases single sample frequency to gather and record measured signal.So adopting the method for sampling of frequency-change sampling is good selection.
At present, the method that generally adopts frequency-change sampling for the complex situations of adverse circumstances storage dynamic test, is divided into n stage according to the variation speed feature of signal by a certain test process, and n triggering signal is set, when the first stage, triggering signal was effective, with frequency f
1sample; When second stage triggering signal is effective, with frequency f
2sample ... when the n stage, triggering signal was effective, with frequency f
nsample.For the different phase of same test process, according to the difference of triggering signal, change sample frequency, become the interval time of sampling, reach optimum sampled result.Total principle is that the fast-changing HFS of signal adopts high sample frequency, and the low frequency part that signal slowly changes, adopts low sample frequency.
The above-mentioned frequency conversion sampling method that changes sample frequency according to signal characteristic has its limitation, and 1. it is to adopt the changing distance time to take out point sampling to analog signal, is in essence in signal source, to carry out the point sampling of taking out of signal, and to recover be completely impossible to data like this.2. when changing the triggering signal of sample frequency when effective, while changing sample frequency, A/D conversion needs settling time, and this flashy A/D conversion is unstable, and even mistake may appear in sampled data.Frequency conversion sampling method of the present invention provides a kind of good method, and it has overcome the deficiency of current frequency conversion sampling method, can guarantee the integrality that frequency-change sampling data are recovered.
Three. summary of the invention
The object of the invention is: to society, provide this frequency conversion sampling method, this technical scheme has overcome the deficiency of current frequency conversion sampling method, can guarantee that frequency-change sampling data are able to complete recovery.
Technical scheme of the present invention is such: this frequency conversion sampling method, technical characterstic is: this frequency conversion sampling method is according to the changing features that is sampled signal, to select to change memory to push away address frequency, realize the method for frequency-change sampling, this frequency conversion sampling method is in a test process, analog signal is uniformly-spaced taken out to point sampling, through A/D, being converted to digital signal read-write is stored in first memory or register storage, in read-write storage, according to the changing features that is sampled signal, be divided into several subprocess and adopt change memory to push away address frequency by each subprocess, to reading, write and be stored in first memory or register storage data and take out point sampling and be stored in again in second memory, obtain the frequency-change sampling data between several subprocess of a test process, realize frequency-change sampling, wherein several subprocess are chosen as 1, 2, n subprocess.The described changing features that is sampled signal refers to that the frequecy characteristic that is sampled signal changes.Can be sampled signal by one like this changes to be divided into several subprocess and to adopt corresponding different memory to push away address frequency by the frequency of each subprocess by frequecy characteristic and samples, realize the frequency-change sampling to a complex process.This frequency conversion sampling method is in a test process, with sample frequency f
0analog signal is uniformly-spaced taken out to point sampling, through A/D, be converted to digital signal read-write and be stored in first memory or register storage, in read-write storage according to a test process that is sampled the changing features of signal be divided into 1,2 ..., a n subprocess adopt and change memory and push away address frequency f by each subprocess
1, f
2..., f
iread-write is stored in first memory or register storage to data and takes out point sampling and be stored in again in second memory, obtain the frequency-change sampling data between n subprocess of a test process, realize frequency-change sampling, wherein n>=i.A described complicated change procedure that is sampled signal is divided into n subprocess and adopts corresponding different memory to push away address frequency sampling by each subprocess, corresponding different sample frequency may be i, if n=i illustrates that the sample frequency of each subprocess is different, if the sample frequency of the subprocess that n > i explanation has is the same.If described complicated test process of a test process, this test process is changed to speed according to signal characteristic and be divided into several subprocess, each subprocess is that the different address frequency that push away are taken out point sampling and are stored in second memory several subprocess storage data corresponding in first memory or register storage according to different sample frequencys, between several subprocess of a test process, realizes frequency-change sampling.Select proportion comparison module, to the frequency-change sampling frequency ratio of several subprocess, when i-1 subprocess sample frequency is fast, i subprocess sample frequency is when slow, by frequency ratio compared with module controls, startup counter delay a period of time changes second memory i subprocess again and pushes away address frequency, guarantees that frequency-change sampling data regain one's integrity.Described when i-1 subprocess sample frequency is fast, i subprocess sample frequency is when slow, because signal successively has sampling, writes, stores three processes, so by frequency ratio compared with module controls, it is necessary that startup counter delay change second memory i subprocess pushes away address frequency, to guarantee that i subprocess sampled data regains one's integrity and whole frequency-change sampling data regain one's integrity.
According to above-described frequency conversion sampling method, technical characterstic also has: described analog signal is uniformly-spaced taken out to point sampling is to adopt a selected sample frequency, and analog signal is uniformly-spaced taken out to point sampling uniformly.Described uniformly-spaced takes out point sampling to analog signal, adopts in this way a selected sample frequency f
0, analog signal is uniformly-spaced taken out to point sampling uniformly.
According to above-described frequency conversion sampling method, technical characterstic also has: described selected sample frequency of employing, with to first memory or register storage write data frequency, being stored in first memory or register storage, to push away address frequency consistent.For example adopt a selected sample frequency, with to the address frequency that pushes away of writing data frequency and storage of first memory or register storage, be all same frequency f
0.
According to above-described frequency conversion sampling method, technical characterstic also has: described first memory or register storage are the memories with negative delay feature.Described selected sample frequency f of employing
0carry out analog signal sampling, sampled signal A/D conversion digital signal, digital signal in first memory or register storage write signal, finally by pushing away address frequency storage signal, above-mentioned Four processes all needs the time, from analog sampling to storing by pushing away address frequency, this sampled signal to when storage owing to having had time delay through Four processes, so first memory or register storage must be memories with negative delay feature.
According to above-described frequency conversion sampling method, technical characterstic also has: this frequency conversion sampling method can adopt a set of electronic-circuit device to realize, and this cover electronic-circuit device is comprised of analog signal input, A/D modular converter, memory module and memory, clock or time-base circuit module, address generator module, control module, time-sequence control module, frequency comparison module, interface circuit etc.Described control module is in this way: computer or digital signal processor DSP or programmable logic device etc.This described cover electronic-circuit device can be realized frequency conversion sampling method.
Frequency conversion sampling method advantage of the present invention has: 1. the technical scheme of this frequency conversion sampling method has overcome the deficiency of current frequency conversion sampling method, can guarantee that frequency-change sampling data are able to complete recovery.2. this frequency conversion sampling method is according to the frequecy characteristic that is sampled signal, to change to select to change memory to push away address frequency, realizes the method for frequency-change sampling, has wherein adopted frequency ratio can guarantee that compared with module monitors frequency-change sampling data are able to complete recovery.3. a whole set of electronic-circuit device that has also designed, developed this frequency conversion sampling method, this device can be realized frequency conversion sampling method.This this frequency conversion sampling method is worth adopting and promoting.
Figure of description of the present invention has 5 width:
Fig. 1 is the frame assumption diagram of realizing a set of electronic-circuit device of frequency conversion sampling method employing;
Fig. 2 is the work schedule analogous diagram of A/D;
Fig. 3 is that second memory change advances address clock to realize frequency-change sampling functional simulation figure;
Fig. 4 is the functional simulation figure that realizes frequency-change sampling;
Fig. 5 is the circuit theory diagrams of frequency comparison module.
In each figure, adopted unified label, same object is used same label in each figure.In each figure: 1. analog signal; 2.A/D module; 3. first memory; 4. second memory; 5. clock; 6. address generator 1; 7. address generator 2; 8. control module; 9. sequencing control; 10. frequency comparison module; 11. interface circuits; 12. reset signal rst; 13.8M clock clk8m; 14.A/D conversion starting signal conVst; 15.A/D conversion busy signal busy; 16. read AD changeover control signal frd; 17. write first memory control signal few; 18. second memories push away address frequency control signal clk_add; 19. second memory enable signal en; 20. second memories are write data controlling signal sram_wr; 21. second memory read data control signal sram_rd; The 22. data sram_din that write to second memory; The 23. data sram_dout that read from second memory; 24.A/D change over clock (first memory is write data clock, first memory read data clock) clk_1m; 25. second memories push away address clock clk_100k; 26. first memory enable signal fifo_en; 27. first memory capacity control signal 1en; 28. first memory address fifo_addrout; 29. first memory data writing fifo_din; 30. first memory reading out data fifo_dout; 31. triggering signal 3tri; 32. k stage sample frequency programming word Pa[5: 3]; 33. k+1 stage sample frequency programming word Pa[8: 6]; 34. frequency comparative result output digital quantities 1; 35. frequency comparative result output digital quantities 0; 36. start counter control signal; 37. do not start counter status marking signal; 38. start counter status marking signal; 39. second memories push away the actual triggering signal in address; IC1, IC2, IC3, IC4, IC5 are integrated circuit, and wherein IC1 is 3 bit comparators; IC2 is first and door; IC3 is second and door; IC4 is counter; IC5 is or door.
four. accompanying drawing explanation
five. embodiment
Frequency conversion sampling method non-limiting examples of the present invention is as follows:
Embodiment mono-. frequency conversion sampling method
This routine frequency conversion sampling method concrete condition is combined and is illustrated by Fig. 1～Fig. 5, this frequency conversion sampling method, technical characterstic is: this frequency conversion sampling method is according to the changing features that is sampled signal, to select to change memory to push away address frequency, realize the method for frequency-change sampling, this frequency conversion sampling method is in a test process, analog signal is uniformly-spaced taken out to point sampling, through A/D, being converted to digital signal read-write is stored in first memory or register storage, in read-write storage, according to the changing features that is sampled signal, be divided into several subprocess and adopt change memory to push away address frequency by each subprocess, to reading, write and be stored in first memory or register storage data and take out point sampling and be stored in again in second memory, obtain the frequency-change sampling data between several subprocess of a test process, realize frequency-change sampling, wherein several subprocess are chosen as 1, 2, n subprocess.The described changing features that is sampled signal refers to that the frequecy characteristic that is sampled signal changes.Can be sampled signal by one like this changes to be divided into several subprocess and to adopt corresponding different memory to push away address frequency by the frequency of each subprocess by frequecy characteristic and samples, realize the frequency-change sampling of a complex process.This routine frequency conversion sampling method can adopt a set of electronic-circuit device to realize, Fig. 1 is depicted as the frame assumption diagram of a set of electronic-circuit device of realizing frequency conversion sampling method employing, as shown in Figure 1, this cover electronic-circuit device of this example is by analog signal input 1, A/D modular converter 2, memory module and memory thereof comprise first memory or register storage 3, second memory 4 etc., clock or time-base circuit module 5, address generator module 6 (address generator 1), 7 (address generators 2), control module 8, time-sequence control module 9, frequency comparison module 10, interface circuit 11 compositions such as grade.Described control module 8 is computer in this way.Fig. 5 illustrates the circuit theory diagrams of frequency comparison module, in Fig. 5: IC1, IC2, IC3, IC4, IC5 is integrated circuit, wherein IC1 is 3 bit comparators, IC2 is first and door, IC3 is second and door, IC4 is counter, IC5 is or door, (first memory is write data clock to the 24th, A/D change over clock, first memory read data clock) clk_1m, the 31st, triggering signal 3tri, 32 is k stage sample frequency programming word Pa[5: 3], 33. is k+1 stage sample frequency programming word Pa[8: 6], the 34th, frequency comparative result output digital quantity 1, the 35th, frequency comparative result output digital quantity 0, the 36th, start counter control signal, the 37th, do not start counter status marking signal, the 38th, start counter status marking signal, the 39th, second memory pushes away the actual triggering signal in address.Utilize this cover electronic-circuit device of this example can realize frequency conversion sampling method.This routine frequency conversion sampling method is in a test process, with sample frequency f0, analog signal is uniformly-spaced taken out to point sampling, through A/D, be converted to digital signal read-write and be stored in first memory or register storage, in read-write storage according to a test process that is sampled the changing features of signal be divided into 1,2 ..., a n subprocess adopt and change memory and push away address frequency f by each subprocess
1, f
2..., f
iread-write is stored in first memory or register storage to data and takes out point sampling and be stored in again in second memory, obtain the frequency-change sampling data between n subprocess of a test process, realize frequency-change sampling, wherein n>=i.Fig. 2 illustrates the work schedule analogous diagram of A/D, and Fig. 3 illustrates second memory and becomes and to push away address clock and realize frequency-change sampling functional simulation figure, and Fig. 4 illustrates the functional simulation figure that realizes frequency-change sampling.In this three figure: the 12nd, reset signal rst, the 13rd, 8M clock clk8m, the 14th, A/D conversion starting signal convst, the 15th, A/D conversion busy signal busy, the 16th, read AD changeover control signal frd, the 17th, write first memory control signal few, the 18th, second memory pushes away address frequency control signal clk_add, the 19th, second memory enable signal en, the 20th, second memory is write data controlling signal sram_wr, the 21st, second memory read data control signal sram_rd, the 22nd, the data sram_din writing to second memory, the 23rd, the data sram_dout reading from second memory, (first memory is write data clock to the 24th, A/D change over clock, first memory read data clock) clk_1m, the 25th, second memory pushes away address clock clk_100k, the 26th, first memory enable signal fifo_en, the 27th, first memory capacity control signal len, the 28th, first memory address fifo_addrout, the 29th, first memory data writing fifo_din, the 30th, first memory reading out data fifo_dout.A complicated change procedure that is sampled signal of this example is divided into n subprocess and adopts corresponding different memory to push away address frequency sampling by each subprocess, corresponding different sample frequency may be i, if n=i illustrates that the sample frequency of each subprocess is different, if the sample frequency of the subprocess that n > i explanation has is the same.This example is uniformly-spaced taken out point sampling to analog signal and is adopted in this way a selected sample frequency f
0, analog signal is uniformly-spaced taken out to point sampling uniformly.Selected sample frequency of employing of this example, with to first memory or register storage write data frequency, being stored in first memory or register storage, to push away address frequency consistent.The selected sample frequency for example adopting, with the address frequency that pushes away of writing data frequency and storage to first memory or register storage be all same frequency f
0.The first memory that this is routine or register storage are the memories with negative delay feature.Described selected sample frequency f of employing
0carry out analog signal sampling, sampled signal A/D conversion digital signal, digital signal in first memory or register storage write signal, finally by pushing away address frequency storage signal, above-mentioned Four processes all needs the time, from analog sampling to storing by pushing away address frequency, this sampled signal to when storage owing to having had time delay through Four processes, so first memory or register storage must be memories with negative delay feature.If complicated test process of a test process of this example, this test process is changed to speed according to signal characteristic and be divided into several subprocess, each subprocess is that the different address frequency that push away are taken out point sampling and are stored in second memory several subprocess storage data corresponding in first memory or register storage according to different sample frequencys, between several subprocess of a test process, realizes frequency-change sampling.The frequency conversion sampling method that this is routine, must select proportion comparison module, to the frequency-change sampling frequency ratio of several subprocess, when i-1 subprocess sample frequency is fast, i subprocess sample frequency is when slow, by frequency ratio compared with module controls, startup counter delay a period of time changes second memory i subprocess again and pushes away address frequency, guarantees that frequency-change sampling data regain one's integrity.Described when i-1 subprocess sample frequency is fast, i subprocess sample frequency is when slow, because signal successively has sampling, writes, stores three processes, so by frequency ratio compared with module controls, it is necessary that startup counter delay change second memory i subprocess pushes away address frequency, to guarantee that i subprocess sampled data regains one's integrity and whole frequency-change sampling data regain one's integrity.
Embodiment bis-. frequency conversion sampling method
This routine frequency conversion sampling method concrete condition can be combined and illustrate with Fig. 1～Fig. 5 etc., and the frequency conversion sampling method difference of the frequency conversion sampling method that this is routine and embodiment mono-has: 1. this example is control module 8 digital signal processor DSP in this way of realizing a set of electronic-circuit device that frequency conversion sampling method adopts.2. a complicated change procedure that is sampled signal of this example is divided into n subprocess and adopts corresponding different memory to push away address frequency sampling by each subprocess, corresponding different sample frequency may be i, and the sample frequency that this routine n=i illustrates each subprocess is different.All the other do not state this routine frequency conversion sampling method, are entirely same as described in embodiment mono-, no longer repeat.
Embodiment tri-. frequency conversion sampling method
This routine frequency conversion sampling method concrete condition can be combined and illustrate with Fig. 1～Fig. 5 etc., and the frequency conversion sampling method difference of the frequency conversion sampling method that this is routine and embodiment mono-, embodiment bis-has: 1. this example is control module 8 programmable logic device etc. in this way of realizing a set of electronic-circuit device that frequency conversion sampling method adopts.2. a complicated change procedure that is sampled signal of this example is divided into n subprocess and adopts corresponding different memory to push away address frequency sampling by each subprocess, corresponding different sample frequency may be i, if the sample frequency of the subprocess that n > i explanation has is the same.All the other do not state this routine frequency conversion sampling method, are entirely same as described in embodiment mono-, embodiment bis-, no longer repeat.
Claims (4)
1. a frequency conversion sampling method, be characterised in that: this frequency conversion sampling method is according to the changing features that is sampled signal, to select to change memory to push away address frequency, realize the method for frequency-change sampling, this frequency conversion sampling method is in a test process, analog signal is uniformly-spaced taken out to point sampling, through A/D, being converted to digital signal read-write is stored in first memory or register storage, in read-write storage, according to the changing features that is sampled signal, be divided into several subprocess and adopt change memory to push away address frequency by each subprocess, read-write is stored in first memory or register storage to data takes out point sampling and is stored in second memory again, obtain the frequency-change sampling data between several subprocess of a test process, realize frequency-change sampling, wherein several subprocess are chosen as the 1st, 2, n subprocess, this frequency conversion sampling method is in a test process, with sample frequency f
0analog signal is uniformly-spaced taken out to point sampling, through A/D, being converted to digital signal read-write is stored in first memory or register storage, in read-write storage, according to the changing features that is sampled signal, test process is divided into 1,2 ..., a n subprocess adopt and change memory and push away address frequency f by each subprocess
1, f
2..., f
iread-write is stored in first memory or register storage to data and takes out point sampling and be stored in again in second memory, obtain the frequency-change sampling data between n subprocess of a test process, realize frequency-change sampling, wherein n>=i, if described complicated test process of a test process, this test process is changed to speed according to signal characteristic and be divided into several subprocess, each subprocess is that the different address frequency that push away are taken out point sampling and are stored in second memory several subprocess storage data corresponding in first memory or register storage according to different sample frequencys, between several subprocess of a test process, realizes frequency-change sampling, select proportion comparison module, to the frequency-change sampling frequency ratio of several subprocess, when i-1 subprocess sample frequency is fast, i subprocess sample frequency is when slow, by frequency ratio compared with module controls, start counter delay change second memory i subprocess and push away address frequency, guarantee that frequency-change sampling data regain one's integrity.
2. frequency conversion sampling method according to claim 1, is characterised in that: described analog signal is uniformly-spaced taken out to point sampling is to adopt a selected sample frequency, and analog signal is uniformly-spaced taken out to point sampling uniformly.
3. frequency conversion sampling method according to claim 2, is characterised in that: described selected sample frequency of employing, with to first memory or register storage write data frequency, being stored in first memory or register storage, to push away address frequency consistent.
4. frequency conversion sampling method according to claim 1, is characterised in that: described first memory or register storage are the memories with negative delay feature.
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| CN108844622B (en) * | 2018-07-11 | 2019-08-06 | 中国科学院地质与地球物理研究所 | A kind of multi-sampling rate vibration data recording method and device |
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Inventor after: Jin Hong Inventor after: Wang Yan Inventor after: Chen Changxin Inventor after: Zu Jing Inventor after: Ma Tiehua Inventor after: Fu Yongle Inventor after: Pei Dongxing Inventor after: Shen Dawei Inventor after: Zhang Hongyan Inventor before: Jin Hong Inventor before: Wang Yan Inventor before: Zu Jing Inventor before: Ma Tiehua Inventor before: Chen Changxin Inventor before: Fu Yongle Inventor before: Pei Dongxing Inventor before: Shen Dawei Inventor before: Zhang Hongyan |
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| COR | Change of bibliographic data |
Free format text: CORRECT: INVENTOR; FROM: JIN HONG WANG YAN ZU JING MA TIEHUA CHEN CHANGXIN FU YONGLE PEI DONGXING SHEN DAWEI ZHANG HONGYAN TO: JIN HONG WANG YAN CHEN CHANGXIN ZU JING MA TIEHUA FU YONGLE PEI DONGXING SHEN DAWEI ZHANG HONGYAN |
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| C14 | Grant of patent or utility model | ||
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141112 Termination date: 20161029 |
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| CF01 | Termination of patent right due to non-payment of annual fee |