CN102495654A - Low-dropout regulator and integrated circuit system - Google Patents
Low-dropout regulator and integrated circuit system Download PDFInfo
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- CN102495654A CN102495654A CN201110383605XA CN201110383605A CN102495654A CN 102495654 A CN102495654 A CN 102495654A CN 201110383605X A CN201110383605X A CN 201110383605XA CN 201110383605 A CN201110383605 A CN 201110383605A CN 102495654 A CN102495654 A CN 102495654A
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Abstract
The invention provides a low-dropout regulator and an integrated circuit system. The low-dropout regulator comprises an amplification unit, a regulating NMOS (N-channel Mental-oxide-semiconductor) tube, an output NMOS tube and a voltage dividing unit, wherein a first input end of the amplification unit is used for inputting a reference voltage; a second input end of the amplification unit is connected with an output end of the voltage dividing unit; an input end of the voltage dividing unit is connected with a source of the regulating NMOS tube; a drain of the regulating NMOS tube is connected with a power supply; a gate of the regulating NMOS tube is connected with a gate of the output NMOS tube and connected with an output end of the amplification unit; a drain of the output NMOS tube is connected with the power supply; as an output end of the low-dropout regulator, a source of the regulating NMOS is used for outputting output voltage of the low-dropout regulator. By using the low-dropout regulator provided by the invention, the influences of voltage, temperature, process and other factors on the output voltage are reduced and the accuracy of the output voltage is improved.
Description
Technical field
The present invention relates to technical field of integrated circuits, particularly a kind of low-dropout regulator and the IC system of using said low-dropout regulator.
Background technology
Nowadays, the integrated circuit development is very rapid, and in IC design, particularly in the design of hybrid digital analog circuit, digital circuit is the bigger electric current of moment consumption rate when a plurality of switches switch.And, based on considering of factors such as the restriction of technology and power consumption, generally can chip internal do low-dropout regulator (Low Dropout Regulator, LDO).In integrated circuit, usually need inner low-dropout regulator to have than reaction velocity and more stable power supply performance faster.
Fig. 1 shows the synoptic diagram of the IC system that comprises low-dropout regulator in the prior art.With reference to figure 1, said IC system comprises: voltage input end is used for the input voltage VBAT of input system; Signal input part is used for the input signal INPUT of input system; Signal output part is used for the output signal OUTPUT of output system; Earth terminal is used for the ground end GND of connected system.
Particularly, said IC system comprises band-gap reference circuit 10, low-dropout regulator 20, mimic channel 30 and digital circuit 40.Wherein, said band-gap reference circuit 10 is used to produce and the irrelevant reference voltage V REF of factors such as technology, voltage, temperature, and said reference voltage V ERF is as the input of low-dropout regulator 20; Said low-dropout regulator 20 produces internal system voltage VDD, and said internal system voltage VDD is as the power supply of digital circuit 40; And said mimic channel 30 was opened independence in 40 minutes with digital circuit, and the input voltage of said mimic channel 30 is the input voltage VBAT of system.
Particularly, Fig. 2 shows a kind of circuit diagram of Fig. 1 mesolow difference voltage stabilizer.With reference to figure 2, said low-dropout regulator 20 comprises: clamped amplifier AMP1, adjustment NMOS pipe N1, output NMOS pipe N2 and divider resistance R1 and R2.
The in-phase input end input reference voltage VREF of said clamped amplifier AMP1, inverting input is imported by divider resistance R1 and R2 voltage after partial V1.
The grid of said adjustment NMOS pipe N1 connects the output terminal of said clamped amplifier AMP1, the input power supply VBAT of drain electrode connected system, and source electrode connects the end of branch pressure voltage R1, the source electrode output adjustment voltage V2 of said adjustment NMOS pipe N1.
The grid of said output NMOS pipe N2 connects the source electrode of said adjustment NMOS pipe N1, the input power supply VBAT of drain electrode connected system, and source electrode is as the output terminal output system builtin voltage VDD of low-dropout regulator.
Thus, internal system voltage VDD=V2-Vth 1.
Wherein, said Vth is the threshold voltage of output NMOS pipe N2.
By divider resistance R1 and R2 voltage after partial
2.
2. can draw by formula so,
3.
Because the effect of clamped amplifier AMP1 makes that the in-phase input end of this amplifier is identical with the voltage of inverting input, promptly VREF=V1 4.
1. 2. 3. 4. can draw by above-mentioned formula,
5.
Above-mentioned formula 5. in, reference voltage V REF is produced by the band-gap reference circuit shown in Fig. 1 10, so its variation with temperature, voltage, technology has nothing to do; The resistance of divider resistance R1 and R2 also has nothing to do with temperature, voltage, technology; The threshold voltage vt h of output NMOS pipe N2 then can produce deviation with voltage, temperature or technology etc., thereby has influence on the degree of accuracy of the internal system voltage VDD of low-dropout regulator 20 outputs.
Therefore, how to reduce the influence to the internal system voltage of low-dropout regulator output such as voltage, temperature, technology, just become one of those skilled in the art's problem demanding prompt solution to improve its degree of accuracy.
Summary of the invention
The problem that the present invention solves provides a kind of low-dropout regulator, reducing voltage, temperature, technology effectively to its output voltage influence, and improves the degree of accuracy of its output voltage.
For addressing the above problem, the present invention provides a kind of low-dropout regulator, comprising: amplifying unit, adjustment NMOS pipe, output NMOS pipe and partial pressure unit;
The first input end input reference voltage of said amplifying unit, second input end connects the output terminal of partial pressure unit;
The input end of said partial pressure unit connects the source electrode of adjustment NMOS pipe;
The drain electrode of said adjustment NMOS pipe connects power supply, and grid links to each other with the grid of output NMOS pipe, and is connected to the output terminal of said amplifying unit;
The drain electrode of said output NMOS pipe connects power supply, and source electrode is exported the output voltage of said low-dropout regulator as the output terminal of low-dropout regulator.
Alternatively, said amplifying unit comprises clamped amplifier, the in-phase input end input reference voltage of said clamped amplifier, and inverting input is connected to the output terminal of partial pressure unit, and output terminal connects the grid of adjustment NMOS pipe.
Alternatively, said partial pressure unit comprises first resistance and second resistance, and an end of said first resistance is as the input end of partial pressure unit; The source electrode that connects adjustment NMOS pipe; The other end connects second input end of amplifying unit as the output terminal of partial pressure unit, and connects an end of second resistance; The other end ground connection of said second resistance.
Alternatively, said adjustment NMOS pipe is identical with the device parameters of said output NMOS pipe.
Alternatively, identical the comprising of device parameters of said adjustment NMOS pipe and said output NMOS pipe: said adjustment NMOS pipe is identical with the threshold voltage of said output NMOS pipe.
Alternatively, said first resistance and second resistance are MOS transistor.
The present invention also provides a kind of IC system, comprises each described low-dropout regulator of aforesaid right requirement.
Alternatively, said IC system also comprises: band-gap reference circuit, and said band-gap reference circuit is used to produce reference voltage; Wherein, said reference voltage is as the input voltage of said low-dropout regulator.
Compared with prior art, disclosed low-dropout regulator of present technique scheme and IC system have the following advantages:
1) in this programme; Adjustment NMOS pipe links to each other with the grid of output NMOS pipe; Make the threshold voltage of output NMOS pipe adjusted the threshold voltage partial offset of NMOS pipe; Thereby reduced the output voltage influence of the threshold voltage of output NMOS pipe, also promptly weakened the output voltage influence of factors such as voltage, temperature or technology, improved the degree of accuracy of the output voltage of low-dropout regulator low-dropout regulator to low-dropout regulator.
2) in the possibility; Adjustment NMOS pipe is identical with the threshold voltage of output NMOS pipe; The threshold voltage that makes output NMOS manage is adjusted the threshold voltage of NMOS pipe and is all offset; Thereby avoided the output voltage influence of the threshold voltage of output NMOS pipe, also promptly avoided the output voltage influence of factors such as voltage, temperature or technology, improved the degree of accuracy of the output voltage of low-dropout regulator further low-dropout regulator to low-dropout regulator.
Description of drawings
Fig. 1 is the synoptic diagram that comprises the IC system of low-dropout regulator in the prior art;
Fig. 2 is a kind of circuit diagram of Fig. 1 mesolow difference voltage stabilizer;
Fig. 3 is the circuit diagram of low-dropout regulator of the present invention.
Embodiment
Can know by the description in the background technology; The threshold value of NMOS pipe can change along with the variation of factors such as voltage, temperature or technology; And in the prior art; The output voltage of low-dropout regulator is relevant with the threshold value of output NMOS pipe, thereby makes its output voltage can receive the influence of factors such as voltage, temperature or technology, and then has influenced its output voltage accuracy.
In the low-dropout regulator of the present invention, adjustment NMOS pipe links to each other with the grid of output NMOS pipe, the threshold voltage of the source voltage of the grid voltage of feasible output NMOS pipe=adjustment NMOS pipe+adjustment NMOS pipe; And because the threshold voltage of the grid voltage of the source voltage that the said NMOS of output manages=output NMOS pipe-output NMOS pipe, thereby the threshold voltage of the threshold voltage of the source voltage that source voltage (being the output voltage of the low-dropout regulator)=adjustment NMOS that makes said output NMOS manage manages+adjustment NMOS pipe-output NMOS pipe.Like this, the threshold voltage of the threshold voltage of adjustment metal-oxide-semiconductor and output NMOS pipe influences each other or offsets, and can reduce the output voltage influence of factors such as voltage, temperature, technology to low-dropout regulator.Preferably; Adjustment NMOS pipe in the low-dropout regulator of the present invention is identical with the threshold voltage of output NMOS pipe; Thereby make the source voltage (being the output voltage of low-dropout regulator) of said output NMOS pipe equal to adjust the source voltage of NMOS pipe; Thereby avoided the output voltage influence of factors such as voltage, temperature, technology fully, improved the degree of accuracy of the output voltage of low-dropout regulator low-dropout regulator.
For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, does detailed explanation below in conjunction with the accompanying drawing specific embodiments of the invention.
Set forth detail in the following description so that make much of the present invention.But the present invention can be different from alternate manner described here and implements with multiple, and those skilled in the art can do similar popularization under the situation of intension of the present invention.Therefore the present invention does not receive the restriction of following disclosed embodiment.
Fig. 3 is the circuit diagram of low-dropout regulator of the present invention, and as shown in Figure 3, said low-dropout regulator comprises: amplifying unit 100, adjustment NMOS pipe N3, output NMOS pipe N4 and partial pressure unit 200.
The first input end input reference voltage VREF of said amplifying unit 100, second input end connects the output terminal of partial pressure unit 200.The input end of said partial pressure unit 200 connects the source electrode of adjustment NMOS pipe N3.The drain electrode of said adjustment NMOS pipe N3 connects power supply VBAT, and grid links to each other with the grid of output NMOS pipe N4, and is connected to the output terminal of said amplifying unit 100.The drain electrode of said output NMOS pipe N4 connects power supply VBAT, and source electrode is exported the output voltage V DD of said low-dropout regulator as the output terminal of low-dropout regulator.
Wherein, said reference voltage V REF is produced by band-gap reference circuit (not shown among Fig. 3).Band-gap reference circuit and circuit structure of the prior art are similar, so repeat no more at this.Need to prove, irrelevant by the reference voltage V REF that band-gap reference circuit produces with factors such as voltage, temperature or technologies, that is to say that said reference voltage V REF can not change with the variation of factors such as voltage, temperature or technology.
Particularly, with reference to figure 3, in the present embodiment, said amplifying unit 100 comprises clamped amplifier AMP2.The in-phase input end of said clamped amplifier AMP2 is as the first input end of said amplifying unit 100, input reference voltage VREF; Its inverting input connects the output terminal of said partial pressure unit 200 as second input end of said amplifying unit 100.
Said partial pressure unit 200 comprises first resistance R 3 and second resistance R 4.One end of said first resistance R 3 connects the source electrode of adjustment NMOS pipe N3 as the input end of partial pressure unit 200; The other end connects the inverting input of said clamped amplifier AMP2 as the output terminal of partial pressure unit 200, and links to each other with an end of second resistance R 4.The other end ground connection of said second resistance R 4.
Need to prove that the amplifying unit 100 in the present embodiment and the particular circuit configurations of partial pressure unit 200 are merely and illustrate, it should not limit protection scope of the present invention.Those skilled in the art can do simple modification, distortion or replacement to said amplifying unit 100 and partial pressure unit 200 in other embodiments.For example, in other embodiments, first resistance R 3 in the said partial pressure unit 200 also can substitute with metal-oxide-semiconductor with R4, and connected mode is for well known to a person skilled in the art, so repeat no more at this particularly.
Below in conjunction with Fig. 3 the principle of work of low-dropout regulator of the present invention is elaborated.
Explanation for ease is defined as Vth3 with the threshold voltage of adjustment NMOS pipe N3, is defined as Vth4 and will export the threshold voltage that NMOS manages N4.
Well known to a person skilled in the art that when factors such as voltage, temperature or technology changed, the threshold voltage of metal-oxide-semiconductor of the same type can take place to change in the same way.So, the pipe of the adjustment NMOS in present embodiment N3 also can take place to change in the same way with the threshold voltage of output NMOS pipe N4 along with the variation of factors such as voltage, temperature or technology.The threshold voltage that refers to adjustment NMOS pipe N3 and output NMOS pipe N4 that changes in the same way here can raise along with the variation of factors such as voltage, temperature or technology or reduce simultaneously simultaneously.
In the present embodiment, first resistance R 3 in the partial pressure unit 200 is carried out dividing potential drop with R4 to the source voltage V4 that adjustment NMOS manages N3, to produce voltage after partial V3.Therefore can draw:
The grid voltage V5 that the source voltage V4 of adjustment NMOS pipe N3 equals to adjust NMOS pipe N3 deducts its threshold voltage vt h3, that is: V4=V5-Vth3 7.
Wherein, Vth3 is the threshold voltage of adjustment NMOS pipe N3.
In the present embodiment; The grid of adjustment NMOS pipe N3 links to each other with the grid of output NMOS pipe N4; So the grid voltage of output NMOS pipe N4 equals to adjust the grid voltage V5 of NMOS pipe N3, and then can draw: VDD=V5-Vth4 8.
Wherein, Vth4 is the threshold voltage of output NMOS pipe N4.
Because the effect of the clamped amplifier AMP2 in the present embodiment, the voltage of the in-phase input end of this clamped amplifier AMP2 equates that with the voltage of its inverting input that is: VREF=V3 9.
6. 7. 8. 9. can draw by formula:
10.
Wherein, Vth3 is the threshold voltage of adjustment NMOS pipe N3; Vth4 is the threshold voltage of output NMOS pipe N4.Because in the present embodiment, adjustment NMOS pipe N3 is identical with the device parameters of output NMOS pipe N4, threshold voltage is identical (being Vth3=Vth4).Therefore, 10. formula can be reduced to
Thereby can find out that the output voltage V DD of present embodiment mesolow difference voltage stabilizer is irrelevant with the threshold voltage of adjustment NMOS pipe N3, output NMOS pipe N4.Like this; Just avoided the output voltage influence of the threshold voltage of output NMOS pipe N4 fully to low-dropout regulator; Thereby also just avoided the output voltage influence of factors such as voltage, temperature or technology, improved the degree of accuracy of the output voltage V DD of low-dropout regulator low-dropout regulator.
Certainly, in other embodiments, adjustment NMOS pipe N3 also can be incomplete same with device parameters, the threshold voltage of output NMOS pipe N4.In this case, 10. Vth3-Vth4 ≠ 0 can be found out by formula, and the output voltage V DD of low-dropout regulator still can receive the influence of factors such as voltage, temperature or technology.But because the threshold voltage of adjustment NMOS pipe N3 and output NMOS pipe N4 can take place to change in the same way along with factors such as voltage, temperature or technologies; Thereby adjustment NMOS pipe N3 can influence each other with the threshold voltage of output NMOS pipe N4; Produce the partial offset effect; Thereby weakened the influence of factors such as voltage, temperature or technology, also can improve the degree of accuracy of the output voltage V DD of low-dropout regulator to a certain extent.
The present invention also provides a kind of IC system that comprises above-mentioned low-dropout regulator.Can also comprise band-gap reference circuit in the said IC system, said band-gap reference circuit is used to produce the required reference voltage of said low-dropout regulator.The structure similar of the structure of said IC system mesolow difference voltage stabilizer and low-dropout regulator shown in Figure 3; And the band-gap reference circuit of said band-gap reference circuit and prior art is similar, so repeat no more at this.
Though the present invention with preferred embodiment openly as above; But it is not to be used for limiting the present invention; Any those skilled in the art are not breaking away from the spirit and scope of the present invention; Can utilize the method and the technology contents of above-mentioned announcement that technical scheme of the present invention is made possible change and modification, therefore, every content that does not break away from technical scheme of the present invention; To any simple modification, equivalent variations and modification that above embodiment did, all belong to the protection domain of technical scheme of the present invention according to technical spirit of the present invention.
Claims (8)
1. a low-dropout regulator is characterized in that, comprising: amplifying unit, adjustment NMOS pipe, output NMOS pipe and partial pressure unit;
The first input end input reference voltage of said amplifying unit, second input end connects the output terminal of partial pressure unit;
The input end of said partial pressure unit connects the source electrode of adjustment NMOS pipe;
The drain electrode of said adjustment NMOS pipe connects power supply, and grid links to each other with the grid of output NMOS pipe, and is connected to the output terminal of said amplifying unit;
The drain electrode of said output NMOS pipe connects power supply, and source electrode is exported the output voltage of said low-dropout regulator as the output terminal of low-dropout regulator.
2. low-dropout regulator as claimed in claim 1; It is characterized in that said amplifying unit comprises clamped amplifier, the in-phase input end input reference voltage of said clamped amplifier; Inverting input is connected to the output terminal of partial pressure unit, and output terminal connects the grid of adjustment NMOS pipe.
3. low-dropout regulator as claimed in claim 1; It is characterized in that said partial pressure unit comprises first resistance and second resistance, an end of said first resistance is as the input end of partial pressure unit; The source electrode that connects adjustment NMOS pipe; The other end connects second input end of amplifying unit as the output terminal of partial pressure unit, and connects an end of second resistance; The other end ground connection of said second resistance.
4. low-dropout regulator as claimed in claim 1 is characterized in that, said adjustment NMOS pipe is identical with the device parameters of said output NMOS pipe.
5. low-dropout regulator as claimed in claim 4 is characterized in that, identical the comprising of device parameters of said adjustment NMOS pipe and said output NMOS pipe: said adjustment NMOS pipe is identical with the threshold voltage of said output NMOS pipe.
6. low-dropout regulator as claimed in claim 1 is characterized in that, said first resistance and second resistance are MOS transistor.
7. an IC system is characterized in that, comprises each described low-dropout regulator of claim 1～6.
8. IC system as claimed in claim 7 is characterized in that, also comprises: band-gap reference circuit, and said band-gap reference circuit is used to produce reference voltage; Wherein, said reference voltage is as the input voltage of said low-dropout regulator.
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Cited By (8)
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| CN104679083A (en) * | 2013-11-27 | 2015-06-03 | 展讯通信（上海）有限公司 | Integrated circuit and electronic device |
| CN106300965A (en) * | 2016-11-16 | 2017-01-04 | 电子科技大学 | A kind of booster power LDO electric power system based on load supplying |
| CN107193318A (en) * | 2017-06-14 | 2017-09-22 | 成都锐成芯微科技股份有限公司 | The voltage-regulating circuit of high input and output electric current |
| CN108258895A (en) * | 2018-02-05 | 2018-07-06 | 上海艾为电子技术股份有限公司 | Soft starting circuit and power-supply system |
| CN108319319A (en) * | 2018-02-08 | 2018-07-24 | 厦门亿芯源半导体科技有限公司 | LDO with flow-route and temperature adjust automatically |
| CN108874010A (en) * | 2018-09-06 | 2018-11-23 | 深圳市中微半导体有限公司 | A kind of strong anti-interference LDO module and anti-interference touch detection circuit |
| CN111596118A (en) * | 2020-06-23 | 2020-08-28 | 上海安路信息科技有限公司 | Current detection circuit and low dropout regulator circuit |
| CN111831046A (en) * | 2019-04-16 | 2020-10-27 | 联咏科技股份有限公司 | Output stage circuit and voltage stabilizer thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104679083A (en) * | 2013-11-27 | 2015-06-03 | 展讯通信（上海）有限公司 | Integrated circuit and electronic device |
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| CN106300965A (en) * | 2016-11-16 | 2017-01-04 | 电子科技大学 | A kind of booster power LDO electric power system based on load supplying |
| CN107193318A (en) * | 2017-06-14 | 2017-09-22 | 成都锐成芯微科技股份有限公司 | The voltage-regulating circuit of high input and output electric current |
| CN108258895A (en) * | 2018-02-05 | 2018-07-06 | 上海艾为电子技术股份有限公司 | Soft starting circuit and power-supply system |
| CN108319319A (en) * | 2018-02-08 | 2018-07-24 | 厦门亿芯源半导体科技有限公司 | LDO with flow-route and temperature adjust automatically |
| CN108319319B (en) * | 2018-02-08 | 2019-10-15 | 厦门亿芯源半导体科技有限公司 | LDO with flow-route and temperature adjust automatically |
| CN108874010A (en) * | 2018-09-06 | 2018-11-23 | 深圳市中微半导体有限公司 | A kind of strong anti-interference LDO module and anti-interference touch detection circuit |
| CN111831046A (en) * | 2019-04-16 | 2020-10-27 | 联咏科技股份有限公司 | Output stage circuit and voltage stabilizer thereof |
| CN111596118A (en) * | 2020-06-23 | 2020-08-28 | 上海安路信息科技有限公司 | Current detection circuit and low dropout regulator circuit |
| CN111596118B (en) * | 2020-06-23 | 2020-12-11 | 上海安路信息科技有限公司 | Current detection circuit and low dropout regulator circuit |
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Application publication date: 20120613 |