CN102455732A - Circuit capable of improving matching degree of multi-path large current - Google Patents

Circuit capable of improving matching degree of multi-path large current Download PDF

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CN102455732A
CN102455732A CN2010105298786A CN201010529878A CN102455732A CN 102455732 A CN102455732 A CN 102455732A CN 2010105298786 A CN2010105298786 A CN 2010105298786A CN 201010529878 A CN201010529878 A CN 201010529878A CN 102455732 A CN102455732 A CN 102455732A
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current
amplifier
input end
circuit
output terminal
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CN102455732B (en
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胡如波
王觅
王磊
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CRM ICBG Wuxi Co Ltd
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CR Powtech Shanghai Ltd
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Abstract

The invention discloses a circuit capable of improving matching degree of multi-path large current. The circuit comprises a current mirror, a current cyclically-switching array and a current chopping module. By using the circuit capable of improving matching degree of multi-path large current, the influence of deviation between transistors on matching precision in the prior art is eliminated, and a circuit which is capable of eliminating the influence of the process deviation between the transistors on the matching degree through carrying out period cycling switching on small-current image output current is provided.

Description

Improve the circuit of the big currents match degree of multichannel
Technical field
The present invention relates to the big current matching circuit of a kind of multichannel, relate in particular to a kind of circuit that improves the big currents match degree of multichannel.
Background technology
Fig. 1 is CMOS multichannel current mirror circuit of the prior art, and is as shown in Figure 1, and this circuit has the transistor of a plurality of cascodes to be formed by connecting, and reference current Iin is mirrored onto each current source output Io1-Ion.Because the matching performance of cmos device is relatively poor, so there is bigger mismatch between output current and the reference current.Particularly when output current is big, for example tens milliamperes, perhaps hundreds of MAH, because need big driving tube, so the centre distance between driving tube is far away relatively, further like this mismatch problems of aggravating output current.
Fig. 2 is a PMOS current mirror circuit of the prior art, sees also Fig. 2, connects build-out resistor R1, R2 realization vast scale mirror image through two input ends at amplifier simultaneously, exports the circuit of big electric current at last.Because the PMOS size is less in the little electric current PMOS current mirror, so the process deviation between the PMOS is less relatively.Be to do certain matching treatment placing the PMOS device in addition; Can further reduce the error between the PMOS current mirror like this; But the process deviation of PMOS device still exists, and just the output current Io1-Ion of PMOS current mirror still has certain deviation.Can reduce the matching error between the vast scale image current Io1-Ion through resistors match, but the offset voltage of amplifier input end can cause the current mismatch between the final electric current output.
Summary of the invention
The circuit that the purpose of this invention is to provide the big currents match degree of a raising multichannel; It has solved in the prior art because the image current that the deviation between the transistor causes and the problem of reference current mismatch, and it compared with prior art has output current and the high advantage of reference current matching degree.
Above-mentioned purpose of the present invention realizes through following technical scheme:
A kind of circuit that improves the big currents match degree of multichannel wherein, comprising:
One current mirror is used for the reference current mirror image is become N image current that equates with said reference current, and wherein, N is the integer greater than 1;
One current cycle switching array; Have N image current input end and N circulating current output terminal; Each image current input end is corresponding one by one with each said image current, and all is connected to a CS between each said image current input end and each the said circulating current output terminal;
One current chopping module, the output current mirror image that is used for said N circulating current output terminal is a N road current source.
The circuit of the big currents match degree of above-mentioned raising multichannel, wherein, said current mirror comprises:
The drain electrode of one second benchmark PMOS pipe all links to each other with said reference current input end with grid;
The drain electrode of one first benchmark PMOS pipe all links to each other with the source electrode of said second benchmark PMOS pipe with grid;
N first mirror image PMOS pipe is connected with said first benchmark PMOS pipe cascade;
N second mirror image PMOS pipe is total to grid with said second benchmark PMOS pipe and is connected;
The source electrode of the drain electrode of said each first mirror image PMOS pipe and said second a mirror image PMOS pipe connects one to one;
N road image current is exported in the drain electrode of said N second mirror image PMOS pipe respectively.
The circuit of the big currents match degree of above-mentioned raising multichannel, wherein, said current cycle switching array:
A clock in office is in the cycle; There is a CS closed in N the CS that arbitrary said image current input end connects; In the same clock period; Arbitrary said circulating current output terminal has and only has said image current input end and its conducting, and in N clock period, arbitrary said circulating current output terminal and said N each conducting of image current input end once.
The circuit of the big currents match degree of above-mentioned raising multichannel, wherein, said current chopping module comprises:
One chopper amplifier, its positive input terminal links to each other with said circulating current output terminal;
One current drives pipe, its grid links to each other with the output terminal of said chopper amplifier, and source electrode links to each other with the negative input end of said chopper amplifier, drains to be the output terminal of said current source;
First resistance, one of which end ground connection, the other end is connected with said chopper amplifier positive input terminal;
Second resistance, one of which end ground connection, the other end is connected with the grid of said current drives pipe.
The circuit of the big currents match degree of above-mentioned raising multichannel, wherein, said chopper amplifier comprises:
The input end of one first single-pole double-throw switch (SPDT) is the positive input terminal of said chopper amplifier, and two output terminals of said first single-pole double-throw switch (SPDT) are gone into pair two input ends that go out amplifier with a pair of respectively and linked to each other;
The input end of one second single-pole double-throw switch (SPDT) is the negative input end of said chopper amplifier, and two output terminals of said second single-pole double-throw switch (SPDT) two gone into two two input ends that go out amplifier and linked to each other with said respectively;
One end of one first change-over switch two gone into two negative output terminals that go out amplifier and is linked to each other with said, and the other end of said first change-over switch is the output terminal of said chopper amplifier;
One end of one second change-over switch two gone into two positive output ends that go out amplifier and is linked to each other with said, and the other end of said second change-over switch is the output terminal of said chopper amplifier;
Two clock signal input terminals are imported two inversion clock signals: first clock signal and second clock signal, and said first clock signal is controlled said first single-pole double-throw switch (SPDT) and first change-over switch; Said second single-pole double-throw switch (SPDT) of said second clock signal controlling and said second change-over switch.
The circuit of the big currents match degree of above-mentioned raising multichannel; Wherein, The inverting input that closed and first single-pole double-throw switch (SPDT) of first change-over switch was connected said chopper amplifier when said first clock signal was high level and said two pair in-phase input ends that go out amplifier of going into; Otherwise, the inverting input that first change-over switch is broken off and first single-pole double-throw switch (SPDT) is connected said chopper amplifier and said two pair inverting inputs that go out amplifier of going into; The in-phase input end that closed and second single-pole double-throw switch (SPDT) of second change-over switch was connected said chopper amplifier when said second clock signal was high level and said two pair in-phase input ends that go out amplifier of going into; Otherwise, the in-phase input end that second change-over switch is broken off and second single-pole double-throw switch (SPDT) is connected said chopper amplifier and said two pair inverting inputs that go out amplifier of going into.
The circuit of the big currents match degree of above-mentioned raising multichannel; Wherein, saidly two go into twoly to go out amplifier and have offset voltage, the value of said offset voltage is Voff; When the second clock signal is high level, go into couple high Voff of voltage of the voltage ratio negative input end of the positive input terminal that goes out amplifier for said pair; When first clock signal is high level, go into couple high Voff of voltage of the voltage ratio positive input terminal of the negative input end that goes out amplifier for said pair.
Owing to adopted technique scheme; The present invention improve the big currents match degree of multichannel circuit for eliminating in the prior art because the deviation between the transistor, provides a kind of to the influence that matching precision caused that little current mirror output current is switched to eliminate process deviation between the transistor to the circuit of the influence that matching degree was caused through loop cycle.
Description of drawings
Fig. 1 is a CMOS multichannel current mirror circuit of the prior art;
Fig. 2 is a PMOS current mirror circuit of the prior art;
Fig. 3 is the electrical block diagram that the present invention improves the circuit of the big currents match degree of multichannel;
Fig. 4 is the circuit diagram of the current mirror of the present invention's circuit of improving the big currents match degree of multichannel;
Fig. 5 is the circuit control on-off circuit figure that the present invention improves the big currents match degree of multichannel;
Fig. 6 is the circuit diagram that the present invention improves the circuit control circuit of the big currents match degree of multichannel;
Fig. 7 is the sequential chart that the present invention improves the circuit control switch of the big currents match degree of multichannel;
Fig. 8 is the circuit diagram of the current chopping module of the present invention's circuit of improving the big currents match degree of multichannel;
Fig. 9 is two reverse clock signal sequential charts of the present invention's circuit of improving the big currents match degree of multichannel;
Figure 10 is the circuit structure diagram of the chopper amplifier of the present invention's circuit of improving the big currents match degree of multichannel.
Embodiment
Be further described below in conjunction with the accompanying drawing specific embodiments of the invention:
Embodiment (one)
Fig. 3 is the electrical block diagram that the present invention improves the circuit of the big currents match degree of multichannel, sees also Fig. 3, Fig. 5, and a kind of circuit that improves the big currents match degree of multichannel wherein, comprising:
One current mirror 1; Be used for reference current source 4 mirror images are become N image current that equates with the reference current of reference current source 4; Wherein, N is the integer greater than 1, and current mirror 1 can adopt the PMOS current mirror; It is less that the PMOS current mirror has process deviation, makes between the reference current of image current and reference current source 4 process deviation less.
Wherein, current mirror 1 also can adopt the NMOS current mirror, can reach the less effect of process deviation between the reference current that makes image current and reference current source 4 equally.
Fig. 5 is the circuit control on-off circuit figure that the present invention improves the big currents match degree of multichannel; See also Fig. 5; One current cycle switching array 2; Have N image current input end 21 and N circulating current output terminal 22, each image current input end 21 is corresponding one by one with each image current, and all is connected to a CS K1, K2 between each image current input end 21 and each the circulating current output terminal 22 ... Kn; CS K1, K2 ... The quantity of Kn is N2 altogether; After circulation through current cycle switching array 2 was switched, the electric current of each circulating current output terminal 22 output was the mean value of the image current of N image current input end 21 inputs, eliminated electric current that circulating current output terminal 22 that transistorized deviation caused exports and the reference current of reference current source 4 does not match thereby play.
N current chopping module 3; The output current mirror image that is used for N circulating current output terminal 22 is a N road current source 32, adopts current chopping module 3 can effectively eliminate the electric current of circulating current output terminal 22 outputs in the mirrored procedure and the error between the N road current source 32.
The working method that the present invention improves the circuit of the big currents match degree of multichannel is: current mirror 1 becomes the reference current mirror image of the reference current source 4 of input N image current that equates with the reference current of reference current source 4 and image current is sent into current cycle switching array 2; Current cycle switching array 2 switches the mean value that the electric current that makes each circulating current output terminal 22 output in N clock period is the image current of N image current input end 21 inputs through circulation, and current chopping module 3 becomes N road current source 32 with the current mirror of N circulating current output terminal 22 outputs.
Embodiment (two)
Fig. 4 is the circuit diagram of the current mirror of the present invention's circuit of improving the big currents match degree of multichannel, sees also Fig. 4, and on the basis of the foregoing description, the current mirror that the present invention improves the circuit of the big currents match degree of multichannel comprises:
The drain electrode of one second benchmark PMOS pipe 112 all links to each other with reference current source 4 with grid; The drain electrode of one first benchmark PMOS pipe 111 all links to each other with the source electrode of second benchmark PMOS pipe 112 with grid; N first mirror image PMOS pipe 113 managed 111 cascades with the first benchmark PMOS and is connected, and it is identical that cascade connects the drain current that guarantees N first mirror image PMOS pipe 113; N second mirror image PMOS pipe 114 is total to grid with second benchmark PMOS pipe 112 and is connected; The source electrode of the drain electrode of each first mirror image PMOS pipe 113 and one second mirror image PMOS pipe 114 connects one to one; Because the drain current of N first mirror image PMOS pipe 113 is identical; And N second mirror image PMOS pipe 114 is total to the grid mode with 112 employings of second benchmark PMOS pipe and is connected, and then the electric current of the drain electrode of N second mirror image PMOS pipe 114 is identical; N road image current is exported in the drain electrode of N second mirror image PMOS pipe 114 respectively.
Current mirror 1 becomes N road image current with the reference current mirror image of reference current source 4; Wherein, the PMOS in present embodiment pipe also can adopt NMOS to manage to replace, can play the effect that the reference current mirror image of reference current source 4 is become N road electric current equally.
Embodiment (three)
Fig. 5 is the circuit control on-off circuit figure that the present invention improves the big currents match degree of multichannel; Fig. 6 is the circuit diagram that the present invention improves the circuit control circuit of the big currents match degree of multichannel; Fig. 7 is the sequential chart that the present invention improves the circuit control switch of the big currents match degree of multichannel; See also Fig. 5, Fig. 6, Fig. 7, on the basis of embodiment one, the current switching array that the present invention improves the circuit of the big currents match degree of multichannel comprises:
N image current input end 21 is respectively A1, A2 ... An; N circulating current output terminal 22 is respectively B1, B2 ... Bn; Arbitrary image current input end Am (wherein; 0<m≤n, and m, n are natural number) and between each circulating current output terminal B1 ~ Bn all be connected to a CS Kn, total N2 of CS Kn; Each image current input end Am is all through N CS K1, K2 ... Kn links to each other with N circulating current output terminal B1 ~ Bn, and arbitrary image current input end Am is respectively successively through CS K (n-m+1), K (n-m+2) ... Kn, K1, K2 ... K (n-m) links to each other with N circulating current output terminal B1 ~ Bn.
N d type flip flop: d type flip flop D1, D2, D3 ... Dn; The output terminal of d type flip flop D (n-1) links to each other with the input end 2411 of trigger Dn, and the output terminal of trigger Dn links to each other with the input end 2411 of trigger D1, and wherein N is the integer greater than 1; N d type flip flop D1, D2, D3 ... The time pulse input end pulse 243 input time of Dn; The enable signal of trigger carries out set to trigger D1, to trigger D2 ... Dn carries out zero clearing; N d type flip flop D1, D2, D3 ... The N of a Dn output terminal 2412 is according to the high level of d type flip flop D1 to the order of connection clock period of output of Dn, and every N clock period once circulates.Trigger D1 output terminal 2412 generation K1 switch controlling signals ... Trigger Db output terminal 2412 produces the Kn switch controlling signal, the output high level control control corresponding switch closure of trigger, otherwise CS Kn breaks off; Make a clock in office in the cycle; N CS K1, K2 that arbitrary image current input end 21 connects ... There is a CS closed among the Kn; In the same clock period; Arbitrary circulating current output terminal 22 has and only has an image current input end 21 and its conducting, and in N clock period, arbitrary circulating current output terminal 22 and N image current input end A1, A2 ... Each conducting of An once; After N clock period; The mean value of the electric current of each circulating current output terminal 22 output is identical; Even between N image current input end 21 and N the circulating current output terminal 22 because there is the deviation of electric current in the imbalance between the current mirror 1; But after N clock period, the mean value of the electric current of each circulating current output terminal 22 output is identical.Switch through the circulation of electric current like this and realize that final output average current is uncorrelated with the imbalance between the current mirror 1, thereby the average current of the electric current of the circulating current output terminal of current cycle change-over switch array 2 22 outputs has better matching property.
Embodiment (four)
Fig. 8 is the circuit diagram of the current chopping module of the present invention's circuit of improving the big currents match degree of multichannel; Fig. 9 is two reverse clock signal sequential charts of the present invention's circuit of improving the big currents match degree of multichannel; See also Fig. 8, Fig. 9; On the basis of the foregoing description, the current chopping module that the present invention improves the circuit of the big currents match degree of multichannel comprises:
One chopper amplifier 34, its positive input terminal 342 links to each other with circulating current output terminal 22, a current drives pipe 33; Its grid links to each other with the output terminal 341 of chopper amplifier 34, and source electrode links to each other with the negative input end 343 of chopper amplifier 34, and drain electrode links to each other with current source 32; Wherein, If in embodiment two, adopt be that PMOS manages current drives pipe 33 adopt the NMOS pipe, if what adopt among the embodiment two is the NMOS pipe, then current drives pipe 33 adopts the PMOS pipe; First resistance 35, one of which end ground connection, the other end is connected with chopper amplifier positive input terminal 342; Second resistance 36, one of which end ground connection, the other end is connected with the grid of current drives pipe 33; Current chopping module 3 is a N road current source 32 with the output current mirror image of N circulating current output terminal 22.
Embodiment (five)
Fig. 9 is two reverse clock signal sequential charts of the present invention's circuit of improving the big currents match degree of multichannel; Figure 10 is the circuit structure diagram of the chopper amplifier of the present invention's circuit of improving the big currents match degree of multichannel; See also Fig. 9, Figure 10, the chopper amplifier that the present invention improves the circuit of the big currents match degree of multichannel on the basis of the foregoing description comprises:
The input end of one first single-pole double-throw switch (SPDT) 501 is that two output terminals of positive input terminal 342, the first single-pole double-throw switch (SPDT)s 501 of chopper amplifier 34 are gone into two two input ends that go out amplifier 503 with a pair of respectively and linked to each other;
The input end of one second single-pole double-throw switch (SPDT) 502 is that two output terminals of negative input end 343, the second single-pole double-throw switch (SPDT)s 502 of chopper amplifier 34 are gone into two two input ends that go out amplifier 503 and linked to each other with two respectively;
Can control two input ends and two of chopper amplifier 34 and go into the annexation between two two input ends that go out amplifier 503 through controlling first single-pole double-throw switch (SPDT) 501 and second single-pole double-throw switch (SPDT) 502;
One end of one first change-over switch 505 is gone into two negative output terminals that go out amplifier 503 and is linked to each other with two, and the other end of first change-over switch 505 is the output terminal 341 of chopper amplifier 34;
One end of one second change-over switch 504 is gone into two positive output ends that go out amplifier 503 and is linked to each other with two, and the other end of second change-over switch 504 is the output terminal 341 of chopper amplifier 34;
Can control the output terminal and two of chopper amplifier 34 and go into the annexation between two two output terminals that go out amplifier 503 through controlling first change-over switch 505 and second change-over switch 504;
Two clock signal input terminals are imported two inversion clock signals: first clock signal 371 and second clock signal 372, the first clock signals 371 control first single-pole double-throw switch (SPDT) 501 and first change-over switches 505; Second clock signal 372 control second single-pole double-throw switch (SPDT) 502 and second change-over switches 504.
First clock signal 371 normal phase input end 342 that closed and first single-pole double-throw switch (SPDT) 501 of first change-over switch 505 is connected chopper amplifiers 34 during for high level is gone into two in-phase input ends that go out amplifier 503 with two; Otherwise the inverting input 343 that first change-over switch 505 is broken off and first single-pole double-throw switch (SPDT) 501 is connected chopper amplifiers 34 is gone into two inverting inputs that go out amplifier 503 with two; Second clock signal 372 in-phase input end 342 that closed and second single-pole double-throw switch (SPDT) 502 of second change-over switch 504 is connected chopper amplifiers 34 during for high level is gone into two in-phase input ends that go out amplifier 503 with two; Otherwise; The in-phase input end 342 that second change-over switch 504 is broken off and second single-pole double-throw switch (SPDT) 502 is connected chopper amplifiers 34 is gone into two inverting inputs that go out amplifier 503 with two; It is two when making the clock signal 371 of winning for high level that to go into two negative input ends that go out amplifier 503 be the positive input terminal of chopper amplifier 34; Two to go into two positive input terminals that go out amplifier 503 be the negative input end 343 of chopper amplifier 34, and two to go into two negative output terminals that go out amplifier 503 be the output terminal 341 of chopper amplifier 34; When second clock signal 372 is high level; It is two that to go into two positive input terminals that go out amplifier 503 be the positive input terminal 342 of chopper amplifier 34; Two to go into two negative input ends that go out amplifier 503 be the negative input end 343 of chopper amplifier 34, and two to go into two negative output terminals that go out amplifier 503 be the output terminal 341 of chopper amplifier 34.
Two reverse clock signal input terminals periodically switch two input ends and two build-out resistor (first build-out resistors 35 of chopper amplifier 34; Second build-out resistor 36) annexation; Make positive input terminal 342 input currents of in one-period chopper amplifier 34; And in following one-period, negative input end 343 input currents of chopper amplifier 34 are formulated to two build-out resistors (first build-out resistor 35 periodically respectively with the offset voltage of chopper amplifier 34; Second build-out resistor 36) on; The voltage of two build-out resistors (first build-out resistor, 35, the second build-out resistors 36) is consistent from seeing for a long time, makes the output current of N road circulating current output terminal 22 and the matching degree of said N road current source 32 improve greatly.
Like this at a chopping cycle T ChopIn, 34 two input ends of chopper amplifier have identical average voltage, and magnitude of voltage is:
Figure 851976DEST_PATH_IMAGE001
Like this through receiving the switching of first clock signal 371 and the input and output of second clock signal 372 controls, make the average voltage level of two input ends of chopper amplifier 34 identical.Ratio between the resistance R2 of the resistance R1 of first build-out resistor 35 and second build-out resistor 36 is m, then can obtain current relation formula:
Figure 191DEST_PATH_IMAGE002
Wherein
Figure 2010105298786100002DEST_PATH_IMAGE003
bBe the average current of current chopping module 3 inputs,
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oAverage current for 3 outputs of current chopping module.Final output current is:
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Because electric current
Figure 113095DEST_PATH_IMAGE003
B1~
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BnEquate, so
Figure 710746DEST_PATH_IMAGE003
O1~
Figure 468618DEST_PATH_IMAGE003
OnAlso equate.So the coupling of final output current is not influenced by the input imbalance of imbalance of PMOS electric current and amplifier, thereby reaches output current better matching effect.
Circuit two that the present invention improves the big currents match degree of multichannel on the basis of the foregoing description go into twoly to go out amplifier and have offset voltage; The value of offset voltage is Voff; When second clock signal 372 is high level, two high Voff of voltage that go into the voltage ratio negative input end of two positive input terminals that go out amplifier 503; When first clock signal 371 is high level; Two high Voff of voltage that go into the voltage ratio positive input terminal of two negative input ends that go out amplifier 503; The offset voltage that can draw chopper amplifier 34 is formulated to two build-out resistors (first build-out resistor 35 periodically respectively; Second build-out resistor 36) on; The voltage of two build-out resistors (first build-out resistor, 35, the second build-out resistors 36) is consistent from seeing for a long time, has realized that the output current of N circulating current output terminal 22 and the coupling of N road current source 32 can not receive the influence that the amplifier input is lacked of proper care.
In sum; The present invention improve the big currents match degree of multichannel circuit for eliminating in the prior art because the deviation between the transistor, provides a kind of to the influence that matching precision caused that little current mirror output current is switched to eliminate process deviation between the transistor to the circuit of the influence that matching degree was caused through loop cycle.
The foregoing description provides to those of ordinary skills and realizes or use of the present invention; Those of ordinary skills can be under the situation that does not break away from invention thought of the present invention; The foregoing description is made various modifications or variation; Thereby protection scope of the present invention do not limit by the foregoing description, and should be the maximum magnitude that meets the innovation new feature that claims mention.

Claims (7)

1. a circuit that improves the big currents match degree of multichannel is characterized in that, comprising:
One current mirror is used for the reference current mirror image is become N image current that equates with said reference current, and wherein, N is the integer greater than 1;
One current cycle switching array; Have N image current input end and N circulating current output terminal; Each image current input end is corresponding one by one with each said image current, and all is connected to a CS between each said image current input end and each the said circulating current output terminal;
One current chopping module, the output current mirror image that is used for said N circulating current output terminal is a N road current source.
2. the circuit of the big currents match degree of raising multichannel according to claim 1 is characterized in that said current mirror comprises:
The drain electrode of one second benchmark PMOS pipe all links to each other with said reference current input end with grid;
The drain electrode of one first benchmark PMOS pipe all links to each other with the source electrode of said second benchmark PMOS pipe with grid;
N first mirror image PMOS pipe is connected with said first benchmark PMOS pipe cascade;
N second mirror image PMOS pipe is total to grid with said second benchmark PMOS pipe and is connected;
The source electrode of the drain electrode of said each first mirror image PMOS pipe and said second a mirror image PMOS pipe connects one to one;
N road image current is exported in the drain electrode of said N second mirror image PMOS pipe respectively.
3. the circuit of the big currents match degree of raising multichannel according to claim 1 is characterized in that, said current cycle switching array:
A clock in office is in the cycle; There is a CS closed in N the CS that arbitrary said image current input end connects; In the same clock period; Arbitrary said circulating current output terminal has and only has said image current input end and its conducting, and in N clock period, arbitrary said circulating current output terminal and said N each conducting of image current input end once.
4. the circuit of the big currents match degree of raising multichannel according to claim 1 is characterized in that, said current chopping module comprises:
One chopper amplifier, its positive input terminal links to each other with said circulating current output terminal;
One current drives pipe, its grid links to each other with the output terminal of said chopper amplifier, and source electrode links to each other with the negative input end of said chopper amplifier, drains to be the output terminal of said current source;
First resistance, one of which end ground connection, the other end is connected with said chopper amplifier positive input terminal;
Second resistance, one of which end ground connection, the other end is connected with the grid of said current drives pipe.
5. the circuit of the big currents match degree of raising multichannel according to claim 4 is characterized in that said chopper amplifier comprises:
The input end of one first single-pole double-throw switch (SPDT) is the positive input terminal of said chopper amplifier, and two output terminals of said first single-pole double-throw switch (SPDT) are gone into pair two input ends that go out amplifier with a pair of respectively and linked to each other;
The input end of one second single-pole double-throw switch (SPDT) is the negative input end of said chopper amplifier, and two output terminals of said second single-pole double-throw switch (SPDT) two gone into two two input ends that go out amplifier and linked to each other with said respectively;
One end of one first change-over switch two gone into two negative output terminals that go out amplifier and is linked to each other with said, and the other end of said first change-over switch is the output terminal of said chopper amplifier;
One end of one second change-over switch two gone into two positive output ends that go out amplifier and is linked to each other with said, and the other end of said second change-over switch is the output terminal of said chopper amplifier;
Two clock signal input terminals are imported two inversion clock signals: first clock signal and second clock signal, and said first clock signal is controlled said first single-pole double-throw switch (SPDT) and first change-over switch; Said second single-pole double-throw switch (SPDT) of said second clock signal controlling and said second change-over switch.
6. follow the circuit of the big currents match degree of the described raising multichannel of claim 5; It is characterized in that; The inverting input that closed and first single-pole double-throw switch (SPDT) of first change-over switch was connected said chopper amplifier when said first clock signal was high level and said two pair in-phase input ends that go out amplifier of going into; Otherwise, the inverting input that first change-over switch is broken off and first single-pole double-throw switch (SPDT) is connected said chopper amplifier and said two pair inverting inputs that go out amplifier of going into; The in-phase input end that closed and second single-pole double-throw switch (SPDT) of second change-over switch was connected said chopper amplifier when said second clock signal was high level and said two pair in-phase input ends that go out amplifier of going into; Otherwise, the in-phase input end that second change-over switch is broken off and second single-pole double-throw switch (SPDT) is connected said chopper amplifier and said two pair inverting inputs that go out amplifier of going into.
7. the circuit of the big currents match degree of raising multichannel according to claim 6; It is characterized in that; Saidly two go into twoly to go out amplifier and have offset voltage; The value of said offset voltage is Voff, when the second clock signal is high level, goes into couple high Voff of voltage of the voltage ratio negative input end of the positive input terminal that goes out amplifier for said pair; When first clock signal is high level, go into couple high Voff of voltage of the voltage ratio positive input terminal of the negative input end that goes out amplifier for said pair.
CN201010529878.6A 2010-11-03 2010-11-03 Improve the circuit of multichannel big current matching degree Active CN102455732B (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102938952A (en) * 2012-07-18 2013-02-20 上海新进半导体制造有限公司 Current setting circuit of a plurality of light-emitting diode (LED) strings and method thereof
CN107390766A (en) * 2017-07-31 2017-11-24 西安矽力杰半导体技术有限公司 Current mirror circuit
CN111781986A (en) * 2020-06-09 2020-10-16 珠海博雅科技有限公司 Current mirror, current copying method and electronic equipment
CN112394765A (en) * 2019-08-19 2021-02-23 珠海格力电器股份有限公司 Current source circuit and control device
CN112506264A (en) * 2019-09-13 2021-03-16 美国亚德诺半导体公司 Current mirror arrangement with double-base current circulator
CN112558681A (en) * 2019-09-25 2021-03-26 圣邦微电子(北京)股份有限公司 Current source circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101556481A (en) * 2009-05-05 2009-10-14 中国科学院上海微系统与信息技术研究所 Precisely matched image current source circuit
US20090268492A1 (en) * 2005-04-26 2009-10-29 Rohm Co., Ltd. Switching Regulator and Electronic Device Therewith

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090268492A1 (en) * 2005-04-26 2009-10-29 Rohm Co., Ltd. Switching Regulator and Electronic Device Therewith
CN101556481A (en) * 2009-05-05 2009-10-14 中国科学院上海微系统与信息技术研究所 Precisely matched image current source circuit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102938952A (en) * 2012-07-18 2013-02-20 上海新进半导体制造有限公司 Current setting circuit of a plurality of light-emitting diode (LED) strings and method thereof
CN107390766A (en) * 2017-07-31 2017-11-24 西安矽力杰半导体技术有限公司 Current mirror circuit
CN112394765A (en) * 2019-08-19 2021-02-23 珠海格力电器股份有限公司 Current source circuit and control device
CN112506264A (en) * 2019-09-13 2021-03-16 美国亚德诺半导体公司 Current mirror arrangement with double-base current circulator
CN112506264B (en) * 2019-09-13 2022-10-04 美国亚德诺半导体公司 Current mirror arrangement with double-base current circulator
CN112558681A (en) * 2019-09-25 2021-03-26 圣邦微电子(北京)股份有限公司 Current source circuit
CN112558681B (en) * 2019-09-25 2022-10-14 圣邦微电子(北京)股份有限公司 Current source circuit
CN111781986A (en) * 2020-06-09 2020-10-16 珠海博雅科技有限公司 Current mirror, current copying method and electronic equipment

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