CN102447015A

CN102447015A - Vertical structural light emitting diode (LED)

Info

Publication number: CN102447015A
Application number: CN2010105028950A
Authority: CN
Inventors: 陈祖辉
Original assignee: Individual
Current assignee: Individual
Priority date: 2010-10-01
Filing date: 2010-10-01
Publication date: 2012-05-09
Anticipated expiration: 2030-10-01
Also published as: CN102447015B

Abstract

The invention provides a structure and a method of a vertical structural light emitting diode (LED). The structure is characterized in that: 1, a multilayer metal is used as a supporting substrate of an epitaxial layer in a chip, wherein the multilayer metal is used for thermal conduction and electric conduction; 2, the multilayer metal serving as the supporting substrate is grown by an evaporation, sputtering or electroplating method; and 3, the metal layer serving as the supporting substrate consists of multilayer metal.

Description

A kind of light emitting diode with vertical structure

Technical field

The present invention relates to the device architecture and the manufacture method of a kind of light emitting diode with vertical structure chip (LED), relate in particular to a kind of light-emitting diode chip for backlight unit manufacture method of substrate displacement, with the relatively poor Sapphire Substrate of metal substrate replacement thermal conductivity of high-termal conductivity.This device architecture helps strengthening the heat-sinking capability of light-emitting diode chip for backlight unit, can improve chip reliability simultaneously, also can on N face GaN, make the roughening exiting surface on the other hand, helps to increase chip light-emitting efficiency.

Background technology

Adopt the common manufacture method of light emitting diode with vertical structure of substrate replacement technique to be: successively at epitaxial layer of gallium nitride surface deposition contact layer metal, reflector layer metal, barrier metal; Plated metal scolder then; With the heat-conducting substrate bonding that deposits contacting metal and brazing metal (Wafer bonding), the normally used brazing metal of bonding is a gold-tin alloy again.Adopt laser lift-off technique that epitaxial loayer is separated with Sapphire Substrate afterwards, epitaxial loayer is transferred on the heat-conducting substrate, and the heat dispersion of light-emitting diode chip for backlight unit can be better like this.Figure the-1st, the light emitting diode (LED) chip with vertical structure sketch map of employing substrate bonding.1 is metal electrode among the figure, the 2nd, and GaN epitaxial loayer, the 3rd, contact, reflector layer, the 4th, brazing metal, the 5th, thermal conductive substrate, the 6th, back of the body gold layer.

Adopt the substrate bonding techniques to separate sapphire and epitaxial loayer with laser lift-off technique; There are two subject matters in the displacement of realization substrate: the one, and temperature need reach the eutectic point of brazing metal in the substrate bonding process, for golden tin solder; 283 ℃ of eutectic temperatures; This will the differentiate hot substrate except having good thermal conductivity, also close with the thermal coefficient of expansion of epitaxial layer of gallium nitride, Sapphire Substrate, to reduce the influence of thermal stress.Available material has thermal conductive ceramic, copper-tungsten, molybdenum-copper etc., and uses these materials can directly cause the chip manufacture cost to increase.The 2nd, substrate bonding technology window is narrower, and process conditions control is had relatively high expectations, and occurs sometimes behind the bonding that epitaxial loayer breaks or the phenomenon of disk warpage, thereby influences the rate of finished products behind the laser lift-off.

Make the problem that light emitting diode (LED) chip with vertical structure exists in order to overcome substrate bonding techniques and laser lift-off technique, the present invention proposes a kind of scheme that adopts deposit metal films, and the preparation metal heat-conducting substrate realizes that the method for substrate-transfer is made light emitting diode (LED) chip with vertical structure.

Summary of the invention

The objective of the invention is to propose a kind of vertical stratification LED manufacturing approach, avoid substrate key technology, close and reduce sapphire and epitaxial loayer separation processes cost, under the prerequisite that does not influence device performance, improve rate of finished products.

For realizing above purpose; Technical scheme of the present invention provides a kind of vertical stratification LED manufacturing approach; After the epitaxy of gallium nitride laminar surface deposits contact layer metal, reflector layer metal, barrier metal successively, adopt evaporation, perhaps sputter; Perhaps electric plating method deposition one deck or multiple layer metal are as heat sink substrate; Make its thickness, intensity be enough to support epitaxial layer of gallium nitride, through mechanical lapping or laser lift-off technique Sapphire Substrate is removed then, make heat sink substrate become the new support substrates of epitaxial layer of gallium nitride.Below be example with the evaporation scheme, its method is: at first, plated metal contact, reflector layer on epitaxial layer of gallium nitride; Vapor deposition 1～5um metal barrier again, hydatogenesis one deck thermal conductivity good metal then deposits the not bigger metal of this hardness of one deck like metals such as copper, silver then; Like metals such as chromium, tungsten; Like this alternating deposit makes final thickness in the end between 150～500um, again vapor deposition back of the body gold layer.Secondly, Sapphire Substrate is removed, made the electroplated metal layer become the new substrate of epitaxial loayer through mechanical grinding method or laser lift-off technique.Removing on the epitaxial loayer of Sapphire Substrate through photoetching, wet etching, dry etching then, the epitaxial loayer street is being carved pass through, making epitaxial layer of gallium nitride become discrete tube core unit, making N electrode and passivation layer on this basis to metal level.It is characterized in that, one, through the metal heat-conducting substrate through electric plating method growth, avoided the thermal stress factor in the wafer bonding process.Two, the chip unit production process carries out after substrate-transfer is accomplished.Such device architecture helps obviously reducing the technology cost.

Embodiment

Below in conjunction with accompanying drawing and embodiment the present invention is described further.

1. on epitaxial layer of gallium nitride, do metal reflective, contact layer and metal barrier.The method depositing silver film that adopts evaporation or sputter is as reflective contact layer, then on this basis evaporation or sputter deposit refractory metal or alloy as the barrier layer, like tungsten, tungsten alloy, molybdenum, molybdenum alloy etc.Figure the-2nd, epitaxial wafer disk schematic cross-section behind deposition contact reflector layer and the barrier layer.7 is barrier metals among the figure; The 8th, contact, reflector layer; The 9th, epitaxial layer of gallium nitride; The 10th, Sapphire Substrate.

2. evaporation plating (?) metal of deposition one deck high-termal conductivity, like copper or this metalloid of silver, also can be their alloy, thickness is in 50～300um scope.Figure the-3rd, epitaxial wafer disk schematic cross-section behind the deposition high-termal conductivity metal level.11 is copper or silver among the figure.

3. the mode with evaporation or sputter deposits not this hard metal of a floor height on electrodeposited coating; Like chromium or WTi alloy; Typical thickness 2～5um, mechanical strength and elimination membrane stress to improve metal substrate also play the effect of the whole metal substrate thermal coefficient of expansion of adjustment simultaneously.Repeat the technology in 2 then, deposit not this hard metal of a floor height afterwards again, so alternately; Between 150～500um, deposit one deck gold at last, as the gross thickness of metal substrate as protective layer; Also as the P type electrode of chip, its typical thickness is at 0.2～1um simultaneously.Figure the-4th, epitaxial wafer disk schematic cross-section behind the preparation metal substrate.12 is chromium layers among the figure, the 13rd, and back of the body gold layer.

4. remove Sapphire Substrate.Adopt the method for laser lift-off technique or mechanical lapping to remove Sapphire Substrate, after the removal Sapphire Substrate, epitaxial layer of gallium nitride is new support substrates with the multiple layer metal of

step

1,2,3 depositions.Figure the-5th, epitaxial wafer disk schematic cross-section after the removal Sapphire Substrate.7 is barrier metals among the figure, the 8th, and contact, reflector layer, the 9th, epitaxial layer of gallium nitride, the 11st, copper or silver, the 12nd, chromium layer, the 13rd, back of the body gold layer.

5. through technologies such as photoetching, wet etching, dry etchings, remove the epitaxial layer of gallium nitride on the scribe line, make epitaxial layer of gallium nitride become discrete tube core unit.Figure the-6th, schematic cross-section after the corrosion scribe line.

6. adopting dry etching or wet etching method, also can be the method that dry etching and wet etching combine, and with the epitaxial loayer attenuate, up to exposing heavily doped n type gallium nitride layer, and obtains shaggy n type gallium nitride.Figure the-7th, the epitaxial loayer of surface roughening

7. utilize photoetching, vapor deposition, stripping technology at n type gallium nitride surface manufacturing n electrode, heat-conducting metal is as p type electrode.Figure the-8th, preparation n electrode on the epitaxial loayer.14 is n electrodes among the figure.

8. the disk surfaces deposit passivation layer in 7, passivation layer are used a kind of in the materials such as silicon dioxide, silicon nitride or silicon oxynitride or several usually, and deposition process can be sputter, evaporation or chemical vapour deposition (CVD) etc.Be total to technology at passivation layer uplifting window mouth through photoetching, etching, cleaning etc. then, make chip edge be passivated layer and cover, expose electrode and exiting surface.Figure the-9th, the epitaxial loayer behind the preparation passivation layer.15 is passivation layers among the figure.

9. scribing, separation tube core are shown in figure-10.

Though described example of the present invention through above-mentioned example, they are illustrative.In fact,, can also carry out various forms of modifications, like order adjustment between some operations etc. to it under the condition of the principle of the invention.In addition, scope of the present invention is limited appended claims.

Claims

1. the manufacturing approach of a light emitting diode with vertical structure is characterized in that:

1, remove Sapphire Substrate, begin to carry out the chip unit manufacture craft after the substrate displacement is accomplished, several principal characters are:

1) epitaxial wafer had deposited reflective, contact layer metallic film before the substrate displacement.

2) on the epitaxial wafer behind reflective, the contact layer metallic film of deposition, with refractory metal such as tungsten, tungsten alloy, molybdenum, molybdenum alloy or alloy as the barrier layer.

3) making of the passivation layer of chip is after the substrate displacement.

2, be used to replace sapphire thermal conductive substrate by the good copper of heat conductivility, silver and not the metallic multilayer of this extreme hardness alternately form.

3, thermal conductive substrate is formed by the combined deposition growth of evaporating, this several method is perhaps electroplated in sputter.

2. a light emitting diode with vertical structure structure is characterized in that, epitaxial layer of gallium nitride is substrate with the multiple layer metal, and this substrate also is the P type electrode of light-emitting diode, and the n type gallium nitride surface of roughening is an exiting surface.

3. manufacture method of the present invention is applicable to that gallium nitride is blue, the green light LED chip manufacturing.Also be fit to reddish yellow light, ultraviolet, the manufacturing of deep ultraviolet led chip simultaneously.