CN102437037A - Method for effectively reducing water mark defects - Google Patents

Method for effectively reducing water mark defects Download PDF

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Publication number
CN102437037A
CN102437037A CN2011102653225A CN201110265322A CN102437037A CN 102437037 A CN102437037 A CN 102437037A CN 2011102653225 A CN2011102653225 A CN 2011102653225A CN 201110265322 A CN201110265322 A CN 201110265322A CN 102437037 A CN102437037 A CN 102437037A
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Prior art keywords
wafer
etching
cleaning
washmarking
wet
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CN2011102653225A
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CN102437037B (en
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徐友峰
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Shanghai Huali Microelectronics Corp
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Shanghai Huali Microelectronics Corp
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Abstract

The invention discloses a method for effectively reducing water mark defects, which is used for the cleaning process in the process that wafers form double polysilicon gates. After the wafer annealing, the cleaning process is firstly carried out before the tungsten metal silicide deposition. The method is characterized in that the cleaning process comprises the following steps that: the wafers are fed into a wet type etching cleaning system; the wafers are etched in a wet process for removing organic matters and microparticles, and then, the wafers are subjected to drying treatment so that the wafer surface is the hydrophilic surface for reducing the water mark defect formation; and an oxidation layer of the crystal surface is removed through the dry process etching , and the water mark residue is avoided.

Description

A kind of method of effective minimizing washmarking defective
Technical field
The present invention relates to the etching field of semiconductor wafer, in particular to a kind of method of effective minimizing washmarking defective.
Background technology
Some memory devices need be used Dual Poly Gate (dual poly grid) processing procedure, in the prior art, inject formation P type Poly with the B ion earlier; Inject to form N type Poly with the P ion again, then with reference to figure 1, accomplished the step that above-mentioned ion injects after; Carry out step S210: (annealing here is meant Post-Implant Anneal in annealing; Abbreviation PIA), execution in step S211 again: manufacturing process for cleaning (Clean Split), wherein; Step S211 generally carries out on the board of Wet-type etching purging system (WET bench), with etch buffer liquid or hydrofluoric acid treatment ending.Follow execution in step S212: tungsten metal silicide deposit (WSix deposition).Because Dual Poly Gate (dual poly grid) processing procedure is a prior art, the present invention does not relate to other steps, therefore gives unnecessary details no longer in detail at this.
To above-mentioned these steps; The existing defective of Dual Poly Gate making technology of prior art is; Because N type and P type Poly are after etch buffer liquid or hydrofluoric acid treatment, the hydrophobicity on surface is different, is prone to form zonal washmarking defective in the subsequent drying process.
Therefore, be necessary to provide a kind of new process to reduce the washmarking that generates on the wafer behind the Dual Poly Gate processing procedure in the prior art and just seem particularly important.
Summary of the invention
The objective of the invention is to reduce the formation of the washmarking defective of wafer surface, combine conventional process techniques simultaneously, do not increase too much operation, to avoid increasing unnecessary cost.
Defective to prior art; The present invention discloses a kind of method of effective minimizing washmarking defective; Be used for the cleaning of wafer, after wafer annealing (anneal), before the deposit of carrying out the tungsten metal silicide, carry out said cleaning earlier in the process that forms the dual poly grid; Wherein, said cleaning comprises the steps:
Said wafer is sent in the Wet-type etching purging system;
The said wafer of wet etching carries out dried to said wafer again to remove organic substance and particulate, and making said wafer surface is hydrophilic surface, to reduce the formation of washmarking defective;
Dry etching is removed the oxide layer of said wafer surface, and is residual to avoid washmarking.
Above-mentioned method, wherein, the step of the said wafer of said wet etching comprises:
Clean said wafer to remove organic substance with cleaning solution S PM (H2SO4:H2O2) earlier;
Clean said wafer with etching solution then;
Clean said wafer to remove particulate and organic substance with cleaning solution A PM (NH4OH:H2O2:H2O) again.
Above-mentioned method, wherein, said etching solution is a hydrofluoric acid.
Above-mentioned method, wherein, said etching solution is the buffering etching solution that comprises ammonium fluoride and hydrofluoric acid, said ammonium fluoride is as buffer.
Above-mentioned method, wherein, said dry etching is removed in the step of wafer surface oxide layer, comprising:
To wafer surface injection ammonia and hydrofluoric steam, make the silicon dioxde reaction of itself and wafer surface, generate ammonium fluosilicate thus;
Improve temperature and make said ammonium fluosilicate volatilization.
Above-mentioned method, wherein, in the step that generates ammonium fluosilicate, temperature range is between 20 degree Celsius to 40 degree Celsius.
Above-mentioned method wherein, makes in the step of ammonium fluosilicate volatilization in the raising temperature, and temperature is increased between 100 to 200 degree Celsius.
Above-mentioned method, wherein, said wafer is the wafer that is used to make memory device.
The inventive method is to the washmarking defective, uses wet etching earlier, adopts dry etching to remove oxide layer again, compares with wet etching with in the prior art, can not produce the washmarking defective.
Description of drawings
Through reading the detailed description of non-limiting example being done with reference to following accompanying drawing, it is more obvious that the present invention and characteristic thereof, profile and advantage will become.Mark identical in whole accompanying drawings is indicated identical part.Painstakingly proportionally do not draw accompanying drawing, focus on illustrating purport of the present invention.In the accompanying drawings, for cheer and bright, the part parts have been amplified.
Fig. 1 shows according to prior art, a kind of dual poly grid processing procedure flow diagram of portions;
Fig. 2 shows according to of the present invention, generates the sketch map of ammonium fluosilicate in a kind of method of effective minimizing washmarking defective in the wafer surface of drying; And
Fig. 3 shows according to of the present invention, removes ammonium fluosilicate in a kind of method of effective minimizing washmarking defective to avoid producing the sketch map of washmarking.
Indicate the chemical formula of portion gas in the accompanying drawing, but do not indicated all reactants fully, specifically can combine following embodiment to understand.
Embodiment
Below in conjunction with accompanying drawing and embodiment the present invention is further elaborated.Embodiment described herein only is used to explain the present invention, and is not used in qualification protection scope of the present invention.
Before adopting method of the present invention, earlier according to prior art Dual Poly Gate (dual poly grid) fabrication process wafer,, adopt method of the present invention to carry out cleaning carrying out to the step of wafer annealing, said cleaning comprises the steps:
Said wafer is sent in the Wet-type etching purging system, in order to wafer is carried out follow-up wet etching process; Then with the said wafer of wet etching to remove organic substance and particulate, more said wafer is carried out dried, making said wafer surface is hydrophilic surface, with the formation of reduction washmarking defective; Remove the oxide layer of said plane of crystal again with dry etching, residual to avoid washmarking.
In a specific embodiment, the step of the said wafer of above-mentioned wet etching comprises:
Earlier clean said wafer removing organic substance with cleaning solution S PM (H2SO4:H2O2), the strong oxidizing property of the mixed liquor through H2SO4 and H2O2 is destroyed organic hydrocarbon key; Clean said wafer with etching solution then; Clean said wafer to remove particulate and organic substance with cleaning solution A PM (NH4OH:H2O2:H2O) again; This step mainly is to utilize the alkalescent of NH4OH to remove the particulate of wafer surface; Wherein, the ratio of H2SO4 and H2O2, the ratio of NH4OH, H2O2 and H2O is proportioning as required; Those skilled in the art can combine existing techniques in realizing, do not repeat them here.
In a preference, said etching solution is a hydrofluoric acid.
In a variant, said etching solution is the buffering etching solution that comprises ammonium fluoride and hydrofluoric acid, and said ammonium fluoride is as buffer.
Further,, remove in the step of wafer surface oxide layer, comprising at said dry etching in conjunction with Fig. 2 and Fig. 3:
Earlier with ammonia and hydrofluoric vapor injection to wafer surface, make the silicon dioxde reaction of itself and wafer surface, generate ammonium fluosilicate thus.Preferably, in this step, temperature range is controlled between 20 degree Celsius to 40 degree Celsius.In Fig. 2; On the device 102 in cavity 100, a wafers 2 is arranged, water filling 103 in the device 102; With stable temperature; Temperature is controlled between 20 degree Celsius, 40 degree extremely Celsius, and the steam of ammonia (NH3) and hydrogen fluoride (HF) injects from two pipelines, thus and the silicon dioxide on wafer 2 surfaces (being sign among Fig. 2) reaction generation accessory substance ammonium fluosilicate (NH4) 2SiF6 (indicating among Fig. 2).
Improve temperature again and make said ammonium fluosilicate (NH4) 2SiF6 (not indicating among Fig. 3) volatilization.Preferably, in this step, temperature is increased between 100 to 200 degree Celsius.Among Fig. 3, wafer 2 is positioned on the device 104 of another cavity 101, and with heater 105 heating, thereby the effect of silicon dioxide on the wafer 2 is removed in realization.
Further, said wafer 2 is particularly useful for Dual Poly Gate processing procedure for being used to make the wafer of memory device.
Accomplished above-mentioned institute in steps after, according to prior art Dual Poly Gate (dual poly grid) processing procedure, carry out the subsequent step of cleaning, carry out the deposit of tungsten metal silicide.
It should be appreciated by those skilled in the art that those skilled in the art combine prior art and the foregoing description can realize said variant, such variant does not influence flesh and blood of the present invention, does not repeat them here.
More than preferred embodiment of the present invention is described.It will be appreciated that the present invention is not limited to above-mentioned specific implementations, equipment of wherein not describing in detail to the greatest extent and structure are construed as with the common mode in this area to be implemented; Any those of ordinary skill in the art; Do not breaking away under the technical scheme scope situation of the present invention; All the method for above-mentioned announcement capable of using and technology contents are made many possible changes and modification to technical scheme of the present invention; Or being revised as the equivalent embodiment of equivalent variations, this does not influence flesh and blood of the present invention.Therefore, every content that does not break away from technical scheme of the present invention, all still belongs in the scope of technical scheme protection of the present invention any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.

Claims (8)

1. method that effectively reduces the washmarking defective; Be used for the cleaning of wafer in the process that forms the dual poly grid; After wafer annealing (anneal); Before the deposit of carrying out the tungsten metal silicide, carry out said cleaning earlier, it is characterized in that said cleaning comprises the steps:
Said wafer is sent in the Wet-type etching purging system;
The said wafer of wet etching carries out dried to said wafer again to remove organic substance and particulate, and making said wafer surface is hydrophilic surface, to reduce the formation of washmarking defective;
Dry etching is removed the oxide layer of said plane of crystal, and is residual to avoid washmarking.
2. the method for claim 1 is characterized in that, the step of the said wafer of said wet etching comprises:
Clean said wafer to remove organic substance with cleaning solution S PM (H2SO4:H2O2) earlier;
Clean said wafer with etching solution then;
Clean said wafer to remove particulate and organic substance with cleaning solution A PM (NH4OH:H2O2:H2O) again.
3. method as claimed in claim 2 is characterized in that, said etching solution is a hydrofluoric acid.
4. method as claimed in claim 2 is characterized in that, said etching solution is the buffering etching solution that comprises ammonium fluoride and hydrofluoric acid, and said ammonium fluoride is as buffer.
5. the method for claim 1 is characterized in that, said dry etching is removed in the step of plane of crystal oxide layer, comprising:
Ammonia and hydrofluoric vapor injection to wafer surface, are made the silicon dioxde reaction of itself and wafer surface, generate ammonium fluosilicate thus;
Improve temperature and make said ammonium fluosilicate volatilization.
6. method as claimed in claim 5 is characterized in that, in the step that generates ammonium fluosilicate, range of reaction temperature is between 20 degree Celsius to 40 degree Celsius.
7. method as claimed in claim 5 is characterized in that, makes in the step of ammonium fluosilicate volatilization in the raising temperature, and temperature is increased between 100 to 200 degree Celsius.
8. like any described method in the claim 1 to 7, it is characterized in that said wafer is the wafer that is used to make memory device.
CN201110265322.5A 2011-09-08 2011-09-08 Method for effectively reducing water mark defects Active CN102437037B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106206597A (en) * 2016-07-27 2016-12-07 上海华虹宏力半导体制造有限公司 Avoid method and Split-gate flash memory manufacture method that etching polysilicon remains
CN109950148A (en) * 2017-12-20 2019-06-28 中芯国际集成电路制造(上海)有限公司 A kind of manufacturing method of semiconductor devices

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6537876B2 (en) * 2000-03-07 2003-03-25 Samsung Electronics Co., Ltd. Method of manufacturing a semiconductor capacitor having a hemispherical grain layer using a dry cleaning process
CN101079376A (en) * 2006-05-22 2007-11-28 中芯国际集成电路制造(上海)有限公司 Making method for semiconductor part
CN101454876A (en) * 2006-03-28 2009-06-10 东京毅力科创株式会社 Method for removing damaged dielectric material
CN101740379A (en) * 2008-11-27 2010-06-16 中芯国际集成电路制造(上海)有限公司 Method for eliminating surface defect of semiconductor device and semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6537876B2 (en) * 2000-03-07 2003-03-25 Samsung Electronics Co., Ltd. Method of manufacturing a semiconductor capacitor having a hemispherical grain layer using a dry cleaning process
CN101454876A (en) * 2006-03-28 2009-06-10 东京毅力科创株式会社 Method for removing damaged dielectric material
CN101079376A (en) * 2006-05-22 2007-11-28 中芯国际集成电路制造(上海)有限公司 Making method for semiconductor part
CN101740379A (en) * 2008-11-27 2010-06-16 中芯国际集成电路制造(上海)有限公司 Method for eliminating surface defect of semiconductor device and semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106206597A (en) * 2016-07-27 2016-12-07 上海华虹宏力半导体制造有限公司 Avoid method and Split-gate flash memory manufacture method that etching polysilicon remains
CN106206597B (en) * 2016-07-27 2019-06-28 上海华虹宏力半导体制造有限公司 Avoid the remaining method of etching polysilicon and Split-gate flash memory manufacturing method
CN109950148A (en) * 2017-12-20 2019-06-28 中芯国际集成电路制造(上海)有限公司 A kind of manufacturing method of semiconductor devices

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