CN108074803B - Semiconductor structure and forming method thereof - Google Patents
Semiconductor structure and forming method thereof Download PDFInfo
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- CN108074803B CN108074803B CN201611018521.5A CN201611018521A CN108074803B CN 108074803 B CN108074803 B CN 108074803B CN 201611018521 A CN201611018521 A CN 201611018521A CN 108074803 B CN108074803 B CN 108074803B
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
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- H01L21/28158—Making the insulator
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- H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
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- H01L21/28211—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
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Abstract
A semiconductor structure and a method of forming the same, comprising: providing a substrate; forming an oxide layer on the substrate; carrying out oxidation treatment on the surface of the oxidation layer; and patterning the oxidized layer subjected to oxidation treatment to remove part of the oxidized layer. According to the technical scheme, after the oxide layer is formed, oxidation treatment is carried out on the surface of the oxide layer, so that residues on the surface of the oxide layer are removed, the influence of the residues on the subsequent process is reduced, the generation of defects in the patterning process of the oxide layer is reduced, and the yield of the formed semiconductor structure is improved.
Description
Technical Field
The present invention relates to the field of semiconductor manufacturing, and more particularly, to a semiconductor structure and a method for forming the same.
Background
With the continuous development of integrated circuit manufacturing technology, semiconductor devices are being developed toward higher element density and higher integration. The geometry of semiconductor devices continues to shrink in size following moore's law. As the most basic semiconductor device, the size of a transistor decreases as the size of the semiconductor device decreases.
As semiconductor device dimensions are reduced to a certain extent, various secondary effects due to the physical limitations of semiconductor devices continue to emerge, and scaling down of feature sizes of semiconductor devices becomes increasingly difficult. Among them, the reduction in size of a transistor causes problems such as an increase in leakage current and a reduction in saturation current, thereby causing deterioration in transistor performance.
For the degradation of the transistor performance, one current solution is to use a high-K gate dielectric material to replace the conventional silicon dioxide gate dielectric material and use metal as the gate electrode to avoid the fermi level pinning effect and the boron penetration effect between the high-K material and the conventional gate electrode material. The introduction of the high-K metal gate reduces the leakage current of the semiconductor device.
However, in the prior art, the semiconductor structure with the introduced high-K metal gate often has the problems of more defects and lower yield.
Disclosure of Invention
The invention provides a semiconductor structure and a forming method thereof, which aims to reduce defects and improve yield.
To solve the above problems, the present invention provides a method for forming a semiconductor structure, comprising:
providing a substrate; forming an oxide layer on the substrate; carrying out oxidation treatment on the surface of the oxidation layer; and patterning the oxidized layer subjected to oxidation treatment to remove part of the oxidized layer.
Optionally, the step of performing an oxidation treatment comprises: and carrying out oxidation treatment on the surface of the oxidation layer by using an ozone solution.
Optionally, in the step of performing the oxidation treatment by using the ozone solution, the concentration of the ozone solution is in a range of 30 to 80% by mole percentage.
Alternatively, in the step of performing the oxidation treatment by the ozone solution, the time of the oxidation treatment is in the range of 20 seconds to 2 minutes.
Optionally, the step of performing an oxidation treatment comprises: and carrying out the oxidation treatment on the surface of the oxidation layer in an oxygen annealing mode.
Optionally, in the step of performing the oxidation treatment by oxygen annealing, the oxygen flow rate is in a range from 0.8slm to 1.0 slm.
Optionally, in the step of performing the oxidation treatment by oxygen annealing, the annealing temperature is in the range of 1000 ℃ to 1200 ℃ and the annealing time is in the range of 15s to 40 s.
Optionally, the step of forming the oxide layer includes: the oxide layer is formed by an in-situ water vapor generation process.
Optionally, the step of patterning the oxide layer includes: forming a patterned photoresist layer on the oxidized layer subjected to the oxidation treatment, wherein part of the oxidized layer is exposed out of the photoresist layer; removing the exposed part of the oxide layer of the photoresist layer; and removing the photoresist layer to expose the residual oxide layer.
Optionally, the step of removing part of the oxide layer includes: and removing part of the oxide layer by means of wet etching.
Optionally, in the step of removing a part of the oxide layer by wet etching, the etching solution is hydrofluoric acid.
Optionally, the step of removing the photoresist layer includes: and removing the photoresist layer by a wet cleaning mode.
Optionally, in the step of removing the photoresist layer by wet cleaning, the cleaning solution is a mixed solution of sulfuric acid and hydrogen peroxide.
Optionally, the step of forming a patterned photoresist layer includes: coating an adhesive on the oxidized layer subjected to the oxidation treatment; coating photoresist on the oxide layer with the surface coated with the adhesive; and patterning the photoresist to expose part of the oxide layer.
Optionally, in the step of applying the adhesive, a material of the adhesive is hexamethyldisilazane.
Optionally, in the step of providing a substrate, the substrate includes a core region for forming a core device and a peripheral region for forming an input-output device; and in the step of removing part of the oxide layer, removing the oxide layer on the substrate in the core area.
Optionally, after removing part of the oxide layer, the forming method further includes: and forming a gate oxide layer on the substrate and the oxide layer, wherein the gate oxide layer on the substrate in the core region is used for forming a gate dielectric layer of the core device, and the gate oxide layer on the substrate in the peripheral region and the rest oxide layer are used for forming a gate dielectric layer of the input/output device.
Accordingly, the present invention also provides a semiconductor structure comprising:
a substrate; and the oxide layer is positioned on the substrate in a graphical mode, and the surface of the oxide layer is subjected to oxidation treatment.
Optionally, the substrate includes a core region for forming a core device and a peripheral region for forming an input-output device; the oxide layer is located on the substrate of the peripheral area.
Optionally, the semiconductor structure further includes: the gate oxide layer is positioned on the substrate and the oxide layer, the gate oxide layer is positioned on the substrate in the core area and is used for forming a gate dielectric layer of the core device, and the gate oxide layer and the oxide layer are positioned on the substrate in the peripheral area and are used for forming a gate dielectric layer of the input/output device.
Compared with the prior art, the technical scheme of the invention has the following advantages:
according to the technical scheme, after the oxide layer is formed, oxidation treatment is carried out on the surface of the oxide layer, so that residues on the surface of the oxide layer are removed, the influence of the residues on the subsequent process is reduced, the generation of defects in the patterning process of the oxide layer is reduced, and the yield of the formed semiconductor structure is improved.
In the alternative of the invention, the oxide layer is formed by an in-situ water vapor generation process, so the oxidation treatment can reduce residual hydroxide ions on the surface of the oxide layer, thereby reducing the generation of byproducts in the process of patterning the oxide layer by photoresist, effectively reducing defects and improving the yield.
Drawings
FIGS. 1-2 are schematic cross-sectional views of a semiconductor structure at various steps of a method of forming the semiconductor structure;
fig. 3 to 8 are schematic cross-sectional views corresponding to steps of a semiconductor structure forming method according to an embodiment of the invention.
Detailed Description
As can be seen from the background art, in the prior art, the semiconductor structure with the "high-K metal gate" often has the problems of more defects and lower yield. The reason of the problems of more defects and low yield is analyzed by combining a forming method of a semiconductor structure with a high-K metal gate:
the semiconductor device is mainly divided into a Core (Core) device and an Input and Output (IO) device according to functional distinction. In order to reduce the size of the semiconductor device and improve the integration of the semiconductor device, the size of the core device is smaller than that of the input-output device.
In addition, the operating voltage of the input and output device is much larger than that of the core device, so that stronger driving capability is obtained. In order to prevent the problems of electrical breakdown and the like, when the working voltage of the device is larger, the thickness of the gate dielectric layer of the device is required to be thicker, and therefore, the thickness of the gate dielectric layer of the input and output device is generally larger than that of the gate dielectric layer of the core device.
Referring to fig. 1 to 2, schematic cross-sectional structures corresponding to steps of a semiconductor structure forming method are shown.
As shown in fig. 1, a substrate 10 is provided, the substrate 10 including a core region 10c for forming a core device and a peripheral region 10io for forming an input-output device; forming an oxide layer 11 on the substrate 10; and forming a patterned photoresist layer 12 on the oxide layer 11, wherein the photoresist layer 12 exposes the oxide layer 11 on the substrate 10 in the core region 10 c.
Referring to fig. 2, the oxide layer 11 exposed by the photoresist layer 12 is removed, and the substrate 10 of the core region 10c is exposed; the remaining photoresist layer 12 is removed to expose the oxide layer 11 on the substrate 10io in the peripheral region 10.
And then forming a gate oxide layer on the substrate 10 and the oxide layer 11. The rest of the oxide layer 10 and the gate oxide layer on the peripheral region 10io substrate 10 are used for forming a gate dielectric layer of an input/output device; the gate oxide layer on the substrate 10 in the core region 10c is used for forming a gate dielectric layer of the core device, so that the input and output device has a thicker gate dielectric layer.
Typically, the oxide layer 11 is formed on the substrate 10 by an In-Situ Steam Generation (ISSG) process. After the oxide layer 11 is formed in this way, the surface of the oxide layer 11 will have more hydroxide ions (OH)-) And (4) remaining. A large amount of hydroxyl ions (OH) on the surface of the oxide layer 11-) The residue of (2) can poison the photoresist (poison).
For example, the step of forming the patterned photoresist layer 12 includes: coating an adhesive on the oxide layer 11; coating photoresist on the oxide layer with the surface coated with the adhesive; and patterning the photoresist to form the patterned photoresist layer 12.
The material of the adhesive is typically hexamethyldisilazane (Hexamethyldisill)azane, HMDS). Hexamethyldisilazane reacts with hydrophilic hydroxyl ions to form hydrophobic OSi (CH)3)3：
(CH3)3SiNHSi(CH3)3+2OH-→2OSi(CH3)3+NH3
That is, hydroxide ion (OH)-) May form a byproduct (byproduct) after the patterned photoresist layer 12 is formed. The generation of byproducts can cause poisoning of the photoresist, thereby creating a phenomenon of photoresist residue during photoresist patterning and removal of the remaining photoresist layer 12. The residue of the photoresist may affect the removal of the oxide layer 11 on the substrate 10 in the core region 10c, and may also affect the formation of the subsequent gate oxide layer, thereby resulting in the problems of more defects and lower yield.
To solve the above technical problem, the present invention provides a method for forming a semiconductor structure, including:
providing a substrate; forming an oxide layer on the substrate; carrying out oxidation treatment on the surface of the oxidation layer; and patterning the oxidized layer subjected to oxidation treatment to remove part of the oxidized layer.
According to the technical scheme, after the oxide layer is formed, oxidation treatment is carried out on the surface of the oxide layer, so that residues on the surface of the oxide layer are removed, the influence of the residues on the subsequent process is reduced, the generation of defects in the patterning process of the oxide layer is reduced, and the yield of the formed semiconductor structure is improved.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Referring to fig. 3 to 8, schematic cross-sectional structures corresponding to steps of a semiconductor structure forming method according to an embodiment of the invention are shown.
Referring to fig. 3, a substrate 100 is provided.
The substrate 100 is used to provide a process platform.
In this embodiment, the material of the substrate 100 is monocrystalline silicon. In other embodiments of the present invention, the material of the substrate may also be selected from polysilicon or amorphous silicon; the substrate may also be selected from silicon, germanium, gallium arsenide, or silicon germanium compounds; the substrate may also be other semiconductor materials, or the substrate may also be selected to have an epitaxial layer or a silicon-on-epitaxial layer structure.
In this embodiment, the substrate 100 is a planar substrate. In other embodiments of the present invention, the substrate may further have a semiconductor structure, such as a fin portion.
In this embodiment, the substrate 100 includes a core region 100C for forming a core device and a peripheral region 100IO for forming an input/output device. Because the size of the core device is smaller than that of the input and output device, and the working voltage of the input and output device is higher than that of the core device, the thickness of the gate dielectric layer of the subsequently formed input and output device is larger than that of the gate dielectric layer of the core device.
With continued reference to fig. 3, an oxide layer 110 is formed on the substrate 100.
In this embodiment, the substrate 100 includes a core region 100C and a peripheral region 100IO, so that the oxide layer 110 on the substrate 100 in the peripheral region 100IO is subsequently used to form a gate dielectric layer of the core device, so that the input/output device has a thicker gate dielectric layer; the oxide layer 110 on the substrate 100 in the core region 100C is subsequently removed to reduce the thickness of the gate dielectric layer of the core device.
It should be noted that, in this embodiment, the way that the oxide layer 110 is used to form the gate dielectric layer of the input/output device is only an example. In other embodiments of the present invention, the oxide layer may also be an oxide layer for other purposes.
The step of forming the oxide layer 110 includes: the oxide layer 110 is formed by an in-situ water vapor generation process. In the in-situ water vapor generation process, the reaction gas is a mixture of oxygen and hydrogen in a certain proportion. Under certain temperature and pressure, oxygen reacts with hydrogen to produce water, high-density gas-phase oxygen radicals and hydroxyl ions. Among them, the high-density gas-phase oxygen radicals have strong oxidizing property, and can form a high-quality high-density oxide layer on the substrate 100.
Referring to fig. 4, the surface of the oxide layer 110 is subjected to an oxidation process 200.
The oxidation treatment 200 is used to remove the residue on the surface of the oxide layer 110, reduce the influence of the residue on the subsequent process, reduce the probability of the photoresist poisoning phenomenon, reduce the generation of defects in the subsequent process, and improve the yield of the semiconductor structure.
In this embodiment, the oxide layer 110 is formed by an in-situ water vapor generation process, so that more hydroxide ions remain on the surface of the oxide layer 110. The oxidation treatment 200 is used for reducing hydroxyl ions, reducing the residue of the hydroxyl ions and reducing the probability of photoresist poisoning, thereby reducing the probability of defects and improving the yield.
Specifically, the step of performing the oxidation treatment 200 includes: the surface of the oxide layer 110 is subjected to an oxidation treatment 200 by an ozone solution. The ozone solution has strong oxidability and can react with hydroxyl ions, so that the hydroxyl ions are removed, the residue of the hydroxyl ions is reduced, the defects can be effectively reduced, and the yield is improved.
The concentration of the ozone solution should not be too high nor too low.
If the concentration of the ozone solution is too low, the residual hydroxyl ions on the surface of the oxide layer 110 cannot be sufficiently removed, the residual hydroxyl ions still affect the subsequent process, form defects and are not beneficial to improving the yield, and the too low concentration of the ozone solution also affects the efficiency of the oxidation treatment 200, increases the treatment time and affects the production efficiency; if the concentration of the ozone solution is too high, the ozone solution is highly oxidizing, which may create unnecessary process risks and increase the likelihood of damage to other semiconductor structures on the substrate 100. Specifically, in this embodiment, in the step of performing the oxidation treatment 200 by using the ozone solution, the concentration of the ozone solution is in the range of 30% to 80% by mole percentage.
In addition, in the step of performing the oxidation treatment 200 by the ozone solution, the time for the oxidation treatment 200 is not preferably too long or too short.
If the time for the oxidation treatment 200 is too short, the ozone solution cannot completely react with the residual hydroxyl ions on the surface of the oxidation layer 110, and the residual hydroxyl ions still affect the subsequent processes, form defects and are not beneficial to the improvement of the yield; if the time of the oxidation process 200 is too long, unnecessary process risks may be caused, increasing the possibility of damage to other semiconductor structures on the substrate 100, and the time of the oxidation process 200 is too long, which is not favorable for improving the production efficiency. Specifically, in the present embodiment, in the step of performing the oxidation treatment 200 by the ozone solution, the time of the oxidation treatment 200 is in the range of 20 seconds to 2 minutes.
The time of the oxidation treatment 200 is matched with the concentration of the ozone solution, so that the hydroxyl ions on the surface of the oxidation layer 110 are fully reacted with the ozone solution, the possibility of defect formation is reduced, and the yield is improved.
It should be noted that the method of performing the oxidation treatment 200 on the surface of the oxidation layer 110 by using the ozone solution is only an example. In another embodiment of the present invention, the step of performing the oxidation treatment includes: and carrying out the oxidation treatment on the surface of the oxidation layer in an oxygen annealing mode. The oxygen annealing mode can also react with the hydroxyl ions to reduce the hydroxyl ions into water, thereby reducing the residue of the hydroxyl ions, reducing the generation of defects and being beneficial to the improvement of the yield.
In the step of performing the oxidation treatment by oxygen annealing, the flow rate of oxygen is preferably neither too large nor too small.
If the flow rate of the oxygen is too small, the residual hydroxide ions on the surface of the oxidation layer can not fully react with the oxygen, the residual hydroxide ions still influence the subsequent process, form defects and are not beneficial to improving the yield, and the too small flow rate of the oxygen also influences the efficiency of oxidation treatment, increases the annealing time and influences the production efficiency; if the flow of oxygen is too large, material waste is easily caused, the process difficulty is increased, unnecessary process risks are caused, and the possibility of damaging other semiconductor structures on the substrate is increased. Specifically, in another embodiment of the present invention, in the step of performing the oxidation treatment by oxygen annealing, the oxygen flow rate is in a range from 0.8slm to 1.0 slm.
In the step of performing the oxidation treatment by oxygen annealing, the annealing temperature is not preferably too high or too low, and the annealing time is not preferably too long or too short.
If the annealing temperature is too high or the annealing time is too long, unnecessary process risks are caused, and the possibility of damaging other semiconductor structures on the substrate is increased; if the annealing temperature is too low or the annealing time is too short, the reaction of oxygen and hydroxyl ions can be influenced, the removal of the hydroxyl ions is not facilitated, the residual hydroxyl ions still can influence the subsequent process, defects are formed, the improvement of the yield is not facilitated, the efficiency of oxidation treatment is influenced, and the production efficiency is influenced. Specifically, in another embodiment of the present invention, in the step of performing the oxidation treatment by oxygen annealing, the annealing temperature is in a range of 1000 ℃ to 1200 ℃, and the annealing time is in a range of 15s to 40 s.
It should be noted that the method of performing oxidation treatment by using an ozone solution and the method of performing oxidation treatment by using oxygen annealing do not introduce impurities, which is beneficial to reducing the process difficulty, simplifying the process steps, and improving the yield.
Referring to fig. 5 to 7, the oxidized layer 110 after the oxidation treatment is patterned to remove a portion of the oxidized layer 110.
Specifically, the step of patterning the oxide layer 110 includes:
as shown in fig. 5, a patterned photoresist layer 120 is formed on the oxidized layer 110 after the oxidation process 200 (shown in fig. 4), and the photoresist layer 120 exposes a portion of the oxidized layer 110.
The patterned photoresist layer 120 is used to protect a portion of the oxide layer 110, thereby achieving a partial removal of the oxide layer 110.
In this embodiment, the substrate 100 includes a core region 100C and a peripheral region 100IO, and the oxide layer 110 on the substrate 100 in the peripheral region 100IO is subsequently used to form a gate dielectric layer of the core device, so the photoresist layer 120 is used to protect the oxide layer 110 on the substrate 100 in the peripheral region 100IO, thereby avoiding the subsequent processes from affecting the oxide layer 110. Therefore, in the step of forming the patterned photoresist layer 120, the photoresist layer 120 is located on the oxide layer 110 in the peripheral region 100IO, and the oxide layer 110 on the substrate 100 in the core region 100C is exposed.
The step of forming the patterned photoresist layer 120 includes: coating an adhesive on the oxidized layer 110 subjected to the oxidation treatment 200; coating photoresist on the oxide layer 110 coated with the adhesive on the surface; the photoresist is patterned to expose a portion of the oxide layer 110.
Wherein the adhesive is used to enhance the adhesion between the oxide layer 110 and the photoresist layer 120. In the step of coating the adhesive, the material of the adhesive is hexamethyldisilazane, and the coating can be realized by soaking, spraying or gas phase.
Because the surface of the oxide layer 110 is subjected to the oxidation treatment 200, the surface cleanliness of the oxide layer 110 is high, the residual hydroxyl ions are less, the reaction probability of the binder is lower, and the formed by-products are less. The reduction of the by-products is beneficial to reducing the probability of the photoresist poisoning phenomenon, reducing the residue of the photoresist in the patterning process of the photoresist and reducing the generation of defects.
The step of patterning the photoresist comprises: and patterning the photoresist through a photoetching process. In this embodiment, the photoresist on the substrate 100 in the core region 100C is removed through a photolithography process, so as to expose the oxide layer 110 on the substrate 100 in the core region 100C.
As shown in fig. 6, the exposed portion of the oxide layer 110 of the photoresist layer 120 is removed.
In this embodiment, the photoresist layer 120 is located on the oxide layer 110 of the peripheral region 100IO to expose the oxide layer 110 on the substrate 100 of the core region 100C, so in the step of removing part of the oxide layer 110, the oxide layer 110 on the substrate 100 of the core region 100C is removed to expose the substrate 100 of the core region 100C.
The step of removing part of the oxide layer 110 includes: part of the oxide layer 110 is removed by means of wet etching. Specifically, the step of removing a portion of the oxide layer 110 by wet etching can reduce the influence of the removal process on the substrate 100, thereby being beneficial to reducing the risk of damage to the substrate 100 and improving the yield.
Specifically, in the step of removing a part of the oxide layer 110 by wet etching, the etching solution is hydrofluoric acid. In this embodiment, the etching solution is dilute hydrofluoric acid (DHF) and can react with the oxide layer 110, so as to etch the oxide layer 110, and a higher etching selection ratio is provided between the substrate 100 and the oxide layer 110, so that the process risk is low, which is beneficial to reducing the possibility of damage to the substrate 100 and improving the yield.
As shown in fig. 7, the photoresist layer 120 is removed (as shown in fig. 6), exposing the remaining oxide layer 110.
In this embodiment, the step of removing the photoresist layer 120 includes: the photoresist layer 120 is removed by means of wet cleaning. Since the oxide layer 110 on the peripheral region 110IO substrate 100 is subsequently used to form a gate dielectric layer of the input/output device, the removal of the photoresist layer 120 by a wet method can reduce the possibility of damage to the oxide layer 110 on the peripheral region 110IO substrate 100, which is beneficial to improving the quality of the formed gate dielectric layer and the yield.
Specifically, in the step of removing the photoresist layer by wet cleaning, the cleaning solution is a mixed Solution (SPM) of Sulfuric acid and hydrogen peroxide. The mixed solution of sulfuric acid and hydrogen peroxide can react with the photoresist to achieve the purpose of removing the photoresist layer 120.
Because the surface of the oxide layer 110 is subjected to the oxidation treatment 200, the surface cleanliness of the oxide layer 110 is high, the residual hydroxyl ions are less, and the formed by-products are less. The reduction of the by-products is beneficial to reducing the photoresist residues, reducing the possibility of defects and improving the yield.
In this embodiment, after removing the photoresist layer 120 (as shown in fig. 6), the forming method further includes: a cleaning process is performed to remove the oxide layer 110 and the residues on the substrate 100, so as to provide a clean operation surface for the subsequent processes. Specifically, in the step of performing the cleaning treatment, the cleaning solution is the first standard solution (SC 1). The first standard solution is a mixed solution of sodium hydroxide and hydrogen peroxide, and can remove particles and organic substances on the oxide layer 110 and the substrate 100, thereby achieving the purpose of cleaning.
In addition, in this embodiment, the substrate 100 includes a core region 100C and a peripheral region 100IO, and the oxide layer 110 on the peripheral region 110IO substrate 100 is used to form a gate dielectric layer of the input/output device.
Therefore, as shown in fig. 8, after removing part of the oxide layer 110, the forming method further includes: forming a gate oxide layer 130 on the substrate 100 and the oxide layer 110, where the gate oxide layer 130 on the substrate 100 in the core region 100C is used to form a gate dielectric layer of the core device, and the gate oxide layer 130 and the remaining oxide layer 110 on the substrate 100 in the peripheral region 100IO are used to form a gate dielectric layer of the input/output device.
Because the oxidation layer 110 is oxidized 200 (as shown in fig. 4) after being formed, the oxidation layer 110 has fewer defects formed in the patterning process, and the gate oxide layer 130 and the oxidation layer 110 have better quality, which is beneficial to improving the quality of the gate dielectric layer of the formed core device and the gate dielectric layer of the input/output device and improving the yield of the formed semiconductor structure.
Correspondingly, the invention also provides a semiconductor structure.
Referring to fig. 8, a cross-sectional structure diagram of an embodiment of a semiconductor structure of the invention is shown.
The semiconductor structure includes: a substrate 100; and the oxide layer 110 is patterned on the substrate 100, and the surface of the oxide layer 110 is subjected to oxidation treatment.
The substrate 100 is used to provide a process platform.
In this embodiment, the material of the substrate 100 is monocrystalline silicon. In other embodiments of the present invention, the material of the substrate may also be selected from polysilicon or amorphous silicon; the substrate may also be selected from silicon, germanium, gallium arsenide, or silicon germanium compounds; the substrate may also be other semiconductor materials, or the substrate may also be selected to have an epitaxial layer or a silicon-on-epitaxial layer structure.
In this embodiment, the substrate 100 is a planar substrate. In other embodiments of the present invention, the substrate may further have a semiconductor structure, such as a fin portion.
In this embodiment, the substrate 100 includes a core region 100C for forming a core device and a peripheral region 100IO for forming an input/output device. Because the size of the core device is smaller than that of the input and output device, and the working voltage of the input and output device is higher than that of the core device, the thickness of the gate dielectric layer of the subsequently formed input and output device is larger than that of the gate dielectric layer of the core device. Therefore, the oxide layer 110 is located on the substrate 100 of the peripheral region 100IO and is used to form a gate dielectric layer of the core device, so that the input/output device has a thicker gate dielectric layer.
It should be noted that, in this embodiment, the way that the oxide layer 110 is used to form the gate dielectric layer of the input/output device is only an example. In other embodiments of the present invention, the oxide layer may also be an oxide layer for other purposes.
In this embodiment, the oxide layer 110 is formed by an in-situ water vapor generation process. In the in-situ water vapor generation process, the reaction gas is a mixture of oxygen and hydrogen in a certain proportion. Under certain temperature and pressure, oxygen reacts with hydrogen to produce water, high-density gas-phase oxygen radicals and hydroxyl ions. Therefore, the oxide layer formed by the in-situ water vapor generation process has high quality and high density, the quality of the oxide layer 110 can be effectively improved, and the performance of the semiconductor structure can be improved.
The surface of the oxide layer 110 is subjected to an oxidation treatment 200 (as shown in fig. 4).
The oxidation treatment 200 is used to remove the residue on the surface of the oxide layer 110, reduce the influence of the residue on the subsequent process, reduce the probability of the photoresist poisoning phenomenon, reduce the generation of defects in the subsequent process, and improve the yield of the semiconductor structure.
In this embodiment, the oxide layer 110 is formed by an in-situ water vapor generation process, so that more hydroxide ions remain on the surface of the oxide layer 110. The oxidation treatment 200 is used for reducing hydroxyl ions, reducing the residue of the hydroxyl ions and reducing the probability of photoresist poisoning, thereby reducing the probability of defects and improving the yield.
Specifically, as in the method for forming the semiconductor structure provided by the present invention, the oxidation treatment 200 may be performed on the surface of the oxide layer 110 by using an ozone solution, or performed on the surface of the oxide layer 110 by using an oxygen annealing method. The specific technical solution of the oxidation treatment 200 refers to the foregoing embodiments, and the present invention is not repeated herein.
The oxide layer 110 is a patterned oxide layer, and the oxide layer 110 exposes the substrate 100 in the core region 110C.
Specifically, the process of patterning the oxide layer 110 is implemented by a patterned photoresist. In the process of forming the patterned photoresist, it is necessary to coat an adhesive on the surface of the oxide layer 110, coat a photoresist on the oxide layer 110 having the adhesive on the surface, and then pattern the photoresist.
Because the surface of the oxide layer 110 is oxidized, the surface cleanliness of the oxide layer 110 is high, and the residual hydroxyl ions are few, so that the reaction probability of the binder is small and the byproducts are few in the photoresist patterning process. The reduction of the by-products can reduce the possibility of photoresist poisoning, is beneficial to reducing the photoresist residues in the photoresist patterning process, is beneficial to reducing the generation of defects in the patterning process of the oxide layer 110, and is beneficial to improving the quality of the formed patterned oxide layer 110.
It should be noted that, in this embodiment, the substrate 100 includes a core region 100C and a peripheral region 100IO, and the oxide layer 110 on the peripheral region 110IO substrate 100 is used to form a gate dielectric layer of the input/output device.
Therefore, the semiconductor structure further comprises: the gate oxide layer 130 is located on the substrate 100 and the oxide layer 110, the gate oxide layer 130 is located on the substrate 100 in the core region 100C and is used for forming a gate dielectric layer of a core device, and the gate oxide layer 130 and the oxide layer 110 are located on the IO substrate 100 in the peripheral region 100 and are used for forming a gate dielectric layer of an input/output device.
Since the oxidation layer 110 is subjected to the oxidation treatment 200 (as shown in fig. 4), defects in the oxidation layer 110 are fewer, and the gate oxide layer 130 and the oxidation layer 110 have better quality, which is beneficial to improving the quality of the gate dielectric layer of the core device and the gate dielectric layer of the input/output device and improving the yield of the semiconductor structure.
In summary, according to the technical scheme of the present invention, after the oxide layer is formed, the surface of the oxide layer is oxidized, so as to remove the residue on the surface of the oxide layer, reduce the influence of the residue on the subsequent process, and reduce the generation of defects in the patterning process of the oxide layer, thereby improving the yield of the semiconductor structure. In the alternative of the invention, the oxide layer is formed by an in-situ water vapor generation process, so that residual hydroxide ions on the surface of the oxide layer can be reduced by the oxidation treatment, and the generation of byproducts is reduced in the process of patterning the oxide layer by using the photoresist, so that defects can be effectively reduced, and the yield is improved.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (14)
1. A method of forming a semiconductor structure, comprising:
providing a substrate;
forming an oxide layer on the substrate by an in-situ water vapor generation process; hydroxyl ions are arranged on the surface of the oxide layer;
after the oxide layer is formed, directly oxidizing the surface of the oxide layer to reduce the hydroxide ions into water;
patterning the oxidized layer subjected to oxidation treatment to remove part of the oxidized layer;
the step of patterning the oxide layer comprises: forming a patterned photoresist layer on the oxidized layer subjected to the oxidation treatment, wherein part of the oxidized layer is exposed out of the photoresist layer; removing the exposed part of the oxide layer of the photoresist layer; removing the photoresist layer to expose the residual oxide layer;
the step of forming a patterned photoresist layer comprises: coating an adhesive on the oxidized layer subjected to the oxidation treatment; coating photoresist on the oxide layer with the surface coated with the adhesive; and patterning the photoresist to expose part of the oxide layer.
2. The forming method of claim 1, wherein the step of performing an oxidation process comprises: and carrying out oxidation treatment on the surface of the oxidation layer by using an ozone solution.
3. The method of claim 2, wherein the step of oxidizing by an ozone solution has a concentration in the range of 30 to 80 mole percent.
4. The forming method according to claim 2, wherein in the step of performing the oxidation treatment by the ozone solution, the time of the oxidation treatment is in a range of 20 seconds to 2 minutes.
5. The forming method of claim 1, wherein the step of performing an oxidation process comprises: and carrying out the oxidation treatment on the surface of the oxidation layer in an oxygen annealing mode.
6. The method of forming of claim 5, wherein the step of performing the oxidation process by oxygen annealing has an oxygen flow rate in a range of 0.8slm to 1.0 slm.
7. The forming method according to claim 5, wherein the step of performing the oxidation treatment by oxygen annealing is performed at an annealing temperature in a range of 1000 ℃ to 1200 ℃ and an annealing time in a range of 15s to 40 s.
8. The method of claim 1, wherein the step of removing a portion of the oxide layer comprises: and removing part of the oxide layer by means of wet etching.
9. The method of claim 8, wherein the step of removing a portion of the oxide layer by wet etching comprises etching the oxide layer with hydrofluoric acid.
10. The method of forming as claimed in claim 1, wherein the step of removing the photoresist layer comprises: and removing the photoresist layer by a wet cleaning mode.
11. The forming method as claimed in claim 10, wherein in the step of removing the photoresist layer by wet cleaning, the cleaning solution is a mixed solution of sulfuric acid and hydrogen peroxide.
12. The method of claim 1, wherein in the step of applying an adhesive, a material of the adhesive is hexamethyldisilazane.
13. The method of forming of claim 1, wherein in the step of providing a substrate, the substrate includes a core region for forming a core device and a peripheral region for forming an input-output device;
and in the step of removing part of the oxide layer, removing the oxide layer on the substrate in the core area.
14. The method of forming as claimed in claim 13, wherein after removing a portion of the oxide layer, the method further comprises: and forming a gate oxide layer on the substrate and the oxide layer, wherein the gate oxide layer on the substrate in the core region is used for forming a gate dielectric layer of the core device, and the gate oxide layer on the substrate in the peripheral region and the rest oxide layer are used for forming a gate dielectric layer of the input/output device.
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