CN102435629B - Detection method of scanning electron microscope - Google Patents
Detection method of scanning electron microscope Download PDFInfo
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- CN102435629B CN102435629B CN201110386090.9A CN201110386090A CN102435629B CN 102435629 B CN102435629 B CN 102435629B CN 201110386090 A CN201110386090 A CN 201110386090A CN 102435629 B CN102435629 B CN 102435629B
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Abstract
The invention relates to a detection method of a scanning electron microscope. The detection method can be used for detecting the defect of a wafer provided with a plurality of chips, and comprises the steps of: importing a file of the wafer with a defect; putting the wafer to be detected on an objective table of the scanning electron microscope; setting a corner of a certain chip arranged on the wafer to be detected as an initial position; correcting the position of the wafer to be detected; obtaining the offset value of the levels of the wafers arranged at the central parts of cavities of two machine types; selecting the chip to be detected, and correcting the coordinate of the corner of the chip in a defect scanning machine according to the offset value of the levels of the wafers; leading the corner of the chip to be moved to the center of the image of a display device in a state of amplifying the image, and obtaining the offset value of the levels of the chips arranged at the central parts of the cavities of the two machine types; obtaining the corrected coordinate of the defect based on the offset value of the levels of the wafers and the offset value of the levels of the chips; and according to the corrected coordinate of the defect, leading the defect to be detected to be positioned under an electron gun of the defect scanning electron microscope, and therefore, the feature of the defect can be rapidly and accurately caught.
Description
Technical field
The present invention relates to a kind of detection method of scanning electron microscope, particularly relate to a kind of detection method of wafer being carried out to the scanning electron microscope detected fast.
Background technology
In the manufacture process of semiconductor devices, the quality of detection to guarantee product of wafer is very important.By detecting the defect of wafer and analyzing, the reason producing defect can be found, thus realize the raising of yield rate and the steady running of production line.
At present, using scanning electron microscope to carry out defect inspection to wafer is a kind of method comparatively commonly used.Just carry out brief description for the basic structure of scanning electron microscope in prior art below.
It is the schematic diagram of the primary structure of existing scanning electron microscope see Fig. 1, Fig. 1.As shown in Figure 1, scanning electron microscope mainly comprise display, lens barrel 10, be positioned at lens barrel 10 electron gun 20, be positioned at lens barrel 10 and the Inlens detector 30 be positioned at below electron gun 20 and be positioned at outer locator 40 outside lens barrel 10, main chamber 50, be positioned at main chamber 50 board 60 and control the operating control that the plummer 70 on this board 60 moves.Its principle of work is: the incident electron being launched a branch of high energy by electron gun 20, and the surface of material that then incident electron carries on the plummer 70 of board 60 through electromagnetic lens effect focuses on.Now, excitation area near the material surface that electron beam focuses on will produce secondary electron, Auger electron, signature x-ray and continuous spectrum X ray, backscattered electron, transmitted electron, and in the electromagnetic radiation that visible, ultraviolet, infrared light region produce, etc.The various particle that above excitation area produces and ray are received by Inlens detector and outer locator, and are reflected on the display of scanning electron microscope.By and large, utilize the interaction of electronics and material, the various physics of sample itself, the information of chemical property can be obtained, as pattern, composition, crystal structure, electronic structure and internal electric field or magnetic field etc.
Current, the detection method of scanning electron microscope that utilizes adopted in the industry is, the file of the defective wafer drawn by Defect Scanning board imports this scanning electron microscope, this defective wafer to be put in the main chamber 50 of scanning electron microscope and to be positioned on the plummer 70 of board 60, the corner location of the some chips in wafer is made to be set as reference position, then carry out position correction, make the X-axis in the image coordinate system of electron microscope and Y-axis parallel with the adjacent both sides of chip respectively.Afterwards, choose the image coordinate (xn of 3 to 4 defects in scanning electron microscope, yn) (wherein n is the numbering of defect) and Defect Scanning board (that is a kind of defect checking machine platform of specialty, it can detect the defect on wafer and be write in a file by the coordinate of defect) coordinate (an that draws, bn) analysis is compared, such as Vector operation, and then draw the deviate (X of two kinds of type chamber central positions, Y)=(xn, yn)-(an, bn).When scanning electron microscope needs to carry out pointwise detection to defect, with this deviate (X, Y) image coordinate of defect in scanning electron microscope is revised, use revised defect coordinate by handling the plummer 70 of board 60 by below defect movement to electron gun, then by repeatedly comparatively locking the final position of defect with the image ratio of next door chip and taking pictures between two parties.
When using this existing method to carry out the defects detection of wafer, because deviate is by drawing at the enterprising line operate of the scan image of wafer level, what in this way revise is the deviation of (wafer level) in a big way, its degree of accuracy is lower, be difficult to capture defect by one-time detection, usual needs by carrying out image ratio compared with the accurate location could determining defect in relatively large scope, thus complete final detection, such detection can expend the more time, affects the production capacity of board.
And along with the development of integrated circuit technology, the size of chip is more and more less, flaw size on wafer is also thereupon more and more less, by scanning electron microscope, this can be confirmed that its pattern brings increasing difficulty, existing above-mentioned detection method has in fact been difficult to meet the requirement of actual production to precision.Because the defects count on wafer is related to its quality of production, therefore the detection of defect and observation are become most important, in addition, wafer size can do larger and larger, wafer needs the defects count checked can get more and more, existing detection method is also difficult to meet the requirement of actual production to detection speed.For this reason, improve monitoring and identify that the efficiency of critical defect and precision create substantial impact to the production run of entirety.
Therefore, a kind of detection method of Defect Scanning is fast, accurately sought so that the precision and efficiency of detecting improving wafer defect is very necessary.
Summary of the invention
The object of the present invention is to provide the detection method of a kind of high precision and scanning electron microscope fast, the position of defect can be found accurately and rapidly by the method, can dispense in existing method by repeatedly comparatively locking the final position of defect with the image ratio of next door chip and numerous and diverse step of taking pictures between two parties, can be good at solving the seizure to pole tiny flaw, thus greatly can improve the output of board.
For this reason, the invention provides a kind of detection method of scanning electron microscope, for carrying out defects detection to the wafer it with multiple chip, the method comprises the following steps:
Step 1: the file of the defective wafer drawn by Defect Scanning board imports this scanning electron microscope;
Step 2: wafer to be measured is positioned on the plummer of this scanning electron microscope;
Step 3: a certain chip corners on wafer to be measured is set as reference position;
Step 4: by manipulating this plummer, makes this reference position be positioned at the picture centre of the display of this scanning electron microscope and carry out position correction to this wafer to be measured;
Step 5: the coordinate utilizing multiple defect to draw in the image coordinate and this Defect Scanning board of the display of this scanning electron microscope compares analysis, obtains the deviate of the wafer level of two kinds of type chamber central positions;
Step 6: select a chip to be measured, utilize the coordinate that the chip corners of this chip to be measured of deviate correction of described wafer level draws in this Defect Scanning board, then under the state of enlarged image, make the chip corners of this chip to be measured move to the picture centre of this display, and then the deviate of the chip level of acquisition two kinds of type chamber central positions;
Step 7: based on the deviate of this wafer level and the deviate of this chip level, defect to be measured is revised, obtain revised defect coordinate;
Step 8: according to this revised defect coordinate, manipulate this plummer, makes this defect to be measured be positioned at below the electron gun of this Defect Scanning board, and catches the pattern of this defect to be measured by this electron gun.
Preferably, in described step 7, described defect to be measured is the defect on described chip to be measured.
Preferably, described detection method also comprises step 9: repeatedly perform described step 6 to step 8, until all chips to be measured are all detected.
Preferably, described chip corners is defined as the geometric center of the cruciform voids part formed between chip.
Preferably, in described step 4, by manipulating this plummer this reference position being carried out to the position correction of horizontal direction and vertical direction, making the X-axis in the image coordinate system of this electron microscope and Y-axis parallel with the adjacent both sides of chip respectively.
Preferably, in described step 5, the quantity of described multiple defect is 3 or 4.
Preferably, in described step 5, carry out vector calculus by the coordinate drawn image coordinate and the Defect Scanning board of scanning electron microscope, obtain the deviate of the wafer level of two kinds of type chamber central positions.
Preferably, in described step 6, by the wafer to be measured moving this plummer and be carried on this plummer, find this chip to be measured, make the chip corners of this chip to be measured be positioned at the picture centre of this display afterwards again.
Preferably, in described step 7, obtain revised defect coordinate by the vector calculus of space coordinates.
Preferably, in described step 8, catch the pattern of this defect to be measured be not photographed by taking pictures.
The present invention has following beneficial effect: by detection method of the present invention, can catch the pattern of individual defect in wafer fast, accurately, can realize the spot check to defect on wafer within a short period of time, improve the work efficiency of scanning electron microscope.
Accompanying drawing explanation
Further understand feature of the present invention and technology contents for enable, refer to following detailed description for the present invention and accompanying drawing, but accompanying drawing only provides reference and explanation use, is not used for being limited the present invention.
Fig. 1 is the schematic diagram of the primary structure of existing scanning electron microscope;
Fig. 2 is the definition schematic diagram of chip corners;
Fig. 3 is method according to the present invention after setting reference position, the schematic diagram of the state before level and vertical direction offset correction;
Fig. 4 is method according to the present invention after setting reference position, the schematic diagram of the state after level and vertical direction offset correction;
Fig. 5 is the chip corners of chip to be measured schematic diagram not placed in the middle;
Fig. 6 is the schematic diagram that method according to the present invention makes the chip corners of chip to be measured placed in the middle; And
Fig. 7 is the schematic flow sheet carrying out defect spot check according to method of the present invention.
Embodiment
In order to further illustrate principle of the present invention and structure, existing by reference to the accompanying drawings to a preferred embodiment of the present invention will be described in detail, but described embodiment is only the use providing and illustrate with explanation, can not be used for limiting scope of patent protection of the present invention.
First brief description is carried out to an embodiment of method of the present invention below.With reference to figure 7, it is depicted as the defect spot check schematic flow sheet that method according to the present invention is carried out, and generally describes a specific embodiment according to method of the present invention.In the detection method of scanning electron microscope according to the present invention, first, the file of the defective wafer drawn by Defect Scanning board imports scanning electron microscope (step S100); Then, wafer to be measured is positioned over (step S200) on plummer 70; Afterwards, a certain chip corners on wafer 80 to be measured is set as reference position (step S300); Then, by manipulating this plummer 70, this reference position is made to be positioned at the picture centre of the display of this scanning electron microscope and to carry out position correction (step S400) to this wafer 80 to be measured; The coordinate utilizing multiple defect to be detected to draw at image coordinate and the Defect Scanning board of the display of scanning electron microscope compares analysis, obtains the deviate (step S500) of the wafer level of two kinds of type chamber central positions; Then, select a chip to be measured, utilize the coordinate that the Defect Scanning board of its chip corners of deviate correction of wafer level draws, under the state of amplifying, its chip corners is moved on to display image center, obtains the deviate (step S600) of chip level; The defect coordinate (step S700) after defect correction to be measured is obtained based on the deviate of wafer level and the deviate of chip level; Subsequently, according to this revised defect coordinate, this plummer 70 mobile and the wafer to be measured 80 be carried on this plummer 70, make this defect to be measured be positioned at below the electron gun 20 of this Defect Scanning board, and catch the pattern (step S800) of this defect to be measured by this electron gun 20.
Generally, method of the present invention is when carrying out defects detection to the wafer to be measured 80 be positioned on plummer 70, and the basis of the correction deviation of the wafer level of board 60 is introduced the correction deviation of chip level.Utilize the deviate of these two different stages accurately to revise the position of the defect on wafer 80, thus obtain the accurate coordinate of defect in electron microscope, this defect to be moved to accurately the below of electron gun 20.Defect can be found out fast by revised coordinate and catch the pattern of (such as by acquisition of taking pictures) this defect, avoiding and need repeatedly to contrast with the picture of next door chip the cumbersome procedure could determining defective locations when only having the correction deviation of wafer level.How to carry out practical operation by setting forth method of the present invention with specific embodiment below.
Embodiment 1
Please refer to Fig. 2 also simultaneously with reference to figure 7.Fig. 2 is the definition schematic diagram of chip corners.In fig. 2, show chip 1 between a part for four chips such as chip 4 84 grade and this four chips form the gap of " ten " font.In the present embodiment, the geometric center (infall) of being somebody's turn to do the gap of " ten " font is defined as " chip corners " described in the present invention.In wafer, between any four adjacent chips, a chip corners can be formed.Because the size of one single chip is very small often the size relative to wafer, so consider in order to the convenience of choosing reference position and accuracy, the reference position of position as defects detection of some chip corners first to be chosen.
But it should be noted that, " chip corners " also may be selected to be certain bight of one single chip, and it there is no specific restriction in the present invention.
Please refer to Fig. 3 and Fig. 4 also simultaneously with reference to figure 7.After Fig. 3 and Fig. 4 is setting reference position respectively, level and vertical direction offset correction schematic diagram that is front and state after correcting.In figs. 3 and 4, the chip circular wafer 80 being provided with the neat arrangement of many bulks is illustrated schematically in; And the image coordinate system shown by display and coordinate system center (picture centre) thereof of scanning electron microscope is represented with two orthogonal straight lines of arrow.Fig. 3 shows after a certain chip corners on wafer to be measured is set as reference position, by suitably moving plummer 70, makes this chip corners be positioned at the state of the picture centre of scanning electron microscope.Afterwards, by suitably rotating plummer 70, make the limit that the X-axis in the image coordinate system of display, Y-axis are adjacent with two of chip respectively parallel, as shown in Figure 4.
Then, wafer is chosen multiple defect Kn (wherein n is the numbering of defect), and the coordinate of defect Kn in scanning electron microscope is expressed as (xn, yn), the scanning coordinate obtained by Defect Scanning board is expressed as (an, bn).Preferably, choose 3-4 defect, but the quantity of defect is not as limit.
The present embodiment will to choose three defect K1, K2, K3 illustrate method of the present invention.After wafer 80 is had good positioning as shown in Figure 4, transfer the scanning coordinate data (a1 being got them by Defect Scanning board, b1), (a2, b2), (a3, and in the display of scanning electron microscope, obtain defect K1, the image coordinate (x1, y1) of K2, K3, (x2 b3), y2), (x3, y3).The image coordinate of above-mentioned each defect and scanning coordinate are carried out vector calculus, such as vector subtracts computing (x1-a1, y1-b1), (x2-a2, y2-b2), (x3-a3, y3-b3), the deviate of each defect will be obtained, then the deviate obtained is averaged, i.e. [(x1-a1, y1-b1)+(x2-a2, y2-b2)+(x3-a3, y3-b3)]/3, thus obtain the Mean Deviation value (X, Y) of two kinds of type chamber central positions.This deviate (X, Y) is the deviate of wafer level.
Please refer to Fig. 5 and Fig. 6 also simultaneously with reference to figure 7.Fig. 5 is the chip corners of chip to be measured schematic diagram not placed in the middle; And the chip corners of Fig. 6 to be method according to the present invention make chip to be measured placed in the middle after schematic diagram.In fig. 5 and fig., orthogonal two dotted lines represent the center (that is the position on the wafer aimed at of electron gun) of the display of scanning electron microscope.Obtaining the deviate (X of wafer level, Y) after, the chip C4 at any one defect K4 to be measured in selected wafer in defect to be detected (K4 herein can be other any one defect on above-mentioned K1, K2, K3 one of them or wafer 80) place.Then coordinate (the c4 that the Defect Scanning board transferring the chip corners of this chip C4 draws, d4), the coordinate (c4, d4) that the Defect Scanning board of the chip corners of this chip of deviate correction C4 of the wafer level utilizing above-mentioned steps to obtain draws.Then in scanning electron microscope, input the coordinate after this correction, and enlarged image is to chip level (can see the magnification level of defect in chip and chip clearly), image now as shown in Figure 5, can see, because the correction coordinate of the chip corners of the revised chip C4 of deviate through wafer level still exists deviation, therefore the chip corners of chip C4 is not positioned at picture centre or display centre.Again by handling this plummer 70, by the chip corners of defect K4 place chip C4 (being positioned at display centre) placed in the middle, in process placed in the middle the distance (Z4, W4) of this chip C4 movement in microscopical display be chip level correction deviate (this displacement by the coordinate in display after placed in the middle of the chip corners of chip C4 with placed in the middle before display in coordinate carry out vector subtraction and obtain).
Obtaining the correction deviate (X of wafer level, and the correction deviate (Z4 of chip level Y), W4) after, coordinate (an that the scanning machine of the defect Kn any to be measured in available wafer obtains, bn) revise deviate with above two and carry out vector calculus, such as vector adds the correction coordinate (an ', bn ') that computing i.e. (an+X+Z4, bn+Y+W4) obtains this defect.
It should be noted that at this, it also can be that the coordinate of coordinate and the scanning electron microscope that above-mentioned each Defect Scanning board is drawn carries out vector and subtracts computing (an-xn that the vector obtaining wafer scale deviation subtracts computing, bn-yn), with obtain wafer level deviate (X ', Y '), itself and deviate (X, the Y) negative each other to obtain before, and the vector obtaining chip-scale deviation subtract computing also can placed in the middle with the chip corners of chip C4 before scanning electron microscope coordinate deduct placed in the middle after scanning electron microscope coordinate, with obtain chip level deviate (Z4 ', W4 '), itself and the deviate (Z4 to obtain before, W4) negative each other, so, coordinate (an that the Defect Scanning board of defect Kn draws, bn) just can revise deviate and carry out such vector calculus with above two, such as vector subtracts computing, namely (an-X '-Z4, bn-Y '-W4), thus also can obtain this defect correction coordinate (an ', bn ').
Finally, in scanning electron microscope Introduced Malaria coordinate (an ', bn '), defect Kn can be found quickly and accurately and the direct below this defect Kn being moved to accurately electron gun 20, carry out such as point by point scanning and take pictures, thus the pattern of this defect Kn can be captured accurately.Each defect on wafer carried out after correction and carries out point by point scanning and take pictures, like this defect inspection of this wafer just being completed.
Embodiment 2
The major part of the present embodiment is identical with embodiment 1, and the part below only with regard to being different from embodiment 1 is described.After the deviate obtaining chip level, utilize the deviate of this deviate and above-mentioned wafer level, the coordinate that the Defect Scanning board of all defect on chip C4 draws is revised, and carries out point by point scanning and take pictures.Choose another chip C5 afterwards, deviate (the Z5 of the chip level of chip C5 is again obtained by the method described in embodiment 1, W5), the coordinate and then as stated above drawn the Defect Scanning board of all defect on chip C5 is revised, point by point scanning and taking pictures.By that analogy, each chip Cn is obtained to the deviate (Zn of a corresponding chip level, Wn), and revise the defect in this chip by this deviate together with the deviate of wafer level, repeat above method until wafer all chips on all defect all check complete.
Embodiment 3.
As different from Example 2, in order to improve detection efficiency, after the deviate obtaining the deviate of wafer level and the chip level of a selected chip, the coordinate that all defect on wafer to be measured draws in Defect Scanning board can be revised, and picture catching.
Although enumerated describe the utility model with reference to exemplary embodiments, should be appreciated that term used to illustrate and exemplary, and non-limiting term.Specifically can implement in a variety of forms due to the utility model and not depart from spirit and the essence of utility model, so be to be understood that, above-described embodiment is not limited to any aforesaid details, and explain widely in the spirit and scope that should limit in claim of enclosing, therefore fall into whole change in claim or its equivalent scope and modification and all should be claim of enclosing and contained.
Claims (9)
1. a detection method for scanning electron microscope, for carrying out defects detection to the wafer it with multiple chip, the method comprises the following steps:
Step 1: the file of the defective wafer drawn by Defect Scanning board imports this scanning electron microscope;
Step 2: wafer to be measured is positioned on the plummer of this scanning electron microscope;
Step 3: a certain chip corners on wafer to be measured is set as reference position, described chip corners is defined as the geometric center of the cruciform voids part formed between chip;
Step 4: by manipulating this plummer, makes this reference position be positioned at the picture centre of the display of this scanning electron microscope and carry out position correction to this wafer to be measured;
Step 5: the coordinate utilizing multiple defect to draw in the image coordinate and this Defect Scanning board of the display of this scanning electron microscope compares analysis, obtains the deviate of the wafer level of two kinds of type chamber central positions;
Step 6: select a chip to be measured, utilize the coordinate that the chip corners of this chip to be measured of deviate correction of described wafer level draws in this Defect Scanning board, then under the state of enlarged image, make the chip corners of this chip to be measured move to the picture centre of this display, and then the deviate of the chip level of acquisition two kinds of type chamber central positions;
Step 7: based on the deviate of this wafer level and the deviate of this chip level, the coordinate that defect to be measured draws in scanning machine is revised, obtain revised defect coordinate;
Step 8: according to this revised defect coordinate, manipulate this plummer, makes this defect to be measured be positioned at below the electron gun of this Defect Scanning board, and catches the pattern of this defect to be measured by this electron gun.
2. detection method according to claim 1, is characterized in that, in described step 7, described defect to be measured is the defect on described chip to be measured.
3. detection method according to claim 2, is characterized in that, described detection method also comprises step 9: repeatedly perform described step 6 to step 8, until all chips to be measured are all detected.
4. the detection method according to any one of claim 1-3, it is characterized in that, in described step 4, by manipulating this plummer this reference position being carried out to the position correction of horizontal direction and vertical direction, making the X-axis in the image coordinate system of this electron microscope and Y-axis parallel with the adjacent both sides of chip respectively.
5. the detection method according to any one of claim 1-3, is characterized in that, in described step 5, the quantity of described multiple defect is 3 or 4.
6. the detection method according to any one of claim 1-3, it is characterized in that, in described step 5, carry out vector calculus by the coordinate drawn image coordinate and the Defect Scanning board of scanning electron microscope, obtain the deviate of the wafer level of two kinds of type chamber central positions.
7. the detection method according to any one of claim 1-3, it is characterized in that, in described step 6, by the wafer to be measured moving this plummer and be carried on this plummer, find this chip to be measured, make the chip corners of this chip to be measured be positioned at the picture centre of this display afterwards again.
8. the detection method according to any one of claim 1-3, is characterized in that, in described step 7, obtains revised defect coordinate by the vector calculus of space coordinates.
9. the detection method according to any one of claim 1-3, is characterized in that, in described step 8, catches the pattern of this defect to be measured be not photographed by taking pictures.
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| CN102087985A (en) * | 2009-12-03 | 2011-06-08 | 无锡华润上华半导体有限公司 | Wafer defect detecting method |
| CN102121907A (en) * | 2010-01-08 | 2011-07-13 | 中芯国际集成电路制造(上海)有限公司 | Automatic wafer defect detection method and system |
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