CN102394577B - Wide-range linear continuous adjustable high-precise current amplifier - Google Patents

Abstract

The invention provides a new structure of a current amplifier. According to the invention, an NMOS (N-channel metal oxide semiconductor) transistor in the current amplifier works in a triode zone, so that the wide-range linear continuous adjustable high-precise current amplifier is acquired.

Description

The high-precision current amplifier that a kind of wide region LINEAR CONTINUOUS is adjustable

Technical field

The application relates to a kind of current amplifier, the high-precision current amplifier that particularly a kind of wide region LINEAR CONTINUOUS is adjustable.

Background technology

Gain adjustable amplifier (VGA; Variable Gain Amplify) is a module commonly used in the telecommunication circuit; It mainly acts on is when input signal amplitude alters a great deal, and the gain of adjustment receiving-transmitting chain makes amplitude output signal basicly stable, is convenient to the subsequent treatment module signal is handled again.The gain adjustable amplifier of Current Regulation formula (Current Steering) structure is a kind of gain adjustable amplifier of common linear gain structure; It normally regulates the ratio of input and output electric current through adjustment control voltage, thereby changes Amplifier Gain.

Fig. 1 is the current amplifier of traditional linear gain structure.The current gain A of the current amplifier of this linear gain structure _iFor:

$A_i=\frac{I_{\mathrm{OUT}}}{I_{\mathrm{IN}}}$

(1.1)

Because metal-oxide-semiconductor M4 and M5 constitute one group of current mirror, and metal-oxide-semiconductor M6 and M7 constitute another group current mirror, can draw following formula:

I _OUT＝I _DM6＝I _DM2

(1.2)

I _IN＝I _DM5＝I _DM1

(1.3)

Regulate VA and VB, thereby make M1 and M2 be operated in dark triode region, so the drain current of M1 and M2 is:

$I_{\mathrm{DM}1}={\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_1((V_{\mathrm{GSM}1}-V_{\mathrm{thM}1})V_{\mathrm{DSM}1}-\frac{1}{2}{V}_{\mathrm{DSM}1}^2)$

(1.4)

$I_{\mathrm{DM}2}={\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_2((V_{\mathrm{GSM}2}-V_{\mathrm{thM}2})V_{\mathrm{DSM}2}-\frac{1}{2}{V}_{\mathrm{DSM}2}^2)$

(1.5)

In formula (1.4) and (1.5), (W/L) ₁(W/L) ₂Be respectively breadth length ratio, the V of NMOS pipe M1 and M2 _GSM1And V _GSM2Be respectively gate source voltage, the V of NMOS pipe M1 and M2 _DSM1And V _DSM2Be respectively drain-source voltage, the V of NMOS pipe M1 and M2 _ThM1And V _ThM2Be respectively the threshold voltage of NMOS pipe M1 and M2:

Referring to Fig. 1, the drain-source voltage V of M1 _DSM1Clamped down at V by operational amplifier (opamp) A1 and NMOS pipe M11 _AIf V _AEnough little, M1 will be operated in dark triode region and

Enough little, can it be ignored.So formula (1.4) can be written as:

$I_{\mathrm{DM}1}={\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_1((V_{\mathrm{GSM}1}-V_{\mathrm{thM}1})V_A-\frac{1}{2}{V}_A^2)\≈{\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_1(V_{\mathrm{GSM}1}-V_{\mathrm{thM}1})V_A$

(1.6)

In like manner, the drain-source voltage V of M2 _DSM2Clamped down at V by operational amplifier (opamp) A2 and NMOS pipe M12 _BIf V _BEnough little, M2 will be operated in dark triode region and

Enough little, can it be ignored, formula (1.5) can be written as:

$I_{\mathrm{DM}2}={\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_2((V_{\mathrm{GSM}2}-V_{\mathrm{thM}2})V_B-\frac{1}{2}{V}_B^2)\≈{\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_2(V_{\mathrm{GSM}2}-V_{\mathrm{thM}2})V_B$

(1.7)

If M1 and M2 adopt identical metal-oxide-semiconductor, (W/L) so ₁=(W/L) ₂, V _GSM1=V _GSM2, V _ThM1=V _ThM2, according to formula (1.1), (1.2), (1.3), (1.6) and (1.7), so current gain A _iFor:

$A_i=\frac{I_{\mathrm{OUT}}}{I_{\mathrm{IN}}}=\frac{I_{\mathrm{DM}2}}{I_{\mathrm{DM}1}}\≈\frac{{\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_2(V_{\mathrm{GSM}2}-V_{\mathrm{thM}2})V_B}{{\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_1(V_{\mathrm{GSM}1}-V_{\mathrm{thM}1})V_A}=\frac{V_B}{V_A}$

(1.8)

Can know that by formula (1.8) gain of this current amplifier equals V _BAnd V _AThe ratio.Through adjustment V _BAnd V _ARatio, the gain of current amplifier can be regulated.

Yet the defective of this structure is that M1 and M2 must operate at dark triode region.Gain and V _B, V _ARatio between linear relationship depend on V to a great extent _BAnd V _AValue.V in other words _BAnd V _AMust be enough little, therefore be subject to this, the adjustable extent of conventional current amplifier is little.

Summary of the invention

To traditional current amplifier gain and V _B, V _ARatio between linear relationship depend on enough little V to a great extent _BAnd V _AValue, the present invention will provide a kind of new construction of current amplifier, this new construction provides a kind of wide region LINEAR CONTINUOUS adjustable high-precision current amplifier.

Current amplifier of the present invention comprises: have the high-precision current mirror that is made up of NMOS pipe M1, M2, MI1, MI2 and M5 and M6; The source electrode of said NMOS pipe MI1 is connected the drain electrode of NMOS pipe M1 and the drain electrode of NMOS pipe M5 respectively with drain electrode, and the source electrode of said NMOS pipe MI2 is connected the drain electrode of NMOS pipe M2 and the drain electrode of NMOS pipe M6 respectively with drain electrode; Be connected to resistance R 2 between the drain electrode of said NMOS pipe M1 and M2, be connected to resistance R 1 between the drain electrode of NMOS pipe M5 and M6, and the grid of NMOS pipe M1 and M2 is connected the drain electrode of NMOS pipe M6 and M5 respectively; Said current amplifier also comprises NMOS pipe M4, the common-source common-gate current mirror that this NMOS pipe M4 and M5 constitute, thus make NMOS manage the input current I of M4 drain electrode end _InLeakage current I with NMOS pipe M5 _D5Equate; Said current amplifier also has NMOS pipe M3, MI3, M7 and M8, and wherein the source electrode of NMOS pipe MI3 is connected the drain electrode of NMOS pipe M3 and the drain electrode of NMOS pipe M7 respectively with drain electrode; NMOS pipe M2 and M3, M6 and M7 and M7 and M8 constitute common-source common-gate current mirror respectively, thereby make NMOS manage the output current I of M8 drain electrode end _OUT, NMOS pipe M2 leakage current I _D2And the leakage current I of NMOS pipe M6 _D6Equate; Said current amplifier also further comprises three operational amplifier A 1, A2 and A3, and the input voltage of the positive input terminal of said operational amplifier A 1 is V _A, its negative input end connects the drain electrode of NMOS pipe M1, and its output connects the grid of NMOS pipe MI1, is V thereby make the drain voltage of NMOS pipe M1 clamped down on _AThe positive input terminal of said operational amplifier A 2 and A3 interconnects; Negative input end connects the drain electrode of NMOS pipe M2 and M3 respectively; And output connects the grid of NMOS pipe MI2 and MI3 respectively, thereby makes the drain voltage of NMOS pipe M2 clamped down on the positive input terminal voltage V for operational amplifier _BThe source electrode of said NMOS pipe M4, M5, M6, M7 and M8 is connected power supply, the source ground of NMOS pipe M1, M2 and M3.

The resistance of said resistance R 2 is the twice of resistance R 1, thereby makes the gain of said current amplifier satisfy equality: $A_i=\frac{V_B}{V_A}.$

Said NMOS manages M1, M2 is identical with the breadth length ratio of M3, and the breadth length ratio of NMOS pipe MI1 and MI2 is identical, and the breadth length ratio of NMOS pipe M4, M5, M6, M7 and M8 is identical.

Description of drawings

Fig. 1 is the circuit structure of traditional linear gain structure current amplifier;

Fig. 2 is the circuit structure of wide adjustable extent, high linearity and the high-precision current amplifier of the present invention's proposition;

The circuit structure that Fig. 3 proposes for the present invention based on the current amplifier of the BCD technology of the NEC of Huahong;

Fig. 4 is the simulation result of circuit structure shown in Figure 3.

Embodiment

Fig. 2 is the circuit structure of wide adjustable extent, high linearity and the high-precision current amplifier of the present invention's proposition.

Can know by Fig. 2, through letting V respectively _DSM1Equal V _AWith let V _DSM2Equal V _B, make M1 and M2 be operated in triode region.So the drain current of M1 and M2 is respectively:

$I_{D1}={\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_1((V_{\mathrm{GSM}1}-V_{\mathrm{thM}1})V_{\mathrm{DSM}1}-\frac{1}{2}{V}_{\mathrm{DSM}1}^2)={\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_1(V_{\mathrm{GSM}1}-V_{\mathrm{thM}1}-\frac{1}{2}{V}_A)V_A$

(2.1)

$I_{D2}={\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_2((V_{\mathrm{GSM}2}-V_{\mathrm{thM}2})V_{\mathrm{DSM}2}-\frac{1}{2}{V}_{\mathrm{DSM}2}^2)={\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_2(V_{\mathrm{GSM}2}-V_{\mathrm{thM}2}-\frac{1}{2}{V}_B)V_B$

(2.2)

By formula (2.1) and (2.2), can get:

$\frac{I_{D1}}{I_{D2}}=\frac{{\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_1(V_{\mathrm{GSM}1}-V_{\mathrm{thM}1}-\frac{1}{2}{V}_A)V_A}{{\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_2(V_{\mathrm{GSM}2}-V_{\mathrm{thM}2}-\frac{1}{2}{V}_B)V_B}$

(2.3)

Select for use a pair of breadth length ratio identical; And mate good NMOS pipe as M2 and M3; Can know by Fig. 2; M2 and M3 constitute a pair of common-source common-gate current mirror, constitute one with operational amplifier A 3 and NMOS pipe MI3 simultaneously and manage the identical structure of MI2 with operational amplifier A 2 with NMOS, make the drain voltage of M3 equal the drain voltage of M2.So since the effect of the current mirror that M1 and M2 constituted, the drain current I of M2 _D2Equal the drain current I of M3 _D3Promptly

I _D2＝I _D3

(2.4)

In Fig. 2, for the structure that metal-oxide-semiconductor M7, MI3 and M3 constitute, electric current has only a current path through M7, MI3, M3 to ground connection from power supply, so the electric current of the M7 that flows through, MI3 and M3 is all identical, that is:

I _D3＝I _D7

(2.5)

Simultaneously, because M6 and M7 have constituted a pair of common-source common-gate current mirror, as long as the breadth length ratio of M6 and M7 is identical, we just can obtain:

I _D7＝I _D6

(2.6)

Composite type (2.4), (2.5) and (2.6) can obtain:

I _D2＝I _D6

(2.7)

With M1, M2 regards a broad sense current point as, and the electric current that flows into them has I _D5, I _D6, the electric current that flows out them has I _D1, I _D2By Kirchhoff's law (KCL), we can obtain equality:

I _D5+I _D6＝I _D1+I _D2

(2.8)

By formula (2.7) and (2.8), we can obtain:

I _D1＝I _D5

(2.9)

In like manner, regard MI1 and MI2 as a broad sense current point,, can draw by the KCL law:

I _D5+I _D6+I _R1＝I _D1+I _D2+I _R2

(2.10)

Composite type (2.7), (2.9) and (2.10), we can obtain:

I _R1＝I _R2

(2.11)

Refer again to Fig. 2, I _R1And I _R2Can calculate through following formula:

$I_{R1}=\frac{V_{G2}-V_{G1}}{R1}$

(2.12)

$I_{R2}=\frac{V_B-V_A}{R2}$

(2.13)

Through choosing suitable resistance, make R1=R, R2=2R=2R1, convolution (2.11), (2.12) and (2.13), we can obtain following result:

$V_{G1}-\frac{1}{2}{V}_A=V_{G2}-\frac{1}{2}{V}_B$

(2.14)

Refer again to Fig. 2, the voltage of node G1 is the gate source voltage of metal-oxide-semiconductor M1, i.e. V _G1=V _GSM1, same, the voltage of node G2 is the gate source voltage of metal-oxide-semiconductor M2, i.e. V _G2=V _GSM2, so formula (2.14) can be rewritten as:

$V_{\mathrm{GSM}1}-\frac{1}{2}{V}_A=V_{\mathrm{GSM}2}-\frac{1}{2}{V}_B$

(2.15)

Through adopting breadth length ratio identical and mate good metal-oxide-semiconductor M1 and M2, thereby make the threshold voltage V of metal-oxide-semiconductor M1 and M2 _ThM1And V _ThM2Identical, by formula (2.15), formula (2.3) can be rewritten:

$\frac{I_{D2}}{I_{D1}}=\frac{{\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_2(V_{\mathrm{GSM}2}-V_{\mathrm{thM}2}-\frac{1}{2}{V}_B)V_B}{{\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_1(V_{\mathrm{GSM}1}-V_{\mathrm{thM}1}-\frac{1}{2}{V}_A)V_A}=\frac{V_B}{V_A}$

(2.16)

Like Fig. 2, based on current mirror M4 and M5, M7 and M8, the gain A of this current amplifier _iBe shown below

$A_i=\frac{I_{\mathrm{OUT}}}{I_{\mathrm{IN}}}=\frac{I_{D7}}{I_{D4}}=\frac{I_{D6}}{I_{D5}}=\frac{I_{D2}}{I_{D1}}=\frac{V_B}{V_A}$

(2.17)

Visible by following formula, gain A _iWith two input voltage V _BAnd V _ARatio linear.And can know from top analysis; Therefore, current amplifier of the present invention has the more excellent linearity and accuracy because the gain of current amplifier of the present invention need not to ignore

and

.And M1 in this current amplifier and M2 are operated in triode region, but not the conventional current amplifier the dark triode region that will work, so the more traditional current amplifier of its adjustable extent is wider.

A preferred embodiment of current amplifier of the present invention will be described according to Fig. 3 and Fig. 4 below.

In circuit structure shown in Figure 3, itself and circuit structure shown in Figure 2 are basic identical.The difference of Fig. 2 and Fig. 3 only is that M6 among Fig. 2, M7 and M8 constitute basic common-source common-gate current mirror; This current mirror then constitutes the low pressure common-source common-gate current mirror by M6, M61, M7, M71, M8 and M81 among Fig. 3; This can be so that the output voltage swing of current mirror be littler, thereby improves precision.Same, the basic common-source common-gate current mirror that M4 and M5 constitute in Fig. 2 also changes the low pressure common-source common-gate current mirror accordingly into.In addition, the circuit structure of Fig. 3 is identical with the circuit structure of Fig. 2, and the operation principle of circuit shown in Figure 3 and Fig. 2 are also identical, repeat no more at this.

According to circuit structure shown in Figure 3, adopt the BCD technology of the NEC of Huahong, and the parameter setting of each element among Fig. 3 is following:

Metal-oxide-semiconductor M1, M2, M3: breadth length ratio (W/L)=15 μ m/8 μ m;

Metal-oxide-semiconductor MI1, MI2: breadth length ratio (W/L)=50 μ m/0.8 μ m;

Metal-oxide-semiconductor M4, M5, M6, M7, M8: breadth length ratio (W/L)=80 μ m/2 μ m;

Metal-oxide-semiconductor M41, M51, M61, M71, M81: breadth length ratio (W/L)=50 μ m/0.8 μ m;

Resistance: R1=40k Ω, R2=80k Ω, R3=50k Ω;

Through Computer Simulation software circuit structure shown in Figure 3 is carried out emulation, draw simulation result as shown in Figure 4.

As shown in Figure 4, Iin=40 μ A is set during emulation, VA=100mV, VB changes to 200mV from 50mV, and output Iout as a result changes to 78.41 μ A from 20.25 μ A.And can draw clearly from Fig. 4, current gain presents linear change.

Refer again to Fig. 4, when VB=200mV, simulation result I _OUT=-78.41 μ A, that is: therefore VB/VA=200mV/100mV=2, and Iout/Iin=-78.41 μ A/ (40 μ A)=1.96, through adjustment VB and VA, can obtain the precise current gain, and its error is merely (2-1.96)/2=2%.

Through being described in detail of preceding text, the invention provides a kind of new construction of current amplifier, the current amplifier of this new construction has wide region, LINEAR CONTINUOUS is adjustable and high accuracy.

Should be noted in the discussion above that the foregoing description only just for the ease of explanation the present invention, and also unrestricted the present invention.Those skilled in the art can make suitable modification to the present invention under the situation that does not break away from spirit of the present invention.And protection scope of the present invention is limited appending claims.

Claims (3)

1. current amplifier is characterized in that:

Said current amplifier has the high-precision current mirror that is made up of NMOS pipe M1, M2, MI1, MI2 and M5 and M6; The source electrode of said NMOS pipe MI1 is connected the drain electrode of NMOS pipe M1 and the drain electrode of NMOS pipe M5 respectively with drain electrode, and the source electrode of said NMOS pipe MI2 is connected the drain electrode of NMOS pipe M2 and the drain electrode of NMOS pipe M6 respectively with drain electrode; Be connected to resistance R 2 between the drain electrode of said NMOS pipe M1 and M2, be connected to resistance R 1 between the drain electrode of NMOS pipe M5 and M6, and the grid of NMOS pipe M1 and M2 is connected the drain electrode of NMOS pipe M6 and M5 respectively;

Said current amplifier also comprises NMOS pipe M4, the common-source common-gate current mirror that this NMOS pipe M4 and M5 constitute, thus make NMOS manage the input current I of M4 drain electrode end _InLeakage current I with NMOS pipe M5 _D5Equate;

Said current amplifier also has NMOS pipe M3, MI3, M7 and M8, and wherein the source electrode of NMOS pipe MI3 is connected the drain electrode of NMOS pipe M3 and the drain electrode of NMOS pipe M7 respectively with drain electrode; NMOS pipe M2 and M3, M6 and M7 and M7 and M8 constitute common-source common-gate current mirror respectively, thereby make NMOS manage the output current I of M8 drain electrode end _OUT, NMOS pipe M2 leakage current I _D2And the leakage current I of NMOS pipe M6 _D6Equate;

Said current amplifier also further comprises three operational amplifier A 1, A2 and A3, and the input voltage of the positive input terminal of said operational amplifier A 1 is V _A, its negative input end connects the drain electrode of NMOS pipe M1, and its output connects the grid of NMOS pipe MI1, is V thereby make the drain voltage of NMOS pipe M1 clamped down on _AThe positive input terminal of said operational amplifier A 2 and A3 interconnects; Negative input end connects the drain electrode of NMOS pipe M2 and M3 respectively; And output connects the grid of NMOS pipe MI2 and MI3 respectively, thereby makes the drain voltage of NMOS pipe M2 clamped down on the positive input terminal voltage V for operational amplifier A 2 and A3 _B;

The source electrode of said NMOS pipe M4, M5, M6, M7 and M8 is connected power supply, the source ground of NMOS pipe M1, M2 and M3.

2. current amplifier according to claim 1 is characterized in that:

The resistance of said resistance R 2 is the twice of resistance R 1, thereby makes the gain of said current amplifier satisfy equality:

.

3. current amplifier according to claim 1 is characterized in that:

Said NMOS manages M1, M2 is identical with the breadth length ratio of M3, and the breadth length ratio of NMOS pipe MI1 and MI2 is identical, and the breadth length ratio of NMOS pipe M4, M5, M6, M7 and M8 is identical.

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