Background technology
In Analog Circuit Design, the reference voltage reference circuit is one of requisite component units of many critical function modules.The purpose of voltage reference is to set up a direct voltage source that has nothing to do with temperature, technology and mains voltage variations.
The voltage reference technology of generally acknowledging is a bandgap reference voltage at present.The circuit that a kind of bandgap reference voltage utilization is directly proportional with absolute temperature is offset the negative temperature characteristic of bipolar transistor base-launch site voltage, thereby obtains constant output reference voltage, and output voltage values is generally about the band gap voltage 1.25V of silicon.And bandgap reference voltage can keep stable under the operating temperature range of different supply voltages and process conditions and broad.
The base of bipolar transistor-launch site voltage has negative temperature coefficient, and generally speaking, this temperature coefficient is approximately-1.5mV/ ℃.When two bipolar transistors are operated under the unequal current density, the difference of their base-launch site voltage just is directly proportional with absolute temperature.Generally speaking, the temperature coefficient of difference is that 1/3rd of single bipolar transistor base-launch site voltage temperature coefficient arrives sixth.
In traditional band-gap reference circuit, the general difference that adopts the base that recently amplifies two bipolar transistors-launch site voltage of two different resistance values, the temperature coefficient of itself and single bipolar transistor base-launch site voltage is offseted, obtained having the reference voltage of zero-temperature coefficient like this.
Adopt silicification technics to reduce the sheet resistance of polysilicon and diffusion region in traditional cmos process flow, thereby increased the length and the area of required resistance.The part technological process can adopt suicide block to increase resistance value, has meanwhile increased the cost of technology.And in traditional bandgap voltage reference circuit, generally adopt big resistance to reach the requirement of low-power consumption, so also make the cost of circuit increase greatly.
The factor that the reference voltage circuit design must be considered is required size of its circuit or chip area.Usually, the size of reference voltage circuit is decided by the main circuit design of integrated circuit.Reduce the required area of reference voltage circuit, help to make the circuit chip area to minimize or increase to supply the used area of main circuit design, thereby reduce chip cost.
In addition, the resistance that provides in the CMOS technology has certain temperature coefficient, thereby influence the performance of output reference voltage, and the Resistance model for prediction that technology manufacturer provides often precision is lower, therefore traditional bandgap voltage reference circuit performance often is subject to the performance of resistance and the levels of precision of model.
Along with the develop rapidly of deep submicron integrated circuit technology and handheld mobile device industry, the Analog Circuit Design of low-power consumption is just becoming the focus of research.In traditional reference circuit,, tend to adopt large-area resistance in order to reduce power consumption.If can make the reference circuit that need not resistive element, then can reduce its power consumption and cost greatly.
Summary of the invention
(1) technical matters that will solve
In view of this, fundamental purpose of the present invention is to provide a kind of low-power consumption bandgap voltage reference circuit that need not any resistive element, to reduce the power consumption and the cost of bandgap voltage reference circuit.
(2) technical scheme
In order to achieve the above object, technical scheme of the present invention is achieved in that
A kind of bandgap voltage reference circuit, this circuit comprises:
One V
BEVoltage generator 11, this V
BEVoltage generator 11 comprises a self-bias current source 111 that is used to produce two branch road reference circuits, and be coupled in this self-bias current source 111 be used to produce two-way V
BEThe bias generator 112 of voltage;
One reference voltage regulator 12, this reference voltage regulator 12 comprises operation transconductance amplifier 121 and reference voltage regulon 122, is used to produce a constant reference voltage; Wherein:
Self-bias current source 111 comprises PMOS transistor M1, M2 and nmos pass transistor M3, M4, wherein the source electrode of M1 and M2 is connected with reference power source, the drain electrode of the grid of M1, the grid of M2 and drain electrode and M4 directly is coupled, and the grid of the grid of the drain electrode of M1, M3 and drain electrode and M4 directly is coupled, and the source electrode of M3, M4 is connected with the launch site of pnp transistor D1 and D2 in the described bias generator 112 respectively;
Bias generator 112 comprises pnp transistor D1 and D2, the base of D1 and D2 and collecting zone ground connection, and the source electrode of M3 and M4 is connected respectively in launch site and the described self-bias current source 111;
Operation transconductance amplifier 121 comprises one road positive input terminal, one road negative input end and one road output terminal, wherein the grid of the transistor M7 in positive input terminal and the described reference voltage regulon 122 is connected, negative input end is connected with the source electrode of M3 in the described self-bias current source 111, and output is connected with the grid of transistor M5; Described transistor M5 is used to described reference voltage regulon 122 that direct current biasing is provided;
Reference voltage regulon 122 comprises PMOS transistor M6, M7 and M8, this transistor M6, M7 and M8 are the transistors of subthreshold value in the work, wherein the grid of transistor M6 and M7 is connected with drain electrode, and the grid of M8 is connected with the source electrode of M4 in the described self-bias current source 111; The substrate of described M6, M7 and M8 is connected with source electrode separately.
In the such scheme, the first via biasing that described bias generator 112 produces and the second tunnel biasing coupled in common produce the two-way reference voltage on described self-bias current source 111.
(3) beneficial effect
From technique scheme as can be seen, the present invention has following beneficial effect:
1, traditional band-gap reference circuit utilizes resistance that current transitions is become voltage form, and the gain of positive temperature coefficient (PTC) voltage is provided.Be operated in gate source voltage approximately linear reduction within the specific limits of the MOS transistor of sub-threshold region along with the rising of temperature.Based on this characteristic, the resistance of tradition in the band-gap reference circuit can be operated in the gain that the transistor form of sleeve of sub-threshold region replaces producing positive temperature coefficient (PTC) voltage, be used to offset the bipolar transistor base-emitter voltage of negative temperature coefficient, the reference source of a low-temperature coefficient of output, thereby avoided the use of resistance, reduced the power consumption and the area of circuit.
2, the present invention utilizes the transistor of subthreshold value workspace to replace resistance to amplify the voltage with positive temperature coefficient (PTC), thereby obtain low-power consumption, the bandgap voltage reference circuit of high integration has reached and has reduced the power consumption of bandgap voltage reference circuit and the purpose of cost.
3, bandgap voltage reference circuit provided by the invention has been eliminated the use of resistance, and the transistor of employing sub-threshold region has reduced the working current and the area of circuit, compares with traditional bandgap voltage reference circuit to have lower power consumption and cost.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
As shown in Figure 1, Fig. 1 is the circuit diagram of bandgap voltage reference circuit provided by the invention, and this circuit comprises V
BEVoltage generator 11 and reference voltage regulator 12.Wherein, this V
BEVoltage generator 11 comprises a self-bias current source 111 that is used to produce two branch road reference circuits, and be coupled in this self-bias current source 111 be used to produce two-way V
BEThe bias generator 112 of voltage.This reference voltage regulator 12 comprises operation transconductance amplifier 121 and reference voltage regulon 122, is used to produce a constant reference voltage.
Described V
BEVoltage generator 11 produces first via V
BEThe voltage and the second road V
BEVoltage, described first via V
BEVoltage is directly coupled on the described reference voltage regulon 122, described the second road V
BEVoltage is coupled on the described reference voltage regulon 122 by described operation transconductance amplifier 121.
Described self-bias current source 111 comprises PMOS transistor M1, M2 and nmos pass transistor M3, M4, wherein the source electrode of M1 and M2 is connected with reference power source, the drain electrode of the grid of M1, the grid of M2 and drain electrode and M4 directly is coupled, and the grid of the grid of the drain electrode of M1, M3 and drain electrode and M4 directly is coupled, and the source electrode of M3, M4 is connected with the launch site of pnp transistor D1 and D2 in the described bias generator 112 respectively.
Describedly be used to produce two-way V
BEThe bias generator 112 of voltage comprises pnp transistor D1 and D2, the base of D1 and D2 and collecting zone ground connection, and the source electrode of M3 and M4 is connected respectively in launch site and the described self-bias current source 111.The conduction region of described transistor D1 is N a times of described transistor D2 conduction region.
The first via biasing that described bias generator 112 produces and the second tunnel biasing coupled in common produce the two-way reference voltage on described self-bias current source 111.
Described operation transconductance amplifier 121 comprises one road positive input terminal, one road negative input end and one road output terminal, wherein the grid of the transistor M7 in positive input terminal and the described reference voltage regulon 122 is connected, negative input end is connected with the source electrode of M3 in the described self-bias current source 111, and output is connected with the grid of transistor M5.Described transistor M5 is used to described reference voltage regulon 122 that direct current biasing is provided.
Described reference voltage regulon 122 comprises PMOS transistor M6, M7 and M8, and the grid of described transistor M6 and M7 is connected with drain electrode, and the grid of M8 is connected with the source electrode of M4 in the described self-bias current source 111; The substrate of described M6, M7 and M8 is connected with source electrode separately.
Refer again to Fig. 1, pnp bipolar transistor D1 and D2 are used for producing two voltages 31 and 32 with negative temperature coefficient, and the temperature coefficient A of described node can be expressed as following formula:
A=(V
BE-2.5×V
T-E
g/q)/T (1)
In the described formula (1), V
BEExpression bipolar transistor D1 and D2 emitter voltage, E
gBe the band-gap energy of silicon, T is an absolute temperature.Therefore work as V
BEApproximate 750mV, during T=300K, V
BETemperature coefficient be about-1.5mV/ ℃.
Described node 31 is coupled to node 33 by operation transconductance amplifier 121, and therefore the direct current biasing of the output port of operation transconductance amplifier control reference voltage regulon 122 has:
V
31=V
33 (2)
By described (2) formula:
V
33-V
32=V
T×ln(n) (3)
V in described (3) formula
TBe thermal voltage, approximate 26mV at normal temperatures, N is the ratio of bipolar transistor D2 and D1 conduction region area.And because DC current flows through MOS transistor M6, M7 and M8, when described transistor drain arrives the voltage of source electrode greater than 4 times of V
TThe time, can obtain following three formulas:
I
M6=uC
dV
T 2W
M6/L
M6exp((V
35-V
34-|V
th,M6|)/(r×V
T)) (4)
I
M7=uC
dV
T 2W
M7/L
M7exp((V
34-V
33-|V
th,M7|)/(r×V
T)) (5)
I
M8=uC
dV
T 2W
M8/L
M8exp((V
33-V
32-|V
th,M8|)/(r×V
T)) (6)
In described formula (4)-(6), I is for flowing through transistorized electric current, and u is the mobility of minority carrier, C
dBe the depletion-layer capacitance under the grid, W and L are respectively the channel width and the length of MOS transistor, V
ThBe the threshold voltage of MOS transistor, r is the subthreshold value slope factor, and formula (4)-(6) can a conversion accepted way of doing sth (7)-(8):
r×V
T×ln(I
M6/(uC
dV
T 2W
M6/L
M6))=V
35-V
34-|V
th,M6| (7)
r×V
T×ln(I
M7/(uC
dV
T 2W
M7/L
M7))=V
34-V
33-|V
th,M7| (8)
r×V
T×ln(I
M8/(uC
dV
T 2W
M8/L
M8))=V
33-V
32-|V
th,M8| (9)
Because the substrate of transistor M6, M7 and M8 links to each other with separately source electrode respectively, has eliminated bulk effect, so has had:
|V
th,M6|=|V
th,M7|=|V
th,M8| (10)
With (9) * 2-(7)-(8), according to (10), then have simultaneously:
V
35=V
32+3×(V
33-V
32)+r×V
T×ln((W
M8/L
M8)
2/((W
M6/L
M6)×(W
M7/L
M7)))
(11)
Bring (3) formula into (11) Shi Kede:
V
35=V
32+3×V
T×ln(n)+r×V
T×ln((W
M8/L
M8)
2/((W
M6/L
M6)×(W
M7/L
M7)))
(12)
In (12) formula, node 35 is output reference voltage.First on equation the right is a negative temperature coefficient voltage in the described formula, and second is positive temperature coefficient (PTC) voltage, and the 3rd then is the adjusting item of positive temperature coefficient (PTC) voltage.Can be by the selection suitable parameters so that output node 35 has zero-temperature coefficient.
The example of employing actual value helps the design of account for voltage reference circuit.The temperature coefficient of supposing emitter bipolar transistor is-1.5mV/ ℃, and n is 24, V
TEqual 26mV, then, following formula arranged then in order to make output reference voltage have zero-temperature coefficient:
ln((W
M8/L
M8)
2/((W
M6/L
M6)×(W
M7/L
M7)))=(-V
32-3×V
T×ln(n))/(r×V
T)
(13)
Formula (13) both members is got differential, brings concrete numerical value again into, then can obtain:
(W
M8/L
M8)
2/((W
M6/L
M6)×(W
M7/L
M7))=180 (14)
When output reference voltage was zero-temperature coefficient, its value equaled the about 1.2V of band gap voltage of silicon, so again according to starting condition:
V
35|
T=T
0=1.2V (15)
Utilize work equation (4)-(6) of transistor M6, M7 and the M8 of subthreshold value workspace, can determine that the length of transistor M6, M7 and M8 is 0.4u, width is respectively 40u, 10u and 1u.Like this, the reference voltage reference circuit with zero-temperature coefficient is achieved.
Because transistor M6, M7 and M8 are operated in sub-threshold region, therefore the electric current that flows through can be for receiving the ampere level, and the input pipe of operation transconductance amplifier also can be operated in sub-threshold region certain gain is provided, and has reduced the power consumption of reference voltage circuit so greatly.
Fig. 2 is the temperature characteristics figure of voltage reference circuit output reference voltage shown in Figure 1.Curve map shown in Figure 2 is to adopt under the component value similar to described example, and the following simulation of the 0.18um CMOS mixed signal technology BSIM3V3 SPICE model that utilizes SMIC to provide draws.This figure is the center with 40 ℃, and temperature range is-40 ℃~120 ℃.In this temperature range, voltage changes between 1.210V and 1.216V, and amplitude of variation is 6mV, and temperature coefficient is 31ppm/ ℃, and ppm represents 1,000,000/, the total current of circuit is less than 3 micromicroamperes.
Fig. 3 is that voltage reference circuit output reference voltage shown in Figure 1 is with the mains voltage variations curve map.The technology that adopts is with described in Fig. 2.Response when the figure shows output reference voltage and from 0V to 5V, changing with supply voltage.When supply voltage rises from 0V, output reference voltage is also along with rising; When supply voltage was elevated to 1.5V, output reference voltage rose to 1.2V, and kept substantially constant subsequently, until supply voltage rises to 5V.In this mains voltage variations scope, voltage changes in (under the room temperature) between 1.211V and the 1.233V, and amplitude of variation is 22mV, and the supply voltage rejection coefficient is 6mV/V.
So far, be appreciated that the voltage reference circuit of this non-resistance provided by the invention.For MOS transistor, when leakage current remains unchanged, be operated in transistorized gate source voltage approximately linear reduction within the specific limits of weak inversion regime along with the rising of temperature.Utilize the transistor that is operated in sub-threshold region of a plurality of tube-in-tube structures can replace resistance to amplify voltage with positive temperature coefficient (PTC), itself and the bipolar transistor base-launch site voltage with negative temperature coefficient are offseted, thereby produced temperature independent reference voltage.Owing to eliminated the use of resistance, thereby reduced the power consumption and the area of circuit.
Based on bandgap voltage reference circuit shown in Figure 1, the present invention also provides a kind of method that bandgap voltage reference circuit produces reference voltage of using, and this method may further comprise the steps:
Produce two reference voltages with negative temperature coefficient;
These two reference voltages that produce are subtracted each other the voltage that obtains having positive temperature coefficient (PTC);
Amplify the voltage that this has positive temperature coefficient (PTC);
Two voltage additions with Positive and Negative Coefficient Temperature with equating obtain reference voltage.
This voltage with positive temperature coefficient (PTC) of described amplification is to be finished by the transistor that is in the subthreshold value workspace; Described reference voltage produces by a base-launch site voltage drop with through the voltage sum with equal positive temperature coefficient (PTC) of amplifying.
Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.