CN113381702B - Low noise amplifier, radio frequency receiver and radio frequency terminal - Google Patents
Low noise amplifier, radio frequency receiver and radio frequency terminal Download PDFInfo
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- CN113381702B CN113381702B CN202110669543.2A CN202110669543A CN113381702B CN 113381702 B CN113381702 B CN 113381702B CN 202110669543 A CN202110669543 A CN 202110669543A CN 113381702 B CN113381702 B CN 113381702B
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/302—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in bipolar transistor amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
Abstract
The embodiment of the application provides a low-noise amplifier, a radio frequency receiver and a radio frequency terminal, which are applied to the technical field of wireless communication. The low noise amplifier comprises a current source, a mirror image module, an amplifying module and a negative feedback module; the mirror image module and the amplifying module form a mirror image current source circuit together; the negative feedback module is respectively connected with the mirror image module and the amplifying module; the amplifying module comprises a current amplifying transistor, the mirror module comprises a mirror transistor in mirror image relation with the current amplifying transistor, and the negative feedback module is used for controlling the source drain voltage of the current amplifying transistor to follow the source drain voltage of the mirror transistor or controlling the drain current of the mirror transistor to follow the reference bias current so as to stabilize the ratio between the static bias current and the reference bias current. By adding the negative feedback module in the low noise amplifier, the ratio between the static bias current and the reference bias current can be stabilized when the process angle and the temperature change, so that the performance of the low noise amplifier can be stabilized.
Description
Technical Field
The present application relates to the field of wireless communications technologies, and in particular, to a low noise amplifier, a radio frequency receiver, and a radio frequency terminal.
Background
In the design process of the low noise amplifier (low noise amplifier, LNA), as the application frequency band is higher and higher, the application frequency band is developed from 1.9GHz in the 2G age to sub-6G in the 5G age, and in order to ensure the low noise performance of the low noise amplifier, the channel length of a transistor in the low noise amplifier needs to be designed to be smaller and smaller.
As the channel length of the transistor in the low noise amplifier is smaller and smaller, the short channel modulation effect is more and more obvious, and thus the influence of the source drain voltage Vds of the transistor in the low noise amplifier on the static bias current is more and more obvious, and the source drain voltage Vds of the transistor is actually changed along with the change of the process angle and the temperature, and the change can cause the change of the static bias current of the low noise amplifier, and further cause the change of the performance (such as the gain) of the low noise amplifier.
Disclosure of Invention
The embodiment of the application provides a low-noise amplifier, a radio frequency receiver and a radio frequency terminal, which are applied to the technical field of wireless communication of terminal equipment and are beneficial to improving the problem of performance change of the low-noise amplifier when process angles and temperatures change.
In a first aspect, an embodiment of the present application provides a low noise amplifier, including: the system comprises a current source, a mirror image module, an amplifying module and a negative feedback module;
The current source is used for generating a reference bias current;
the mirror module is respectively connected with the current source and the amplifying module, and the mirror module and the amplifying module form a mirror current source circuit together; the mirror current source circuit is used for mirroring the reference bias current to obtain a static bias current;
the negative feedback module is respectively connected with the mirror image module and the amplifying module;
the amplifying module comprises a current amplifying transistor, and the mirror image module comprises a mirror image transistor in mirror image relation with the current amplifying transistor; the negative feedback module is used for controlling the source-drain voltage of the current amplifying transistor to follow the source-drain voltage of the mirror transistor or controlling the drain current of the mirror transistor to follow the reference bias current so as to stabilize the ratio between the static bias current and the reference bias current.
Optionally, the amplifying module includes a first amplifying unit and a second amplifying unit, and the first amplifying unit includes a current amplifying transistor;
the control end of the first amplifying unit is connected with the mirror image module, the first end of the first amplifying unit is connected with the grounding end, and the second end of the first amplifying unit is connected with the first end of the second amplifying unit;
the second end of the second amplifying unit is connected with the first power supply voltage end.
Optionally, the negative feedback module comprises a voltage regulating unit, a first input end of the voltage regulating unit is connected with a drain electrode of the mirror image transistor, and a second input end of the voltage regulating unit is connected with a drain electrode of the current amplifying transistor;
the voltage regulating unit is used for controlling the source-drain voltage of the current amplifying transistor to follow the source-drain voltage of the mirror image transistor.
Optionally, the voltage regulating unit includes a first operational amplifier, the mirror module includes a first transistor, and the first transistor is a mirror transistor;
the non-inverting input end of the first operational amplifier is connected with the drain electrode of the first transistor, the inverting input end of the first operational amplifier is connected with the drain electrode of the current amplifying transistor, and the output end of the first operational amplifier is connected with the control end of the second amplifying unit;
the grid electrode and the drain electrode of the first transistor are connected with a current source, the grid electrode of the first transistor is also connected with the control end of the first amplifying unit, and the source electrode of the first transistor is connected with a grounding end.
Optionally, the mirroring module includes a second transistor, where the second transistor is a mirroring transistor; the voltage regulating unit comprises a second operational amplifier and a third transistor;
the non-inverting input end of the second operational amplifier is connected with the drain electrode of the current amplifying transistor, the inverting input end of the second operational amplifier is connected with the drain electrode of the second transistor, and the output end of the second operational amplifier is connected with the grid electrode of the third transistor;
The drain electrode of the third transistor is connected with a current source, and the source electrode of the third transistor is connected with the drain electrode of the second transistor;
the grid electrode of the second transistor is connected with the current source and the control end of the first amplifying unit, and the source electrode of the second transistor is connected with the grounding end.
Optionally, the negative feedback module includes a current adjusting unit, and the current adjusting unit is respectively connected with the current source, the mirror module and the amplifying module, and is used for controlling the drain current of the mirror transistor to follow the reference bias current.
Optionally, the mirroring module includes a fourth transistor and a fifth transistor, and the current adjusting unit includes a sixth transistor, a seventh transistor, an eighth transistor, and a ninth transistor;
the grid electrode of the fourth transistor is connected with the current source and the control end of the first amplifying unit, the source electrode of the fourth transistor is connected with the grounding end, and the drain electrode of the fourth transistor is connected with the source electrode of the fifth transistor;
a grid electrode of the fifth transistor is connected with a control end of the second amplifying unit, and a drain electrode of the fifth transistor is connected with a grid electrode and a drain electrode of the sixth transistor;
the source electrode of the sixth transistor is connected with the first power supply voltage end;
a grid electrode of the seventh transistor is connected with a grid electrode of the sixth transistor, a source electrode of the seventh transistor is connected with the first power supply voltage end, and a drain electrode of the seventh transistor is connected with a drain electrode and a grid electrode of the eighth transistor;
The source electrode of the eighth transistor is connected with the grounding end;
the grid of the ninth transistor is connected with the grid of the eighth transistor, the source electrode of the ninth transistor is connected with the ground terminal, and the drain electrode of the ninth transistor is connected with the current source, the grid of the fourth transistor and the control terminal of the first amplifying unit.
Optionally, the mirroring module includes a tenth transistor and an eleventh transistor, and the current adjusting unit includes a twelfth transistor and a first resistor;
a grid electrode of the tenth transistor is connected with a control end of the first amplifying unit, a source electrode of the tenth transistor is connected with a grounding end, and a drain electrode of the tenth transistor is connected with a source electrode of the eleventh transistor;
the grid electrode of the eleventh transistor is connected with the control end of the second amplifying unit, and the drain electrode of the eleventh transistor is connected with the current source;
a grid electrode of the twelfth transistor is connected with the current source, a source electrode of the twelfth transistor is connected with the first power supply voltage end, and a drain electrode of the twelfth transistor is connected with the first end of the first resistor;
the first end of the first resistor is also connected with the grid electrode of the tenth transistor, and the second end of the first resistor is connected with the grounding end.
Optionally, the first amplifying unit includes a thirteenth transistor, a first inductor and a second inductor, where the thirteenth transistor is a current amplifying transistor; the second amplifying unit comprises a fourteenth transistor and a third inductor;
The first end of the first inductor is connected with the mirror image module and the radio frequency input end, and the second end of the first inductor is connected with the grid electrode of the thirteenth transistor;
a source electrode of the thirteenth transistor is connected with the first end of the second inductor, and a drain electrode of the thirteenth transistor is connected with a source electrode of the fourteenth transistor;
the second end of the second inductor is connected with the grounding end;
the drain electrode of the fourteenth transistor is connected with the first end of the third inductor and the radio frequency output end;
the second end of the third inductor is connected with the first power supply voltage end.
Optionally, the low noise amplifier further comprises an isolation module, and the isolation module is respectively connected with the mirror module and the radio frequency input end.
Optionally, the isolation module includes a second resistor, a first end of the second resistor is connected to the rf input terminal, and a second end of the second resistor is connected to the mirror module.
In a second aspect, an embodiment of the present application provides a radio frequency receiver, including the low noise amplifier described above.
In a third aspect, an embodiment of the present application provides a radio frequency terminal, including the radio frequency receiver described above.
In the embodiment of the application, a current source, a mirror image module, an amplifying module and a negative feedback module are arranged in a low noise amplifier; the current source is used for generating reference bias current, and the mirror image module and the amplifying module form a mirror image current source circuit together; the negative feedback module is respectively connected with the mirror image module and the amplifying module; the negative feedback module is used for controlling the source-drain voltage of the current amplifying transistor to follow the source-drain voltage of the mirror transistor or controlling the drain current of the mirror transistor to follow the reference bias current so as to stabilize the ratio between the static bias current and the reference bias current. By adding the negative feedback module in the low noise amplifier, when the process angle and the temperature change, the negative feedback module can control the source-drain voltage of the current amplifying transistor and the source-drain voltage of the mirror transistor to follow, thereby improving the phenomenon that the ratio between the static bias current and the reference bias current changes due to the change of the source-drain voltage of the current amplifying transistor and the source-drain voltage of the mirror transistor; or when the process angle and the temperature change, the negative feedback module can control the drain current of the mirror transistor to follow the reference bias current, and the mirror transistor and the current amplifying transistor are in mirror relation, so that the static bias current and the reference bias current can be followed. Therefore, the ratio between the static bias current and the reference bias current can be stabilized through the negative feedback module so as to stabilize the performance of the low noise amplifier.
Drawings
Fig. 1 is a schematic diagram of a low noise amplifier in the related art;
fig. 2 is a schematic structural diagram of a low noise amplifier according to an embodiment of the present application;
fig. 3 is a circuit diagram of a first low noise amplifier according to an embodiment of the present application;
fig. 4 is a circuit diagram of a second low noise amplifier according to an embodiment of the present application;
fig. 5 is a circuit diagram of a third low noise amplifier according to an embodiment of the present application;
fig. 6 is a circuit diagram of a fourth low noise amplifier according to an embodiment of the present application;
fig. 7 is a schematic diagram showing a comparison of static bias currents of a low noise amplifier according to an embodiment of the present application and a low noise amplifier according to a related art.
Detailed Description
In order to clearly describe the technical solution of the embodiments of the present application, in the embodiments of the present application, the words "first", "second", etc. are used to distinguish the same item or similar items having substantially the same function and effect. For example, the first chip and the second chip are merely for distinguishing different chips, and the order of the different chips is not limited. It will be appreciated by those of skill in the art that the words "first," "second," and the like do not limit the amount and order of execution, and that the words "first," "second," and the like do not necessarily differ.
It should be noted that, in the embodiments of the present application, words such as "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "for example" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.
In the embodiments of the present application, "at least one" means one or more, and "a plurality" means two or more. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a alone, a and B together, and B alone, wherein a, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b, or c may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or plural.
In the related art, as shown in fig. 1, the low noise amplifier includes a current source 10, a first transistor M1, a second transistor M2, a third transistor M3, a first inductor L1, a second inductor L2, a third inductor L3, and a first resistor R1, where the current source 10 is used for generating a reference bias current Ibias, the third transistor M3 and the first transistor M1 together form a mirrored current source circuit, and the channel width-to-length ratio of the first transistor M1 is K times the channel width-to-length ratio of the third transistor M3, and the reference bias current Ibias is mirrored and biased into a static bias current i_lna, i_lna=k×ibias by the mirrored current source circuit.
In practical products, the quiescent bias current i_lna in a low noise amplifier is not only controlled by the gate-source voltage Vgs of the transistor, but also by the source-drain voltage Vds of the transistor itself. However, when the channel length of the transistors in the low noise amplifier (e.g., the first transistor M1 and the third transistor M3 in fig. 1) is relatively long, the short channel modulation effect of the transistors is not obvious, and the source-drain voltage Vds of the transistors has a small influence on the static bias current i_lna in the low noise amplifier, and its influence on the static bias current i_lna can be ignored in design.
However, as the application frequency band of the low noise amplifier is higher, in order to ensure the low noise performance of the low noise amplifier, the channel length of the transistor in the low noise amplifier needs to be designed smaller and smaller, which results in more and more obvious short channel modulation effect, and further results in more and more obvious influence of the source-drain voltage Vds of the transistor on the static bias current i_lna. Even if the source-drain voltage of the first transistor M1 and the source-drain voltage of the third transistor M3 are designed to be equal in the initial stage of design, the source-drain voltage of the first transistor M1 and the source-drain voltage of the third transistor M3 may deviate under the variation of the process angle and the temperature, so that the mirror ratio K of the first transistor M1 and the third transistor M3 forming the mirror current source circuit may vary with the variation of the source-drain voltage of the first transistor M1 and the source-drain voltage of the third transistor M3, which may cause the variation of the static bias current i_lna of the low noise amplifier and thus the variation of the performance (e.g., gain) of the low noise amplifier.
Based on this, the embodiment of the application provides a low noise amplifier, by adding a negative feedback module in the low noise amplifier, when the process angle and the temperature change, the ratio K between the static bias current I_LNA and the reference bias current Ibias is stabilized by the negative feedback module, so as to stabilize the performance of the low noise amplifier.
It should be noted that, in the process of manufacturing a semiconductor device, due to the position difference on the same wafer or the difference between wafers in different batches, parameters of transistors may be different, so that in order to reduce design difficulty, it is necessary to limit the device performance within a certain range, discard chips beyond the range, and strictly control the expected parameter variation, where a process corner (process corner) is the performance range.
Referring to fig. 2, a schematic diagram of a low noise amplifier according to an embodiment of the present application is shown.
The low noise amplifier in the embodiment of the application comprises: the device comprises a current source 10, a mirror image module 20, an amplifying module 30 and a negative feedback module 40; the current source 10 is used for generating a reference bias current Ibias; the mirror module 20 is respectively connected with the current source 10 and the amplifying module 30, and the mirror module 20 and the amplifying module 30 form a mirror current source circuit together, and the mirror current source circuit is used for mirroring the reference bias current Ibias to obtain a static bias current I_LNA; the negative feedback module 40 is respectively connected with the mirror module 20 and the amplifying module 30; wherein the amplifying module 30 comprises a current amplifying transistor, and the mirror module 20 comprises a mirror transistor in mirror image relationship with the current amplifying transistor; the negative feedback module 40 is used for controlling the source-drain voltage of the current amplifying transistor to follow the source-drain voltage of the mirror transistor, or controlling the drain current of the mirror transistor to follow the reference bias current Ibias, so as to stabilize the ratio between the static bias current i_lna and the reference bias current Ibias.
The current source 10 is configured to generate a reference bias current Ibias, and provide the reference bias current Ibias to a mirror current source circuit formed by the mirror module 20 and the amplifying module 30 together, when channel lengths of transistors in the mirror module 20 and the amplifying module 30 are larger, a static bias current i_lna obtained by mirroring the reference bias current Ibias by the mirror current source circuit is equal to K times the reference bias current Ibias, where K is a ratio of a channel width-length ratio of a current amplifying transistor in the amplifying module 30 to a channel width-length ratio of a mirror transistor in the mirror module 20.
When the channel lengths of the transistors in the mirror module 20 and the amplifying module 30 are smaller, the ratio between the static bias current i_lna obtained by mirroring the reference bias current Ibias and the reference bias current Ibias deviates from K, so that the negative feedback module 40 is added in the low noise amplifier, the negative feedback module 40 is respectively connected with the mirror module 20 and the amplifying module 30, the ratio between the static bias current i_lna and the reference bias current Ibias is stabilized through the negative feedback module 40, that is, the static bias current i_lna is stabilized near the K times of Ibias through the negative feedback module 40 under the changes of the process angle and the temperature.
Specifically, the negative feedback module 40 may be implemented by a voltage input type operational amplifier, or may be implemented by a current input type operational amplifier. The voltage-input-based operational amplifier can control the source-drain voltage of the current amplifying transistor to follow the source-drain voltage of the mirror transistor so as to stabilize the static bias current I_LNA near Ibias which is K times; the drain current of the mirror transistor can be controlled to follow the reference bias current Ibias through the current input type operational amplifier, and the drain current of the mirror transistor is always 1/K times of the static bias current I_LNA when the mirror transistor is a duplication branch circuit of the current amplifying transistor, so that the static bias current I_LNA also follows the reference bias current Ibias, and the static bias current I_LNA is stabilized near the K times of Ibias.
It should be noted that the static bias current refers to: the current amplifying transistor in the amplifying module 30 has a drain through which current flows when no rf input signal is present at the rf input. The amplifying module 30 is connected with the rf input end and the rf output end, and is used for amplifying the rf signal input by the rf input end and outputting the amplified rf signal to the rf output end.
As shown in fig. 2, the amplifying module 30 includes a first amplifying unit 31 and a second amplifying unit 32, the first amplifying unit 31 including a current amplifying transistor; the control end of the first amplifying unit 31 is connected with the mirror module 20, the first end of the first amplifying unit 31 is connected with the grounding end, and the second end of the first amplifying unit 31 is connected with the first end of the second amplifying unit 32; a second terminal of the second amplifying unit 32 is connected to the first power supply voltage terminal.
In practical products, the first amplifying unit 31 mainly performs a current amplifying function to amplify a radio frequency signal inputted from the radio frequency input terminal, and the second amplifying unit 32 mainly performs a voltage amplifying function and an isolating function to amplify the radio frequency signal amplified by the first amplifying unit 31 and reduce an influence of a post-stage circuit connected to the radio frequency output terminal on a gain of the amplifying module 30.
In an alternative embodiment, as shown in fig. 3 and 4, the negative feedback module 40 includes a voltage adjusting unit (such as the first operational amplifier OP1 in fig. 3, or the second operational amplifier OP2 and the third transistor M3 in fig. 4), a first input terminal of the voltage adjusting unit is connected to a drain of the mirror transistor (such as the first transistor M1 in fig. 3 or the second transistor M2 in fig. 4), and a second input terminal of the voltage adjusting unit is connected to a drain of the current amplifying transistor (such as the thirteenth transistor M13 in fig. 3 and 4); the voltage regulating unit is used for controlling the source-drain voltage of the current amplifying transistor to follow the source-drain voltage of the mirror image transistor.
At this time, the current amplifying transistor in the amplifying module 30 and the mirror transistor in the mirror module 20 are in a mirror relationship, the gate of the current amplifying transistor is connected to the gate of the mirror transistor, and the source of the current amplifying transistor and the source of the mirror transistor are both connected to the ground terminal, so that the source voltage of the current amplifying transistor is equal to the source voltage of the mirror transistor.
When the first input end of the voltage regulating unit is connected with the drain electrode of the mirror transistor, the second input end of the voltage regulating unit is connected with the drain electrode of the current amplifying transistor, the drain electrode of the mirror transistor and the drain electrode of the current amplifying transistor are in virtual short through the voltage regulating unit, so that the drain voltage of the mirror transistor and the drain electrode of the current amplifying transistor follow, and as the source voltage of the current amplifying transistor and the source voltage of the mirror transistor are equal, the source-drain voltage of the mirror transistor and the source-drain voltage of the current amplifying transistor also follow. This follows is true both at process corners and at temperature, so that it is possible to realize a synchronous follow of the source-drain voltage of the mirror transistor and the source-drain voltage of the current amplifying transistor at different process corners and temperatures based on the voltage regulating unit.
Where the source-drain voltage refers to the difference between the drain voltage and the source voltage, "virtual short" refers to the first and second inputs being nearly as short-circuited in electrical performance, but in practice the first and second inputs are not physically shorted.
As shown in fig. 3, the voltage adjusting unit includes a first operational amplifier OP1, the mirroring module 20 includes a first transistor M1, and the first transistor M1 is a mirroring transistor; the non-inverting input terminal of the first operational amplifier OP1 is connected to the drain of the first transistor M1, the inverting input terminal of the first operational amplifier OP1 is connected to the drain of the current amplifying transistor (e.g., the thirteenth transistor M13 in fig. 3), and the output terminal of the first operational amplifier OP1 is connected to the control terminal of the second amplifying unit 32 (e.g., the gate of the fourteenth transistor M14 in fig. 3); the gate and drain of the first transistor M1 are connected to the current source 10, the gate of the first transistor M1 is also connected to the control terminal of the first amplifying unit 31, and the source of the first transistor M1 is connected to the ground terminal GND.
At this time, the first transistor M1 and the current amplifying transistor in the amplifying module 30 form a mirror current source circuit, the first transistor M1 is a transistor in a reference current branch in the mirror current source circuit, the current amplifying transistor in the amplifying module 30 is a transistor in a mirror output current branch in the mirror current source circuit, and the current amplifying transistor in the amplifying module 30 also performs a function of amplifying the radio frequency signal.
The ratio of the channel width-to-length ratio of the current amplifying transistor in the amplifying module 30 to the channel width-to-length ratio of the first transistor M1 is K. At the beginning of the design, the source-drain voltage of the first transistor M1 is made equal to the source-drain voltage of the current amplifying transistor.
The first operational amplifier OP1 adopts a high gain design, so that the first operational amplifier OP1 is close to an ideal operational amplifier, and the first operational amplifier OP1 is a voltage input type operational amplifier. The non-inverting input terminal of the first operational amplifier OP1 is connected to the drain of the first transistor M1, the inverting input terminal of the first operational amplifier OP1 is connected to the drain of the current amplifying transistor, and the output terminal of the first operational amplifier OP1 is connected to the control terminal of the second amplifying unit 32. The output terminal of the first operational amplifier OP1 adjusts the voltage of the Net2 node (i.e., the drain voltage of the current amplifying transistor) through the second amplifying unit 32, that is, the output terminal of the first operational amplifier OP1 adjusts the voltage of the inverting input terminal of the first operational amplifier OP1 through the second amplifying unit 32, at this time, the inverting input terminal of the first operational amplifier OP1, the output terminal of the first operational amplifier OP1 and the second amplifying unit 32 form a negative feedback closed loop, so that the drain voltage of the current amplifying transistor follows the drain voltage of the first transistor M1, that is, the voltage of the Net2 node follows the voltage of the Net1 node, so that the source drain voltage of the first transistor M1 follows the source drain voltage of the current amplifying transistor.
It should be noted that, the above "voltage follows" means that at the same time, the voltages are substantially equal; the first transistor M1 is an N-type transistor; also, the transistors in the first transistor M1, the current amplifying transistor, and the second amplifying unit 32 all adopt a short channel length design.
As shown in fig. 4, the mirror module 20 includes a second transistor M2, and the second transistor M2 is a mirror transistor; the voltage regulating unit includes a second operational amplifier OP2 and a third transistor M3; the non-inverting input terminal of the second operational amplifier OP2 is connected to the drain of the current amplifying transistor (e.g., thirteenth transistor M13 in fig. 4), the inverting input terminal of the second operational amplifier OP2 is connected to the drain of the second transistor M2, and the output terminal of the second operational amplifier OP2 is connected to the gate of the third transistor M3; the drain of the third transistor M3 is connected to the current source 10, and the source of the third transistor M3 is connected to the drain of the second transistor M2; the gate of the second transistor M2 is connected to the current source 10 and the control terminal of the first amplifying unit 31, and the source of the second transistor M2 is connected to the ground terminal GND.
At this time, the second transistor M2 and the current amplifying transistor in the amplifying module 30 form a mirror current source circuit, the second transistor M2 is a transistor in a reference current branch in the mirror current source circuit, the current amplifying transistor in the amplifying module 30 is a transistor in a mirror output current branch in the mirror current source circuit, and the current amplifying transistor in the amplifying module 30 also performs a function of amplifying the radio frequency signal.
The ratio of the channel width-to-length ratio of the current amplifying transistor in the amplifying module 30 to the channel width-to-length ratio of the second transistor M2 is K. At the beginning of the design, the source-drain voltage of the second transistor M2 is made equal to the source-drain voltage of the current amplifying transistor.
The second operational amplifier OP2 adopts a high gain design, so that the second operational amplifier OP2 is close to an ideal operational amplifier, and the second operational amplifier OP2 is a voltage input type operational amplifier. The non-inverting input terminal of the second operational amplifier OP2 is connected to the drain of the current amplifying transistor, the inverting input terminal of the second operational amplifier OP2 is connected to the drain of the second transistor M2, and the output terminal of the second operational amplifier OP2 is connected to the gate of the third transistor M3. The output terminal of the second operational amplifier OP2 adjusts the voltage of the Net3 node (i.e., the drain voltage of the second transistor M2) through the third transistor M3, that is, the output terminal of the first operational amplifier OP2 adjusts the voltage of the inverting input terminal of the first operational amplifier OP2 through the third transistor M3, at this time, the inverting input terminal of the second operational amplifier OP2, the third transistor M3 and the output terminal of the second operational amplifier OP2 form a negative feedback closed loop, so that the drain voltage of the second transistor M2 follows the drain voltage of the current amplifying transistor, that is, the voltage of the Net3 node follows the voltage of the Net2 node, so that the source drain voltage of the second transistor M2 follows the source drain voltage of the current amplifying transistor.
Note that, the second transistor M2 and the third transistor M3 are both N-type transistors; and, the second transistor M2, the third transistor M3, the current amplifying transistor, and the transistors in the second amplifying unit 32 are all designed with a short channel length.
In another alternative embodiment, as shown in fig. 5 and 6, the negative feedback module 40 includes a current adjusting unit respectively connected to the current source 10, the mirroring module 20 and the amplifying module 30 for controlling the drain current of the mirroring transistor (e.g. the fourth transistor M4 in fig. 5 or the tenth transistor M10 in fig. 6) to follow the reference bias current Ibias.
At this time, it is necessary to set the channel width-to-length ratio of the mirror transistor in the mirror module 20 to 1/K times the channel width-to-length ratio of the current amplifying transistor in the first amplifying unit 31, and the channel width-to-length ratio of the other transistor in the mirror module 20 other than the mirror transistor is 1/K times the channel width-to-length ratio of the transistor in the second amplifying unit 32; the gate voltage of the other transistor except the mirror transistor in the mirror module 20 is equal to the gate voltage of the transistor in the second amplifying unit 32, the source voltage of the mirror transistor is equal to the gate voltage of the current amplifying transistor, and the source voltage of the mirror transistor is equal to the source voltage of the current amplifying transistor, so that the mirror module 20 can be regarded as a proportional copy branch of the amplifying module 30, that is, when the process angle and the temperature change, the drain current of the current amplifying transistor is always K times the drain current of the mirror transistor.
The drain current of the current amplifying transistor, that is, the static bias current i_lna, the drain current ifb=i_lna/K of the mirror transistor, and by reasonably setting the composition and connection relationship of the mirror module 20, the mirror module 20 extracts the current Ifb of the static bias current at different process angles and temperatures according to a certain proportion.
The devices in the current adjusting unit together form a current input type operational amplifier, the non-inverting input end of the current input type operational amplifier is connected with the current source 10, the inverting input end of the current input type operational amplifier is connected with the drain electrode of the mirror transistor in the mirror module 20, and the drain current of the mirror transistor and the reference bias current Ibias output by the current source 10 are 'virtually shortened' through the current input type operational amplifier, so that the drain current Ifb of the mirror transistor follows the reference bias current Ibias.
The drain current Ifb of the mirror transistor is 1/K times the static bias current i_lna, so the static bias current i_lna also follows the reference bias current Ibias, stabilizing the static bias current i_lna around the K times Ibias.
The drain current of the mirror transistor and the reference bias current Ibias output by the current source 10 are referred to as a current "virtual short", that is, the drain current of the mirror transistor and the reference bias current Ibias output by the current source 10 are equal.
As shown in fig. 5, the mirroring module 20 includes fourth and fifth transistors M4 and M5, and the current adjusting unit includes sixth, seventh, eighth and ninth transistors M6, M7, M8 and M9; the gate of the fourth transistor M4 is connected to the current source 10 and the control terminal of the first amplifying unit 31, the source of the fourth transistor M4 is connected to the ground terminal GND, and the drain of the fourth transistor M4 is connected to the source of the fifth transistor M5; a gate of the fifth transistor M5 is connected to the control terminal of the second amplifying unit 32, and a drain of the fifth transistor M5 is connected to the gate and the drain of the sixth transistor M6; the source electrode of the sixth transistor M6 is connected with the first power supply voltage end VCC; the gate of the seventh transistor M7 is connected to the gate of the sixth transistor M6, the source of the seventh transistor M7 is connected to the first power supply voltage terminal VCC, and the drain of the seventh transistor M7 is connected to the drain and the gate of the eighth transistor M8; the source of the eighth transistor M8 is connected to the ground GND; the gate of the ninth transistor M9 is connected to the gate of the eighth transistor M8, the source of the ninth transistor M9 is connected to the ground GND, and the drain of the ninth transistor M9 is connected to the current source 10, the gate of the fourth transistor M4, and the control terminal of the first amplifying unit 31.
At this time, the channel width-to-length ratio of the fourth transistor M4 is 1/K times that of the current amplifying transistor, and the channel width-to-length ratio of the fifth transistor M5 is 1/K times that of the transistor in the second amplifying unit 32; the gate of the fifth transistor M5 is connected to the control terminal of the second amplifying unit 32, the gate voltage of the fourth transistor M4 is equal to the gate voltage of the current amplifying transistor, the source voltage of the fourth transistor M4 is equal to the source voltage of the current amplifying transistor, so that the gate-source voltage of the fifth transistor M5 is equal to the gate-source voltage of the transistor in the second amplifying unit 32, and the consistency is also established under the process angle and temperature variation, therefore, the drain current Ifb of the fourth transistor M4 is always 1/K times the drain current i_lna of the current amplifying transistor, which is achieved by the gate voltage, the source voltage and the drain voltage of the fourth transistor M4 being respectively equal to the gate voltage, the source voltage and the drain voltage of the current amplifying transistor.
The sixth transistor M6, the seventh transistor M7, the eighth transistor M8, and the ninth transistor M9 together form a current input type operational amplifier, and since the current input type operational amplifier is not a transistor participating in the amplifying function in the low noise amplifier, the channel lengths of the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, and the ninth transistor M9 do not need to use the minimum channel restriction, i.e., the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, and the ninth transistor M9 can select a transistor having a larger channel length to overcome the short channel modulation effect thereof.
The non-inverting input terminal of the current input type operational amplifier is a current source 10, the inverting input terminal of the current input type operational amplifier is the drain of the fourth transistor M4, and the output terminal of the current input type operational amplifier is the drain of the ninth transistor M9. When there is a difference between the reference bias current Ibias and the drain current Ifb of the fourth transistor M4, which is reflected by the difference between the reference bias current Ibias and the drain current of the ninth transistor M9, the current difference is converted into an output voltage by a small signal output resistance of the drain of the ninth transistor M9 and the ground node (ground node), and the output voltage is adjusted by adjusting the drain current Ifb of the fourth transistor M4 so that the drain current Ifb of the fourth transistor M4 is equal to the reference bias current Ibias.
That is, the drain current Ifb of the fourth transistor M4 follows the reference bias current Ibias, which does not vary with the process corner and temperature; also, since the drain current Ifb of the fourth transistor M4 is 1/K times the static bias current i_lna, the static bias current i_lna also follows the reference bias current Ibias by K times, which also does not vary with process angle and temperature.
Note that, since the drain of the ninth transistor M9 and the ground node (ground node) have high impedance, the impedance gain of the current input type operational amplifier is also high, and the current adjusting unit in fig. 5 can be regarded as a current input type operational amplifier approximately.
The fourth transistor M4 and the fifth transistor M5 are N-type transistors, the sixth transistor M6 and the seventh transistor M7 are P-type transistors, and the eighth transistor M8 and the ninth transistor M9 are N-type transistors; while the fourth transistor M4 and the fifth transistor M5 are each designed with a short channel length, the channel lengths of the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, and the ninth transistor M9 may be larger.
In addition, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, and the ninth transistor M9 form a mirror current source circuit, and in order to further secure an output resistance of the mirror current source circuit formed by the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, and the ninth transistor M9, a fifteenth transistor may be connected in series between the seventh transistor M7 and the eighth transistor M8, a drain of the fifteenth transistor is connected to a drain of the seventh transistor, a source of the fifteenth transistor is connected to a drain of the eighth transistor, and a gate of the fifteenth transistor is connected to a power supply voltage terminal.
As shown in fig. 6, the mirror module 20 includes a tenth transistor M10 and an eleventh transistor M11, and the current adjusting unit includes a twelfth transistor M12 and a first resistor R1; a gate of the tenth transistor M10 is connected to the control terminal of the first amplifying unit 31, a source of the tenth transistor M10 is connected to the ground terminal GND, and a drain of the tenth transistor M10 is connected to a source of the eleventh transistor M11; the gate of the eleventh transistor M11 is connected to the control terminal of the second amplifying unit 32, and the drain of the eleventh transistor M11 is connected to the current source 10; the gate of the twelfth transistor M12 is connected to the current source 10, the source of the twelfth transistor M12 is connected to the first power supply voltage terminal VCC, and the drain of the twelfth transistor M12 is connected to the first terminal of the first resistor R1; the first end of the first resistor R1 is further connected to the gate of the tenth transistor M10, and the second end of the first resistor R1 is connected to the ground GND.
At this time, the channel width-to-length ratio of the tenth transistor M10 is 1/K times that of the current amplifying transistor, and the channel width-to-length ratio of the eleventh transistor M11 is 1/K times that of the transistor in the second amplifying unit 32. The gate of the eleventh transistor M11 is connected to the control terminal of the second amplifying unit 32, the gate voltage of the tenth transistor M10 is equal to the gate voltage of the current amplifying transistor, the source voltage of the tenth transistor M10 is also equal to the source voltage of the current amplifying transistor, so that the gate-source voltage of the eleventh transistor M11 is also equal to the gate-source voltage of the transistor in the second amplifying unit 32, the consistency is also true under process angle and temperature variations, and therefore, the drain current Ifb of the tenth transistor M10 is always 1/K times the drain current i_lna of the current amplifying transistor.
The tenth transistor M10, the eleventh transistor M11, the twelfth transistor M12, and the first resistor R1 may together form a current input type operational amplifier, the non-inverting input terminal of the current input type operational amplifier is the current source 10, the inverting input terminal of the current input type operational amplifier is the drain of the tenth transistor M10, and the output terminal of the current input type operational amplifier is the gate of the twelfth transistor M12. When the reference bias current Ibias outputted by the current source 10 is different from the drain current Ifb of the tenth transistor M10, the current difference between the reference bias current Ibias and the drain current Ifb of the tenth transistor M10 is converted into an output voltage through a small signal output resistor of the gate of the twelfth transistor M12 and a ground node (ground node), the output voltage is copied to the gate of the tenth transistor M10 through a voltage follower composed of the twelfth transistor M12 and the first resistor R1, and then is converted into a current through the tenth transistor M10, and the current is inputted to the inverting input terminal of the current input type operational amplifier again, so that the drain current Ifb of the tenth transistor M10 is equal to the reference bias current Ibias.
That is, the drain current Ifb of the tenth transistor M10 follows the reference bias current Ibias, which does not vary with the process angle and temperature; also, since the drain current Ifb of the tenth transistor M10 is always 1/K times the static bias current i_lna, the static bias current i_lna also follows the reference bias current Ibias by K times, which also does not change with process angle and temperature.
Note that, since the gate of the twelfth transistor M12 and the small signal output resistance to the ground node are high, the impedance gain of the current input type operational amplifier is high, and the current input type operational amplifier can be approximated as a current input type operational amplifier.
Wherein the tenth transistor M10, the eleventh transistor M11, and the twelfth transistor M12 are all N-type transistors; the tenth transistor M10 and the eleventh transistor M11 each have a short channel design, and the channel length of the twelfth transistor M12 may be large.
As shown in fig. 3 to 6, the first amplifying unit 31 includes a thirteenth transistor M13, a first inductance L1, and a second inductance L2, the thirteenth transistor M13 being a current amplifying transistor; the second amplifying unit 32 includes a fourteenth transistor M14 and a third inductance L3; a first end of the first inductor L1 is connected to the mirror module 20 and the radio frequency input terminal RFin, and a second end of the first inductor L1 is connected to the gate of the thirteenth transistor M13; the source of the thirteenth transistor M13 is connected to the first end of the second inductor L2, and the drain of the thirteenth transistor M13 is connected to the source of the fourteenth transistor M14; the second end of the second inductor L2 is connected with the ground end GND; the drain electrode of the fourteenth transistor M14 is connected with the first end of the third inductor L3 and the radio frequency output end RFout; the second end of the third inductor L3 is connected to the first supply voltage end VCC.
The thirteenth transistor M13 is a common source amplifying tube and mainly plays a role in current amplification, amplifies a radio frequency signal input by the radio frequency input end RFin, and the fourteenth transistor M14 is a common grid tube and plays a role in voltage amplification and isolation; the first inductor L1 and the second inductor L2 are input matching of the amplifying module 30, the third inductor L3 is output matching of the amplifying module 30, and the gain of the low noise amplifier can reach the requirement by setting the first inductor L1, the second inductor L2 and the third inductor L3 appropriately.
It should be noted that, due to the current source 10, the thirteenth transistor M13 is always in the amplifying state, when the rf signal is input to the rf input terminal RFin, the thirteenth transistor M13 amplifies the rf signal, and when the rf signal is not input to the rf input terminal RFin, the thirteenth transistor M13 is still in the amplifying state.
In addition, the control terminal of the second amplifying unit 32 refers to the gate of the fourteenth transistor M14, which is connected to the output terminal of the first operational amplifier OP1 in the low noise amplifier shown in fig. 3, which is connected to the second power supply voltage terminal V0 in the low noise amplifier shown in fig. 4, which is connected to the gate of the fifth transistor M5 in the low noise amplifier shown in fig. 5, and both the gate of the fourteenth transistor M14 and the gate of the fifth transistor M5 are connected to the second power supply voltage terminal V0, and which is connected to the gate of the eleventh transistor M11 in the low noise amplifier shown in fig. 6, and both the gate of the fourteenth transistor M14 and the gate of the eleventh transistor M11 are connected to the second power supply voltage terminal V0.
The control terminal of the first amplifying unit 31 refers to the first terminal of the first inductor L1, the first terminal of the first amplifying unit 31 refers to the second terminal of the second inductor L2, and the second terminal of the first amplifying unit 31 refers to the drain of the thirteenth transistor M13; the first terminal of the second amplifying unit 32 refers to the source of the fourteenth transistor M14, and the second terminal of the second amplifying unit 32 refers to the second terminal of the third inductor L3.
And, as shown in fig. 3 to 6, the low noise amplifier further includes an isolation module 50, and the isolation module 50 is connected to the mirror module 20 and the radio frequency input terminal RFin, respectively.
By providing an isolation module 50 between the mirror module 20 and the rf input terminal RFin, the rf signal between the reference bias current and the rf input terminal RFin can be isolated.
The isolation module 50 includes a second resistor R2, a first end of the second resistor R2 is connected to the radio frequency input terminal RFin, and a second end of the second resistor R2 is connected to the mirror module 20.
Based on the four modes, the embodiment of the application can realize the drain voltage of the mirror transistor and the drain voltage of the current amplifying transistor to be 'virtual short' through the voltage input type operational amplifier, or realize the drain current of the mirror transistor and the reference bias current Ibias 'virtual short' output by the current source 10 through the current input type operational amplifier, thereby stabilizing the static bias current I_LNA at K times of the reference bias current Ibias, and ensuring that the ratio K between the static bias current I_LNA and the reference bias current Ibias is stable under the change of a process angle and temperature.
By performing simulation tests on the low noise amplifier shown in fig. 1, the low noise amplifier shown in fig. 3, and the low noise amplifier shown in fig. 5, a comparative schematic diagram of the static bias current shown in fig. 7 can be obtained.
The graph in fig. 7 shows the actual bias current obtained by dividing the static bias current i_lna by the K value, and the simulation condition is that the reference bias current Ibias input by the current source 10 is 20 μa, and the simulation includes the process angle change and the temperature change from-40 ℃ to 120 ℃. The abscissa represents the gate voltage of the thirteenth transistor M13, which is from 0.8V to 1.2V, and the ordinate represents the actual bias current of the i_lna divided by the K value in μa.
It can be seen that the low noise amplifier shown in FIG. 1, I_LNA/K, varies from 17 μA to 40.8 μA, whereas the low noise amplifier shown in FIG. 3, I_LNA/K, varies from 20 μA to 23.9 μA, and the low noise amplifier shown in FIG. 5, I_LNA/K, varies from 20 μA to 24.8 μA. Therefore, the low noise amplifier of the embodiment of the application has better performance in stabilizing static bias current than the low noise amplifier in the related art.
In the embodiment of the application, the negative feedback module is additionally arranged in the low noise amplifier, so that when the process angle and the temperature change, the negative feedback module can control the source-drain voltage of the current amplifying transistor and the source-drain voltage of the mirror transistor to follow, thereby improving the phenomenon that the ratio between the static bias current and the reference bias current changes due to the change of the source-drain voltage of the current amplifying transistor and the source-drain voltage of the mirror transistor; or when the process angle and the temperature change, the negative feedback module can control the drain current of the mirror transistor to follow the reference bias current, and the mirror transistor and the current amplifying transistor are in mirror relation, so that the static bias current and the reference bias current can be followed. Therefore, the ratio between the static bias current and the reference bias current can be stabilized through the negative feedback module so as to stabilize the performance of the low noise amplifier.
The embodiment of the application also provides a radio frequency receiver which comprises the low-noise amplifier.
Furthermore, the radio frequency receiver further comprises: the radio frequency signal is received through the antenna, is subjected to band selection through the band pass filter 1 and is amplified through the low noise amplifier, then is changed from low frequency to intermediate frequency through the mixer, is further subjected to channel selection through the band pass filter 2 in the intermediate frequency band and is amplified through the amplifier, and then is demodulated into a baseband signal through the demodulator.
The embodiment of the application also provides a radio frequency terminal which comprises the radio frequency receiver.
That is, the low noise amplifier provided by the embodiment of the application can be applied to a radio frequency terminal with a radio frequency receiver.
The specific description of the low noise amplifier refers to the above description, and the technical effects that can be achieved are similar to those of the low noise amplifier, and will not be repeated here.
Embodiments of the present application are described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processing unit of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processing unit of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The foregoing detailed description of the invention has been presented for purposes of illustration and description, and it should be understood that the foregoing is by way of illustration and description only, and is not intended to limit the scope of the invention.
Claims (13)
1. A low noise amplifier, comprising: the system comprises a current source, a mirror image module, an amplifying module and a negative feedback module;
the current source is used for generating a reference bias current;
the mirror module is respectively connected with the current source and the amplifying module, and the mirror module and the amplifying module form a mirror current source circuit together; the mirror current source circuit is used for mirroring the reference bias current to obtain a static bias current;
the negative feedback module is respectively connected with the mirror image module and the amplifying module;
the amplifying module comprises a current amplifying transistor, and the mirror image module comprises a mirror image transistor in mirror image relation with the current amplifying transistor; the negative feedback module is used for controlling the source-drain voltage of the current amplifying transistor to follow the source-drain voltage of the mirror transistor or controlling the drain current of the mirror transistor to follow the reference bias current so as to stabilize the ratio between the static bias current and the reference bias current.
2. The low noise amplifier of claim 1, wherein the amplifying module comprises a first amplifying unit and a second amplifying unit, the first amplifying unit comprising the current amplifying transistor;
the control end of the first amplifying unit is connected with the mirror image module, the first end of the first amplifying unit is connected with the grounding end, and the second end of the first amplifying unit is connected with the first end of the second amplifying unit;
the second end of the second amplifying unit is connected with the first power supply voltage end.
3. The low noise amplifier of claim 2, wherein the negative feedback module comprises a voltage regulation unit, a first input terminal of the voltage regulation unit being connected to a drain of the mirror transistor, a second input terminal of the voltage regulation unit being connected to a drain of the current amplifying transistor;
the voltage regulating unit is used for controlling the source-drain voltage of the current amplifying transistor to follow the source-drain voltage of the mirror image transistor.
4. A low noise amplifier according to claim 3, wherein the voltage regulating unit comprises a first operational amplifier, the mirroring module comprises a first transistor, the first transistor being the mirroring transistor;
The non-inverting input end of the first operational amplifier is connected with the drain electrode of the first transistor, the inverting input end of the first operational amplifier is connected with the drain electrode of the current amplifying transistor, and the output end of the first operational amplifier is connected with the control end of the second amplifying unit;
the grid electrode and the drain electrode of the first transistor are connected with the current source, the grid electrode of the first transistor is also connected with the control end of the first amplifying unit, and the source electrode of the first transistor is connected with the grounding end.
5. A low noise amplifier according to claim 3, wherein the mirror module comprises a second transistor, the second transistor being the mirror transistor; the voltage regulating unit comprises a second operational amplifier and a third transistor;
the non-inverting input end of the second operational amplifier is connected with the drain electrode of the current amplifying transistor, the inverting input end of the second operational amplifier is connected with the drain electrode of the second transistor, and the output end of the second operational amplifier is connected with the grid electrode of the third transistor;
the drain electrode of the third transistor is connected with the current source, and the source electrode of the third transistor is connected with the drain electrode of the second transistor;
The grid electrode of the second transistor is connected with the current source and the control end of the first amplifying unit, and the source electrode of the second transistor is connected with the grounding end.
6. The low noise amplifier of claim 2, wherein the negative feedback module comprises a current regulation unit connected to the current source, the mirror module and the amplification module, respectively, for controlling the drain current of the mirror transistor to follow the reference bias current.
7. The low noise amplifier of claim 6, wherein the mirroring module comprises a fourth transistor and a fifth transistor, and the current regulating unit comprises a sixth transistor, a seventh transistor, an eighth transistor, and a ninth transistor;
the grid electrode of the fourth transistor is connected with the current source and the control end of the first amplifying unit, the source electrode of the fourth transistor is connected with the grounding end, and the drain electrode of the fourth transistor is connected with the source electrode of the fifth transistor;
the grid electrode of the fifth transistor is connected with the control end of the second amplifying unit, and the drain electrode of the fifth transistor is connected with the grid electrode and the drain electrode of the sixth transistor;
The source electrode of the sixth transistor is connected with the first power supply voltage end;
the grid electrode of the seventh transistor is connected with the grid electrode of the sixth transistor, the source electrode of the seventh transistor is connected with the first power supply voltage end, and the drain electrode of the seventh transistor is connected with the drain electrode and the grid electrode of the eighth transistor;
the source electrode of the eighth transistor is connected with the grounding terminal;
the grid electrode of the ninth transistor is connected with the grid electrode of the eighth transistor, the source electrode of the ninth transistor is connected with the grounding end, and the drain electrode of the ninth transistor is connected with the current source, the grid electrode of the fourth transistor and the control end of the first amplifying unit.
8. The low noise amplifier of claim 6, wherein the mirroring module comprises a tenth transistor and an eleventh transistor, and the current regulating unit comprises a twelfth transistor and a first resistor;
a grid electrode of the tenth transistor is connected with a control end of the first amplifying unit, a source electrode of the tenth transistor is connected with the grounding end, and a drain electrode of the tenth transistor is connected with a source electrode of the eleventh transistor;
the grid electrode of the eleventh transistor is connected with the control end of the second amplifying unit, and the drain electrode of the eleventh transistor is connected with the current source;
The grid electrode of the twelfth transistor is connected with the current source, the source electrode of the twelfth transistor is connected with the first power supply voltage end, and the drain electrode of the twelfth transistor is connected with the first end of the first resistor;
the first end of the first resistor is also connected with the grid electrode of the tenth transistor, and the second end of the first resistor is connected with the grounding end.
9. The low noise amplifier according to claim 2, wherein the first amplifying unit includes a thirteenth transistor, which is the current amplifying transistor, a first inductance, and a second inductance; the second amplifying unit comprises a fourteenth transistor and a third inductor;
a first end of the first inductor is connected with the mirror module and the radio frequency input end, and a second end of the first inductor is connected with the grid electrode of the thirteenth transistor;
a source of the thirteenth transistor is connected with the first end of the second inductor, and a drain of the thirteenth transistor is connected with a source of the fourteenth transistor;
the second end of the second inductor is connected with the grounding end;
the drain electrode of the fourteenth transistor is connected with the first end of the third inductor and the radio frequency output end;
The second end of the third inductor is connected with the first power supply voltage end.
10. The low noise amplifier of any of claims 1 to 9, further comprising an isolation module connected to the mirror module and the radio frequency input, respectively.
11. The low noise amplifier of claim 10, wherein the isolation module comprises a second resistor, a first end of the second resistor being connected to the radio frequency input, a second end of the second resistor being connected to the mirror module.
12. A radio frequency receiver comprising a low noise amplifier as claimed in any one of claims 1 to 11.
13. A radio frequency terminal comprising a radio frequency receiver as claimed in claim 12.
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| CN101442293A (en) * | 2007-11-22 | 2009-05-27 | 上海华虹Nec电子有限公司 | 2.4GHz low noise amplifier circuit capable of resisting process change |
| CN102394577A (en) * | 2011-11-28 | 2012-03-28 | 上海诺意光电科技有限公司 | Wide-range linear continuous adjustable high-precise current amplifier |
| CN106817093A (en) * | 2017-01-23 | 2017-06-09 | 宜确半导体（苏州）有限公司 | Radio-frequency power amplifier |
| CN108848594A (en) * | 2018-07-11 | 2018-11-20 | 上海艾为电子技术股份有限公司 | A kind of LED drive circuit and LED multi-path luminescent system |
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