CN102385921A - Marking method and initializing method for non-volatile memory array - Google Patents
Marking method and initializing method for non-volatile memory array Download PDFInfo
- Publication number
- CN102385921A CN102385921A CN2010102729978A CN201010272997A CN102385921A CN 102385921 A CN102385921 A CN 102385921A CN 2010102729978 A CN2010102729978 A CN 2010102729978A CN 201010272997 A CN201010272997 A CN 201010272997A CN 102385921 A CN102385921 A CN 102385921A
- Authority
- CN
- China
- Prior art keywords
- storage unit
- mark
- memory array
- nonvolatile memory
- block
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
- Read Only Memory (AREA)
Abstract
The invention provides a marking method and initializing method for a non-volatile memory array. The non-volatile memory array comprises a plurality of storage units; and each storage unit comprises a plurality of bytes. The marking method comprises the following steps of: judging whether the bytes of each storage unit can be read normally; and writing a mark into the storage unit. The initializing method comprises the following steps of: reading the mark of each storage unit; judging whether the mark accords with a pre-set value; recording the storage units with the marks which accord with the pre-set value into an identification list; and removing the marks.
Description
Technical field
The present invention relates to a kind of labeling method and initial method, particularly a kind of labeling method and initial method that is used for a nonvolatile memory.
Background technology
Generally speaking, nonvolatile memory array (non-volatile memory array) is made up of a plurality of blocks (block), and each block comprises a plurality of pagings (page) respectively, and each paging comprises a plurality of bytes (byte) again respectively.
The existing memory array is the unit that writes as data with paging, and is the unit of data erase with the block.The data of other pagings of this block refer to that just each paging of a block can write data respectively, if but when wherein the data of a paging will be wiped, need be wiped free of together.Therefore, when a certain paging of block is unusual (can't accessed in normal), will cause this block can't carry out data erase, this block just should not be used yet, and to avoid problems such as data read errors or disappearance.
After a common memory array is listed in and has made in the manufacturing end (a for example wafer factory); Promptly can utilize a proving installation to test or scan this memory array; When part paging or byte exception, this block can be written into one and damage mark (bad mark) in finding a block.After testing; If normal block ratio is higher than customer requirement; For example the client is more than 90% for the normal blocks ratio that is defined as of non-defective unit; And the normal blocks of this memory array is then made end and just can be classified it as non-defective unit up to 95%, and gives application end (or other user's ends) with the memory array shipment.Application end then can be connected this memory array with a controller (or other firmwares).Which block controller can remove to scan and read has the damage mark, should not use to judge which block, and this action is called initialization.
Yet " unusual block is write the damage mark " has following disappearance at least:
1. existing detection mode is if local paging or byte are damaged, will judge whole block for unusual, and it is write the damage mark.Because block integral is judged as unusual and gives up, but with making that the paging or the byte of other accessed in normal also can't be used in the block.Thus, possibly make memory array can't meet the standard of non-defective unit; Even memory array still is judged as conformance with standard at last, but also will cause utilization rate on the low side because of the paging of giving up other accessed in normal or byte.
2. being judged as unusual and need writing when damaging mark when block, may by chance be unusual byte because of writing the byte of damaging mark, causes this write activity inefficacy.Therefore, when this quilt of controller access is first judged unusual block,, judge this block on the contrary by accident for normal because can't read the damage mark.
3. if store the problem of the byte generation data degradation (data loss) of damaging mark, make that should damage mark disappears, so also can cause controller, originally be judged as unusual block for normal and judged this by accident because read less than damaging mark.
4. if it is rigorous inadequately or error is arranged when test to make end so that some unusual byte in the block, but but still be mistaken for accessed in normal, therefore be not written into the damage mark.Controller also can be mistaken for normal zone and used because of reading less than damaging mark afterwards.
5. cross-talk (cross talk) effect may take place between the byte; Write to when being judged as in the unusual block when damaging mark; Also related other bytes that influences if this byte by chance is the mark position in advance of other blocks, then can cause this normal block of controller erroneous judgement for unusual.
In view of this, a kind of method of improving at least a above-mentioned disappearance is provided, is the industry problem demanding prompt solution.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of labeling method and initial method that is used for nonvolatile memory array, when improving the byte access situation of test and this storage unit of mark (or claiming data write unit), and issuable erroneous judgement.
Another object of the present invention is to provide a kind of labeling method and initial method that is used for nonvolatile memory array; Judge and mark by will the unit of detection being contracted to each paging; So can not give up whole block, the memory module utilization rate that can promote because of the damage of partial bytes.
Another purpose of the present invention is to provide a kind of labeling method and initial method that is used for nonvolatile memory array, and it is to normal paging, writes different correspondence markings respectively.When controller carries out initialization to it, can obtain comparison result more accurately, the situation that reduces erroneous judgement takes place.
For realizing above-mentioned purpose; The present invention has disclosed a kind of labeling method that is used for a nonvolatile memory; This nonvolatile memory array comprises a plurality of storage unit; Respectively this storage unit comprises a plurality of bytes, but this labeling method comprises the following steps: to judge that these bytes that one of them had of these storage unit are accessed in normal; And write one and be tagged to this storage unit.
The present invention has also disclosed a kind of initial method that is used for a nonvolatile memory array; This nonvolatile memory array comprises a plurality of storage unit; Respectively this storage unit comprises a plurality of bytes, and wherein, respectively this storage unit has a mark; But it is judged as accessed in normal in response to these bytes in this storage unit respectively and writes, and this initial method comprises the following steps: to read respectively this mark of this storage unit; Judge this marker character unification preset value; Write down this marker character should in respectively this storage unit to one Identification Lists of preset value; And these marks of cancellation.
For making above-mentioned purpose, technical characterictic and the advantage can be more obviously understandable, hereinafter be described with reference to the accompanying drawings with preferred embodiment.
Description of drawings
Fig. 1 is used for the process flow diagram of the labeling method of nonvolatile memory array for the present invention.
Fig. 2 is the synoptic diagram of nonvolatile memory array of the present invention.
Fig. 3 is the synoptic diagram that this nonvolatile memory array and proving installation couple.
Fig. 4 is the synoptic diagram behind this nonvolatile memory array mark.
Fig. 5 is used for the process flow diagram of the initial method of nonvolatile memory array for the present invention.
Fig. 6 is the synoptic diagram that this nonvolatile memory array and a controller couple.
Fig. 7 is used for the method flow diagram of another preferred embodiment of the initial method of nonvolatile memory array for the present invention.
The reference numeral explanation
1 nonvolatile memory
11 blocks
111,111A, 111B storage unit
2 proving installations
21 question blanks
3 controllers
31 Identification Lists
Embodiment
See also shown in Figure 1ly, be the preferred embodiment that is used for the labeling method of a nonvolatile memory array of the present invention.Wherein, the applied volatile memory array of this labeling method comprises a plurality of storage unit (or claiming data write unit), and each storage unit comprises a plurality of bytes (byte).
Please combine to consult shown in Figure 2, be that example is explained with a nonvolatile memory array 1.This nonvolatile memory array 1 has comprised a plurality of storage unit 111, and each storage unit 111 comprises a plurality of bytes.For example, each storage unit 111 of present embodiment can be a paging (page), and each paging comprises 4224 bytes, and 128 paging (P
1～P
128) capable of being combinedly be defined as a block (block) 11, and 4096 block (B
1～B
4096) then further form this nonvolatile memory array 1.In other words, this nonvolatile memory array 1 comprises 4096x128=524288 storage unit 111 (paging) altogether.
Please combine to consult shown in Figure 3, this nonvolatile memory array 1 can couple with a proving installation 2, and each step of this labeling method can be realized by this proving installation 2, but be not limited thereto.Each step will at length be explained as follows:
At first execution in step S101 tests this nonvolatile memory array 1, and judges these storage unit 111 one of them, but these bytes that it had accessed in normal whether.In detail, data are write to earlier in these bytes of this storage unit 111, read these data afterwards again, if this data content of reading does not change or disappears, but then these bytes of this storage unit 111 can be judged as accessed in normal.In other words, data can't write or data write the back content can change or disappear, can judge that these bytes of this storage unit 111 can't accessed in normal.
But when being judged as accessed in normal as if step S101, then execution in step S103 writes one and is tagged to this storage unit 111.In detail, a preset value (or claiming preset content) is write in the part or all of byte of this storage unit 111.
If step S101 is judged as can't accessed in normal the time, or when step S103 executed, then execution in step S105 judged whether to still have not execution in step S101 of other storage unit 111; If any, just, all accomplish until all storage unit 111 to judgement and the write step of other storage unit 111 repeated execution of steps S101 and step S103; As not, represent whole storage unit 111 all executed cross step S101 and step S103, this labeling method can be accomplished.
This proving installation 2 can be according to above test result, the quantity of the storage unit 111 that statistics can normally be used, and then calculate the In-commission Rate of this nonvolatile memory array 1, whether assess it can conformance with standard.In addition, also can produce or export a question blank 21, this question blank 21 can write down the address of these storage unit 111 with mark, and information such as these mark institute corresponding preset value.
What deserves to be mentioned is that the preset value of these marks on all storage unit 111 can be mutually the same, also can distinguish each other.In preferred embodiment of the present invention, these marks are difference each other in response to the difference of storage unit 111, easy speech, in step S103, different storage unit 111 can be written into the mark of different preset values.The mark of difference can be corresponding to the address of storage unit 111 each other, and for example, the mark preset value of the 100th storage unit of the 1st block 11 can be 0001100; The mark preset value of the 15th storage unit of the 3rd block can be 0003015; Thus, each storage unit 111 all has the mark of a uniqueness, if need follow-up check; Then can ask to read the storage unit of certain address, and whether compare its reading of data consistent with the address.Perhaps; The preset value of mark also can be corresponding to the serial number of storage unit 111; So the mark preset value of the 100th storage unit of the 1st block can be the mark preset value of the 15th storage unit 111 of 000100, the 3 block 11 and can be 000271, by that analogy.Must the explanation be, the method for above distinguishing mark is merely illustration, those skilled in the art should use other mark modes easily, does not limit at this.
See also shown in Figure 4ly, after implementing aforesaid labeling method, in this nonvolatile memory array 1, but judge that the storage unit 111 of accessed in normal will have mark, and judge can not accessed in normal storage unit 111 will not have mark.Be the explanation after convenient, but the storage unit 111 of these accessed in normal is numbered 111A in addition, the storage unit 111 that these can not accessed in normal is numbered 111B in addition.
The nonvolatile memory array 1 that has mark then can be by the initial method that is used for a nonvolatile memory array of embodiment of the present invention; Have these storage unit 111A of mark with reinspection, confirm whether these storage unit 111A has disappearances such as existing described data degradation, crosstalk effect, access status misjudgment.
See also shown in Figure 5ly, be used for the preferred embodiment of the initial method of a nonvolatile memory array for the present invention.Wherein, the applied volatile memory array of initial method is an example with previous embodiment and nonvolatile memory array 1 shown in Figure 4.
Please combine to consult Fig. 6, this nonvolatile memory array 1 can couple with a controller 3, and each step of this initial method can be carried out by this controller 3, but is not limited thereto.In addition, this controller 3 can read the question blank 21 that this proving installation 2 is produced, with the address that obtains these storage unit 111A and the information such as preset value of mark.Each step of this initial method will at length be explained as follows:
Execution in step S501 at first reads the mark of this storage unit 111A.Then carry out S503, judge whether this mark meets a preset value.Wherein, this preset value record can be stored in the question blank 21 in advance, or is decided in its sole discretion by controller 3.In addition, each storage unit 111A can have common mark preset value, or the mark preset value that has uniqueness and distinguish each other.
If the content of reading of this mark does not meet corresponding preset value, represent that this storage unit 111A still has data degradation or data and problem such as is difficult to write, should not use.In other words, but this storage unit 111A is mistaken for accessed in normal, but actual in unusually, should not be used.What need explanation is, if this storage unit 111A reads less than any mark, expressive notation has disappeared, and then this storage unit 111A also can be regarded as mark and not meet preset value.That is to say that only the content of reading at mark meets corresponding preset value, but represent that then storage unit 111A should accessed in normal, can be used.Above technological means is because technological means of the present invention is carried out mark to normal storage unit.
When the mark of storage unit 111A is met preset value by judgement, then follow execution in step S505, write down in this storage unit 111A to an Identification Lists 31, just the address with this storage unit 111A is recorded in this Identification Lists 31.This Identification Lists 31 can be arranged in the controller 3, or is arranged in the firmware that other and controller 3 couple.After step S505 finishes, follow execution in step S507, the mark of this storage unit of cancellation 111A makes all data of this storage unit 111A be able to empty.
When the marker for judgment of storage unit 111A in step S503 does not meet preset value, or when step S507 executes, step S509 will judge whether then that other storage unit 111A does not carry out in addition; If any, then it is repeated above-mentioned steps, reading content and whether meet this storage unit 111A corresponding preset value with the mark of judging other storage unit 111A; As not, represent that whole storage unit 111A executeds finishes, this initial method can be accomplished.
After this initial methods is accomplished, can write down the address information that a plurality of marks meet the storage unit 111A of preset value in this Identification Lists 31.Be not recorded in the storage unit 111 (comprising the storage unit 111A that unmarked storage unit 111B and mark do not meet preset value) in the Identification Lists 31, will can not use by Be Controlled device 3 (or other firmwares).
See also shown in Figure 7ly, be second preferred embodiment that is used for the initial method of a nonvolatile memory array of the present invention.The initial method difference part of this second embodiment and first embodiment is: increase by a step S511, so other similar parts will not be given unnecessary details more.
When step S511 carried out, the address of whole storage unit 111 (comprise unmarked storage unit 111B, mark meets the storage unit 111A of preset value and the storage unit 111A that mark does not meet preset value) will be defined again.Just; Be recorded in the normal memory cell 111A in the Identification Lists 31; The storage unit 111A that redefinable block, unmarked storage unit 111B and mark do not meet preset value then be rejected need not, or be defined within in the block 11 that can not be used.Be prone to speech, all spendable blocks 11, the storage unit 111A that meets preset value by mark defines and forms.
So, the storage unit 111A that unmarked storage unit 111B and mark do not meet preset value can concentrate in a few block 11, reduces the number of out of use block 11 by this.
What need explain in addition, is that among first or second embodiment of above-mentioned initial method, step S507 can make into behind step S509, to carry out, and once these marks is all eliminated.
Comprehensively above-mentioned, labeling method and the initial method that is used for a nonvolatile memory array of the present invention has many characteristics, is listed below:
With paging as the unit that detects, compared to prior art with block as unit, can improve utilization rate.
2. but the storage unit that is judged as accessed in normal can be written into mark more smoothly, and is difficult for having the problem of data degradation, but so the present invention carry out mark for the storage unit of accessed in normal, the problem that existing mark is difficult to write and mark disappears can be enhanced.
3. as getting the wrong sow by the ear difference or when not rigorous in the labeling process, the storage unit of (can not accessed in normal) is judged as accessed in normal so that some is unusual.But unusual storage unit is difficult to be written into mark, even mark has write, unusual storage unit has the problem of data degradation easily, so mark evanescence or change.During initialization afterwards, but the abnormal memory cell of judging by accident to accessed in normal will can not be read mark, or read the mark that does not meet preset value.So, the abnormal memory cell of erroneous judgement can come to light, and is not used.
When the preset value of these marks when distinguishing each other, can improve because the disappearance that crosstalk effect produced.In detail; But when writing to the storage unit of accessed in normal as if mark, because crosstalk effect also writes to certain storage unit by mistake, but but because the content that writes of mark is the preset value of foundation corresponding to the storage unit of accessed in normal; During initialization afterwards; Even the storage unit that this mistake is write is underlined, can meet the storage unit corresponding preset value that this mistake is write yet, and be not used because of the content of reading of mark.
5. come to define again the composition of block according to Identification Lists; Out of use storage unit is given up; And define block again with spendable storage unit, so can improve the utilization rate (number of employable block is with respect to the number of whole blocks) of nonvolatile memory.
The above embodiments enforcement aspect of the present invention that only is used for giving an example, and explain technical characterictic of the present invention, be not to be used for limiting protection category of the present invention.Those skilled in the art can unlabored change or the arrangement of the isotropism scope that all belongs to the present invention and advocated, and protection scope of the present invention should be as the criterion with claim of the present invention.
Claims (12)
1. labeling method that is used for a nonvolatile memory array, this nonvolatile memory array comprises a plurality of storage unit, and respectively this storage unit comprises a plurality of bytes, and this labeling method comprises the following steps:
But these bytes that one of them had of judging these storage unit are accessed in normal; And
Write one and be tagged to this storage unit.
2. labeling method as claimed in claim 1 also comprises to other these storage unit, repeats this determining step and this write step.
3. labeling method as claimed in claim 2, wherein these marks in these storage unit are to distinguish each other.
4. labeling method as claimed in claim 3, wherein respectively this mark is respectively corresponding to an address of this storage unit respectively.
5. labeling method as claimed in claim 3, wherein these marks are a serial number.
6. labeling method as claimed in claim 2, wherein these marks are mutually the same.
7. labeling method as claimed in claim 2, wherein respectively this storage unit is a paging, and a plurality of paging definable forms a block.
8. initial method that is used for a nonvolatile memory array; This nonvolatile memory array comprises a plurality of storage unit; Respectively this storage unit comprises a plurality of bytes, and wherein, respectively this storage unit has a mark; But it is judged as accessed in normal in response to these bytes in this storage unit respectively and writes, and this initial method comprises the following steps:
Read respectively this mark of this storage unit;
Judge this marker character unification preset value;
Write down this marker character should in respectively this storage unit to one Identification Lists of preset value; And
These marks of cancellation.
9. initial method as claimed in claim 8, wherein this nonvolatile memory array is to be connected to a controller.
10. initial method as claimed in claim 8, wherein this recording step is to write down a respectively address of this storage unit.
11. initial method as claimed in claim 8, wherein these marks are to distinguish each other.
12. initial method as claimed in claim 8 also comprises the following steps:
Wherein several definition that are recorded in these storage unit in this Identification Lists are formed at a block.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010272997.8A CN102385921B (en) | 2010-09-06 | 2010-09-06 | For labeling method and the initial method of a nonvolatile memory array |
| CN201510788405.0A CN105427885B (en) | 2010-09-06 | 2010-09-06 | Marking method for a non-volatile memory array |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010272997.8A CN102385921B (en) | 2010-09-06 | 2010-09-06 | For labeling method and the initial method of a nonvolatile memory array |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510788405.0A Division CN105427885B (en) | 2010-09-06 | 2010-09-06 | Marking method for a non-volatile memory array |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102385921A true CN102385921A (en) | 2012-03-21 |
| CN102385921B CN102385921B (en) | 2015-12-16 |
Family
ID=45825259
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201010272997.8A Active CN102385921B (en) | 2010-09-06 | 2010-09-06 | For labeling method and the initial method of a nonvolatile memory array |
| CN201510788405.0A Active CN105427885B (en) | 2010-09-06 | 2010-09-06 | Marking method for a non-volatile memory array |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510788405.0A Active CN105427885B (en) | 2010-09-06 | 2010-09-06 | Marking method for a non-volatile memory array |
Country Status (1)
| Country | Link |
|---|---|
| CN (2) | CN102385921B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112802512A (en) * | 2019-11-13 | 2021-05-14 | 深圳宏芯宇电子股份有限公司 | Storage controller and storage device initialization method |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070147150A1 (en) * | 2003-01-28 | 2007-06-28 | Hirofumi Shibuya | Nonvolatile memory |
| CN101770427A (en) * | 2009-01-07 | 2010-07-07 | 芯邦科技（深圳）有限公司 | Method and device for utilizing flash memory space |
-
2010
- 2010-09-06 CN CN201010272997.8A patent/CN102385921B/en active Active
- 2010-09-06 CN CN201510788405.0A patent/CN105427885B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070147150A1 (en) * | 2003-01-28 | 2007-06-28 | Hirofumi Shibuya | Nonvolatile memory |
| CN101770427A (en) * | 2009-01-07 | 2010-07-07 | 芯邦科技（深圳）有限公司 | Method and device for utilizing flash memory space |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112802512A (en) * | 2019-11-13 | 2021-05-14 | 深圳宏芯宇电子股份有限公司 | Storage controller and storage device initialization method |
| CN112802512B (en) * | 2019-11-13 | 2024-04-16 | 深圳宏芯宇电子股份有限公司 | Memory controller and memory device initializing method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105427885A (en) | 2016-03-23 |
| CN105427885B (en) | 2022-07-26 |
| CN102385921B (en) | 2015-12-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104658612B (en) | Method for accessing storage unit in flash memory and device using the same | |
| US20070061498A1 (en) | Method and System for NAND-Flash Identification without Reading Device ID Table | |
| CN101599305B (en) | Storage system with data repair function and data repair method thereof | |
| WO2009095902A3 (en) | Systems and methods for handling immediate data errors in flash memory | |
| US9305662B2 (en) | Data storage device and flash memory control method | |
| KR920005163A (en) | Semiconductor memory device | |
| US9552287B2 (en) | Data management method, memory controller and embedded memory storage apparatus using the same | |
| CN101552036A (en) | Flash memory device having dummy cells and method of operating the same | |
| US7721166B2 (en) | Method for managing defect blocks in non-volatile memory | |
| CN105518799A (en) | Semiconductor storage device | |
| US7543104B2 (en) | Non-volatile semiconductor device for use in memory card and memory system | |
| CN104517644A (en) | Non-volatile memory apparatus and data verification method thereof | |
| CN102929740A (en) | Method and device for detecting bad block of storage equipment | |
| US20070074073A1 (en) | Detection system and method | |
| EP3176789A1 (en) | Memory control method and apparatus | |
| CN102385921A (en) | Marking method and initializing method for non-volatile memory array | |
| KR0159447B1 (en) | A non-volatile semiconductor memory | |
| CN110750467B (en) | Method and system for detecting interference page in Nand Flash | |
| CN108614666A (en) | Data block processing method based on NANDflash and device | |
| CN112331252A (en) | Method and device for automatically marking bad blocks of Nand flash memory, storage medium and terminal | |
| CN112540882A (en) | Flash memory device detection system and flash memory device detection method | |
| CN114385084B (en) | Bad block table inheritance method and storage device thereof | |
| CN112711378B (en) | Data storage method and read-write equipment | |
| KR100401515B1 (en) | Method for test of nonvolatile memory and apparatus the same | |
| CN216647862U (en) | Solid state disk flash memory array erasing current detection circuit comprising main control chip |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |