CN102376881A - Method for manufacturing memory unit of phase-change random access memory - Google Patents
Method for manufacturing memory unit of phase-change random access memory Download PDFInfo
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- CN102376881A CN102376881A CN2010102632671A CN201010263267A CN102376881A CN 102376881 A CN102376881 A CN 102376881A CN 2010102632671 A CN2010102632671 A CN 2010102632671A CN 201010263267 A CN201010263267 A CN 201010263267A CN 102376881 A CN102376881 A CN 102376881A
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Abstract
The invention provides a method for manufacturing a memory unit of a phase-change random access memory. The method comprises the following steps: (S501), providing a front-end device structure which comprises a bottom electrode, a phase-change resistance layer and an insulation layer, wherein the surface of the phase-change resistance layer is exposed on the surface of the insulation layer; (S502), performing ion implantation on the surface of the phase-change resistance layer; (S503), forming etching stopping layers on the surfaces of the phase-change resistance layer and the insulation layer; (S504), forming dielectric layers on the etching stopping layers; (S505), etching the dielectric layers and the etching stopping layers untill exposing the surface of the phase-change resistance layer, thereby forming an opening right above the phase-change resistance layer in the dielectric layers and the etching stopping layers; and (S506), filling a metal material in the opening, thereby forming a top electrode. By adopting the method, the etching loss of a phase-change material which is caused by uneven thickness of the etching stopping layers during a process of etching the dielectric layers can be reduced.
Description
Technical field
The present invention relates to field of semiconductor manufacture, and in particular to a kind of method that is used to make phase change random access memory devices (PCRAM) memory cell.
Background technology
The PCRAM technology is based on the conception that phase transformation rete that Ovshinsky proposes at beginning of the seventies late 1960s can be applied to the phase change memory medium and sets up; Have splendid characteristic at aspects such as speed, power, capacity, reliability, technology integrated level and costs, especially be suitable for having the stand alone type or the Embedded memory of higher density.Because PCRAM has above-mentioned advantage; Thereby it is considered to very likely replace such as static RAM (SRAM), dynamic random access memory (DRAM) this type volatile memory and such as this type of flash memory (FLASH) nonvolatile memory, becomes the new generation semiconductor memory part that has potentiality.
PCRAM utilizes phase-change material to carry out storage in the resistance value difference that crystalline state and amorphous reversible Structure Conversion are caused.Writing, wiping or during read operation; Mainly utilize the control of current impulse to implement; For example; Fashionable when writing, the electric current that the time lacks (for example 50 nanoseconds) and current value higher relatively (for example 0.6 milliampere) can be provided, phase change layer is melted and cooling and form amorphous state fast.Because the amorphous state phase change layer has higher resistance (for example 10
5～10
7Ohm), thereby make it when read operation, the voltage that provides is higher relatively.In the time will wiping, can provide the time to grow the electric current of (for example 100 nanoseconds) and current value less relatively (for example 0.3 milliampere), make the amorphous state phase change layer convert crystalline state to because of crystallization.Because the crystalline state phase change layer has lower resistance (for example 10
2～10
4Europe), thereby it is when read operation, and the voltage that provides is relatively low.In view of the above, can carry out the operation of PCRAM.
Usually, PCRAM adopts 1R1T (1R a: phase change resistor; 1T: a structure transistor).Wherein, phase change resistor constitutes phase-change memory cell as storage medium with top electrodes and bottom electrode, and transistor is as driving element.Phase-change memory cell is a part most crucial among the PCRAM, through existing storage function in fact.Phase change resistor can be made up of multiple alloy material, generally uses chalkogenide, and Ge-Sb-Te (GST, GeSbTe) alloy is wherein ripe phase-change material.
With reference to Fig. 1, wherein, show the schematic cross sectional view of the PCRAM memory cell of making according to prior art.
As shown in fig. 1, the PCRAM memory cell comprises: bottom electrode 101, phase change resistor layer 102 and top electrodes 106.
In the prior art; Generally make the PCRAM memory cell through following method: at first, the front end device architecture is provided, said front end device architecture comprises bottom electrode 101, phase change resistor layer 102 and insulating barrier 103; Wherein, bottom electrode 101 is formed in the insulating barrier 103 with phase change resistor layer 102; Then, on phase change resistor layer 102 and insulating barrier 103, form silicon nitride layer 104,, and on the surface of silicon nitride layer 104, form low-k (low k) material layer 105 afterwards as etching stopping layer; Then, on the surface of low-k materials layer 105, apply one deck photoresist (not shown), and make it have pattern, with the position of definition top electrodes 106 through exposure and development; Then, as mask, etching low-k materials layer 105 and silicon nitride layer 104 are to expose at least a portion surface of phase change resistor layer 102 with photoresist layer with pattern; Then, remove the photoresist layer; At last; Above phase-change material layers 102; Fill metal material in the position that etches away silicon nitride layer and low-k materials layer and it is carried out chemico-mechanical polishing (CMP),, have the PCRAM memory cell of the cross-section structure shown in Fig. 1 thereby form to form top electrodes 106.
Yet; The above-mentioned method that is used to make the PCRAM memory cell according to prior art; Owing to need the thickness of low-k materials layer 105 of deposition thicker, about 1000～2000 dusts, and low-k materials layer 105 thickness evenness that the limitation of existing deposition technique can cause depositing are relatively poor.For guaranteeing when the etching low-k materials layer 105, etched each locational silicon nitride layer 104 enough thickness can be arranged, promptly be unlikely to etch into phase change resistor layer 102, so need the thicker silicon nitride layer 104 of about 400～600 dusts of deposition.Further; Because silicon nitride layer 104 is thicker, thereby its uniformity is also relatively poor, thus when etches both silicon nitride layer 104 when exposing phase change resistor layer 102 fully; Some locational phase change resistor layer 102 has been etched greatly, this be do not expect to take place.On the other hand; Since during etching low-k materials layer 105 with the photoresist layer as mask, so the source gas of when etching low-k materials layer 105, choosing, should not be too high for the etching selectivity of low-k materials layer 105 and silicon nitride layer 104; Be preferably 1～1.5; Otherwise can in etching process, produce, cover the sidewall and the surface of location of etch, influence the critical size (CD) of location of etch than heteropolymer (polymer).But etching selectivity is not high, can cause again when etching low-k materials layer 105, etching accurately being stopped on the surface of silicon nitride layer 104, thereby still can continue to etch away a part of silicon nitride layer 104.In this case, if the thickness of silicon nitride layer 104 is not enough, will cause the loss of phase change resistor layer 102 then, like what circle indicated among Fig. 2.The phase change resistor layer is a component part most crucial in the PCRAM memory cell, and this loss causes the phase-change memory cell cisco unity malfunction possibly, accurately stored information.
Therefore, need a kind of method that is used to make the PCRAM memory cell, expect that this method can reduce the phase change resistor layer etching loss in the etching low-k materials process, to improve the electric property of PCRAM.In addition, expect that also this method can be compatible with traditional handicraft, to reduce manufacturing cost.
Summary of the invention
In the summary of the invention part, introduced the notion of a series of reduced forms, this will further explain in the embodiment part.Summary of the invention part of the present invention does not also mean that key feature and the essential features that will attempt to limit technical scheme required for protection, does not more mean that the protection range of attempting to confirm technical scheme required for protection.
For solving the problem that in etching low-k materials process, causes the etching of phase change resistor layer to lose as stated owing to the inhomogeneous grade of etch; The present invention provides a kind of method that is used to make the phase change random access memory devices memory cell; Said method comprises: the front end device architecture is provided; Said front end device architecture comprises bottom electrode, phase change resistor layer and insulating barrier; Said bottom electrode and said phase change resistor layer are formed in the said insulating barrier, and said phase change resistor layer is positioned at said bottom electrode top, and expose on the surface of said insulating barrier on the surface of said phase change resistor layer; Ion is carried out on the surface of said phase change resistor layer to be injected; On the surface of the surface of said phase change resistor layer and said insulating barrier, form etching stopping layer; On said etching stopping layer, form dielectric layer; Said dielectric layer of etching and said etching stopping layer are until the surface of exposing said phase change resistor layer, in said dielectric layer and said etching stopping layer, to form the opening be positioned at directly over the said phase change resistor layer; And in said opening, fill metal material, to form top electrodes.
Preferably, said surface to said phase change resistor layer is carried out ion and is injected and to comprise: on the surface of said phase change resistor layer, form the photoresist layer with pattern; , said phase change resistor layer is carried out ion inject as mask with said photoresist layer; And remove said photoresist layer.
Preferably, said ion injects and uses the boryl dopant.
Preferably, said boryl dopant comprises at least a in boron and the boron fluoride.
Preferably, the energy of said ion injection is that 100～4000eV and dosage are 5 * 10
14～5 * 10
15Cm
-2
Preferably, the constituent material of said phase change resistor layer is selected from Ge
xSb
yTe
(1-x-y), Si
xSb
yTe
(1-x-y), Se
xSb
yTe
(1-x-y), Pb
xSb
yTe
(1-x-y), Ag
xIn
yTe
(1-x-y), Ag
xSb
yTe
(1-x-y)And Ge
xAs
yTe
(1-x-y), 0≤x≤1,0≤y≤1 wherein.
Preferably, the constituent material of said etching stopping layer is selected from SiC, SiN, SiON and NDC.
Preferably, said etching stopping layer is made up of SiN and thickness is 200～600 dusts.
Preferably, the constituent material of said dielectric layer is selected from and mixes fluorine silex glass, oxide layer and low-k materials.
Preferably, the source gas of said dielectric layer of etching and said etching stopping layer is fluorine base gas.
The present invention further provides a kind of electronic equipment that comprises the memory cell of making through aforesaid method, and wherein said electronic equipment is selected from personal computer, portable computer, game machine, cellular phone, personal digital assistant, video camera and digital camera.
According to the method that is used to make the PCRAM memory cell of the present invention; Inject reducing the speed of etching source gas etching phase-change material through the boron ion being carried out on the surface of phase change resistor layer before the etching dielectric layer, thereby the phase-change material etching that can reduce in the process of etching dielectric layer, to cause owing to the inhomogeneous grade of etch is lost.In addition, method technology is simple according to the preferred embodiment of the invention, and easy and traditional handicraft compatibility, thereby can reduce manufacturing cost.
Description of drawings
Attached drawings of the present invention is used to understand the present invention at this as a part of the present invention.Embodiments of the invention and description thereof have been shown in the accompanying drawing, have been used for explaining principle of the present invention.In the accompanying drawings:
Fig. 1 shows the schematic cross sectional view of the PCRAM memory cell of making according to prior art;
Fig. 2 shows phase change resistor layer and ESEM on every side (SEM) cutaway view thereof in the PCRAM memory cell of making according to prior art;
Fig. 3 A to 3F shows the schematic cross sectional view of the method that is used to make the PCRAM memory cell according to the preferred embodiment of the invention;
Fig. 4 A and 4B show the schematic cross sectional view of the exemplary PCRAM memory cell of making according to the preferred embodiment of the present invention; And
Fig. 5 shows the flow chart of the method that is used to make the PCRAM memory cell according to the preferred embodiment of the invention.
Should be noted in the discussion above that these figure are intended to illustrate the general characteristic according to employed method, structure and/or material in the certain exemplary embodiments of the present invention, and the following written description that provides is replenished.Yet; These figure draw in proportion; Thereby possibly can accurately not reflect precision architecture or the performance characteristics of any given embodiment, and these figure should not be interpreted as limit or restriction by according to the numerical value that exemplary embodiment of the present invention contained or the scope of attribute.For example, for the sake of clarity, can dwindle or amplify the relative thickness and the location of molecule, layer, zone and/or structural detail.In the accompanying drawings, use similar or identical Reference numeral to represent similar or components identical or characteristic.
Embodiment
Now, will describe in more detail according to exemplary embodiment of the present invention with reference to accompanying drawing.Yet these exemplary embodiments can multiple different form be implemented, and should not be interpreted as the embodiment that is only limited to here to be set forth.Should be understood that, provide these embodiment of the present inventionly to disclose thoroughly and complete, and the design of these exemplary embodiments fully conveyed to those of ordinary skills in order to make.In the accompanying drawings, for the sake of clarity, exaggerated the thickness in layer and zone, and used the identical Reference numeral to represent components identical, thereby will omit description of them.
Should be understood that when element was known as " connection " or " combination " to another element, this element can directly connect or be attached to another element, perhaps can have intermediary element.Different is when arriving another element, not have intermediary element when element is known as " directly connecting " or " directly combining ".In whole accompanying drawings, identical Reference numeral is represented components identical all the time.As used herein, term " and/or " combination in any and all combinations of comprising one or more relevant Listed Items.Should explain in an identical manner other words of being used to describe the relation between element or the layer (for example, " and ... between " and " directly exist ... between ", " with ... adjacent " and " with ... direct neighbor ", " ... on " and " directly exist ... on " etc.).
In addition; It is to be further understood that; " first ", " second " are waited and describe different elements, assembly, zone, layer and/or part although here can use a technical term, and these elements, assembly, zone, layer and/or part should not receive the restriction of these terms.These terms only are to be used for an element, assembly, zone, layer or part and another element, assembly, zone, layer or part are made a distinction.Therefore, under situation about not breaking away from according to the instruction of exemplary embodiment of the present invention, below first element, assembly, zone, layer or the part discussed also can be known as second element, assembly, zone, layer or part.
For the ease of describing; Here can the usage space relative terms; As " ... under ", " ... on ", " following ", " in ... top ", " top " etc., be used for describing spatial relation like an element shown in the figure or characteristic and other elements or characteristic.Should be understood that the space relative terms is intended to comprise the different azimuth in using or operating the orientation of being described in the drawings except device.For example, if the device in the accompanying drawing is squeezed, then be described as to be positioned as " above other elements or characteristic " or " on other elements or characteristic " after the element of " in other elements or beneath " or " under other elements or characteristic ".Thereby exemplary term " in ... below " can comprise " in ... top " and " in ... below " two kinds of orientation.This device also can other different modes location (revolve turn 90 degrees or be in other orientation), and employed space relative descriptors is here made respective explanations.
Here employed term only is in order to describe specific embodiment, but not the intention restriction is according to exemplary embodiment of the present invention.As used herein, only if context spells out in addition, otherwise singulative also is intended to comprise plural form.In addition; It is to be further understood that; When using a technical term " comprising " and/or " comprising " in this manual; It indicates and has said characteristic, integral body, step, operation, element and/or assembly, does not exist or additional one or more other characteristics, integral body, step, operation, element, assembly and/or their combination but do not get rid of.
At this, the reference schematic cross sectional view of the preferred embodiment (and intermediate structure) of property embodiment is as an example described according to exemplary embodiment of the present invention.Like this, the shape variation that illustrates that for example caused by manufacturing technology and/or tolerance can appear in expectation.Therefore, exemplary embodiment should not be interpreted as the concrete shape that only limits in the zone shown in this, but can also comprise for example by making the form variations that is caused.For example, the injection zone that is depicted as rectangle can have rounding or the characteristic of bending and/or the graded of implantation concentration at its edge, and the binary of being not only from injection zone to non-injection zone changes.Equally, can cause the zone between the surface that this buried regions and injection are passed through also can have some injections through the buried regions that inject to form.Therefore, the zone shown in the figure comes down to schematically, and their shape is not that intention illustrates each the regional true form in the device, and is not the scope of intention restriction according to exemplary embodiment of the present invention.
Only if definition is arranged in addition, otherwise employed here whole terms (comprising technical term and scientific terminology) all have the meaning equivalent in meaning with those skilled in the art's common sense.It will also be understood that; Only if clearly definition here; Otherwise this type of the term term such as in general dictionary, defining should be interpreted as the meaning that has with they aggregatio mentiums in the linguistic context of association area, and does not explain them with desirable or too formal implication.
[the preferred embodiments of the present invention]
Below, will specify the method that is used to make the PCRAM memory cell according to the preferred embodiment of the invention with reference to Fig. 3 A to 3F, Fig. 4 A and 4B and Fig. 5.
With reference to Fig. 3 A to 3F, wherein, show the schematic cross sectional view of the method that is used to make the PCRAM memory cell according to the preferred embodiment of the invention.
At first; Shown in Fig. 3 A, the front end device architecture is provided, said front end device architecture comprises bottom electrode 301, phase change resistor layer 302 and insulating barrier 303; Wherein, Bottom electrode 301 is formed in the insulating barrier 303 with phase change resistor layer 302, and phase change resistor layer 302 is positioned at bottom electrode 301 tops, and expose on the surface of insulating barrier 303 on the surface of phase change resistor layer 302.The constituent material of said bottom electrode 301 can be DOPOS doped polycrystalline silicon, W, TiN, TiAlN or other silicide material; Said silicide material can be the silicide that comprises at least a metallic element among Ag, Au, Al, Cu, Cr, Co, Ni, Ti, Sb, V, Mo, Ta, Nb, Ru, W, Pt, Pd, Zn and the Mg, is preferably WSi.The constituent material of said phase change resistor layer 302 can be Ge
xSb
yTe
(1-x-y), Si
xSb
yTe
(1-x-y), Se
xSb
yTe
(1-x-y), Pb
xSb
yTe
(1-x-y), Ag
xIn
yTe
(1-x-y), Ag
xSb
yTe
(1-x-y)Or Ge
xAs
yTe
(1-x-y), 0≤x≤1,0≤y≤1 wherein.The constituent material of said insulating barrier 303 can be SiO
2Or low-k materials etc.As an example, in the present embodiment, bottom electrode 301 is made up of WSi, and phase change resistor layer 302 is by Ge
2Sb
2Te
5(GST) constitute, said insulating barrier 303 is by SiO
2Constitute.
Here; Need to prove; Though the situation of flush of surface and the insulating barrier 303 of phase change resistor layer 302 has been shown in Fig. 3 A, has should be understood that the surface of the surface of phase change resistor layer 302 and insulating barrier 303 also can be inequal; For example, the surface of phase change resistor layer 302 can be higher than the surface of insulating barrier 303.
As an example, said front end device architecture can form through the following step: at first, the Semiconductor substrate (not shown) is provided, in this Semiconductor substrate, for example has been formed with structures such as isolation structure, electric capacity, diode through FEOL; Then, on said Semiconductor substrate, form first insulating barrier, and for example in first insulating barrier, form first opening through photoetching and etch process; Afterwards, in first opening and on first insulating barrier, forming will be as the conductive layer of bottom electrode 301, and for example removes the part that exceeds first insulating barrier of this conductive layer through CMP technology, thereby forms bottom electrode 301; Then, on first insulating barrier and bottom electrode 301, form second insulating barrier, and, directly over bottom electrode 301, in second insulating barrier, form second opening for example through photoetching and etch process; Afterwards, in second opening and on second insulating barrier, forming will be as the phase-change material layers of phase change resistor layer 302, and for example removes the part that exceeds second insulating barrier of this phase-change material layers through CMP technology, thereby forms phase change resistor layer 302.Here, need to prove that said first insulating barrier and said second insulating barrier constitute the insulating barrier 303 in the said front end device architecture, and the additive method that forms said front end device architecture is known in those skilled in the art, repeats no more at this.
In addition, it will be appreciated that also that said front end device architecture can also have other structures except can having the structure shown in Fig. 3 A, for example, bottom electrode is made up of a plurality of electrodes with smaller cross-sectional area area.
Then, shown in Fig. 3 B, ion is carried out on the surface of phase change resistor layer 302 inject.As an example, the ion injection being carried out on the surface of phase change resistor layer 302 can be non-selective injection.That is to say, need not on the surface of phase change resistor layer 302, to form mask before injecting, and when injecting, the surface of phase change resistor layer 302 and the surface of insulating barrier 303 are injected simultaneously.Wherein, said ion injects and uses the boryl dopant, for example, and boron, boron fluoride etc.The dosage that said ion injects is approximately 100～4000eV, and energy is approximately 5 * 10
14～5 * 10
15Cm
-2Inject after the completion, the doping content on phase change resistor layer 302 surface is about 10
19～10
20Cm
-3Scope in.
As an example, in the present embodiment, the dosage that ion injects is about 2000eV and energy is about 5 * 10
14Cm
-2
Alternately; The ion injection is carried out on the surface of phase change resistor layer 302 also can be carried out through the following step: on the surface of phase change resistor layer 302; For example form one deck photoresist, and make this layer photoresist form pattern through exposure and development through spin-coating method; Afterwards,, ion is carried out on the surface of phase change resistor layer 302 inject as mask with this layer photoresist; Afterwards, for example through using O
2, O
2/ H
2O or CO
2Plasma ashing technology as fogging agent is removed this layer photoresist.
Then, shown in Fig. 3 C, on the surface of the surface of phase change resistor layer 302 and insulating barrier 303, form etching stopping layer 304.Wherein, the constituent material of said etching stopping layer 304 can be the carborundum (NDC) of SiC, SiN, SiON or nitrating etc.
As an example, in the present embodiment, under 150～400 ℃, form SiN that a layer thickness is approximately 200～600 dusts as etching stopping layer 304 through the chemical vapor deposition (CVD) method.
Then, shown in Fig. 3 D, on etching stopping layer 304, form dielectric layer 305.Wherein, the constituent material of said dielectric layer 305 for example can be to bore low k (k＜3.0) material of (BD) this type or such as TEOS oxide layer this type oxide layer or mix fluorine silex glass (FSG) etc. such as black.
As an example, in the present embodiment, form black brill that a layer thickness is approximately 1000～3000 dusts as said dielectric layer 305 through CVD method or physical vapor deposition (PVD) method.Wherein, adopt Black Diamond
TMII (BDII) dielectric material.This dielectric material is the silica (being also referred to as silicon oxide carbide) that carbon mixes; Wherein carbon content is higher than 10%; It is commercially available by the holy big Ke Laola city of California, USA Applied Materials company, and it improves material and comprises through the UV sclerosis and have the BDIIx dielectric material of 30% porosity and the BDIIebeam dielectric material through electron-beam curing.In addition; The low-k materials of other carbon containings comprises Silk
and Cyclotene
(benzocyclobutene) dielectric material, and it is commercially available by Dow Chemical company.
Then, shown in Fig. 3 E, etching dielectric layer 305 and etching stopping layer 304 are until the surface of exposing phase change resistor layer 302, in dielectric layer 305 and etching stopping layer 304, to form the opening 306 that is positioned at directly over the phase change resistor layer 302.As an example; In dielectric layer 305 and etching stopping layer 304, forming opening 306 can carry out through the following step: on the surface of dielectric layer 305, for example form one deck photoresist through spin-coating method, and make this layer photoresist formation pattern through exposure and development; Afterwards, with this layer photoresist as mask, etching dielectric layer 305 and etching stopping layer 304, thus form the opening 306 that is positioned at directly over the phase change resistor layer 302 therein, with the position of definition top electrodes; Afterwards, for example through using O
2, O
2/ H
2O or CO
2Plasma ashing technology as fogging agent is removed this layer photoresist.Wherein, etching source gas for example can be for comprising CHF
3, CH
2F
2, CH
3F, C
4F
6, C
5F
8And C
4F
8In at least a fluorine base gas.
Here; Need to prove; In the process of etching dielectric layer 305 and etching stopping layer 304; Because the surface doping of phase change resistor layer 302 has the boron ion that will reduce etch-rate, so even if, also can reduce the etching loss of phase change resistor layer greatly because etch is inhomogeneous etc. former thereby make the surface of phase change resistor layer 302 be exposed in the etching source gas.It should be noted that the part that is doped with the boron ion in the phase change resistor layer 302 can be consumed (shown in Fig. 3 E) by part and perhaps all consume in etching process.
At last, shown in Fig. 3 F, in opening 306, fill metal material,, thereby form said PCRAM memory cell with formation top electrodes 307.As an example, in opening 306, filling metal material carries out through the following step: in opening 306 and on the surface of dielectric layer 305, for example form the layer of metal material through sputtering method; Afterwards, this layer metal material carried out chemico-mechanical polishing (CMP), exposing the surface of dielectric layer 305, thereby form top electrodes 307.The metal material of being selected for use for example can be copper, gold, aluminium or their alloy.As an example, in the present embodiment, top electrodes 307 is made up of copper.
So far, accomplished the making of PCRAM memory cell.
Here; It will be appreciated that the cross-section structure of the PCRAM memory cell shown in Fig. 3 F only is exemplary, and nonrestrictive; PCRAM memory cell through method making according to the preferred embodiment of the invention can also have other cross-section structures, shown in Fig. 4 A and 4B.In the cross-section structure shown in Fig. 4 A, phase change resistor layer 402 ' is formed the longitudinal section for falling trapezoidal shape, so that its contact area with bottom electrode 401 reduces, reduces the bottom drive current to improve the purpose of reading and writing speed thereby reach.In the cross-section structure shown in Fig. 4 B, bottom electrode 401 ' is made up of a plurality of electrodes with smaller cross-sectional area area, reaches purpose same as described above with this.
Next, with reference to Fig. 5, wherein, show the flow chart of the method that is used to make the PCRAM memory cell according to the preferred embodiment of the invention.
At first, in step S501, the front end device architecture is provided, said front end device architecture comprises bottom electrode, phase change resistor layer and insulating barrier.Wherein, said bottom electrode and said phase change resistor layer are formed in the said insulating barrier, and said phase change resistor layer is positioned at said bottom electrode top, and expose on the surface of said insulating barrier on the surface of said phase change resistor layer.
Then, in step S502, ion is carried out on the surface of said phase change resistor layer inject.
Then, in step S503, on the surface of the surface of said phase change resistor layer and said insulating barrier, form etching stopping layer.
Then, in step S504, on said etching stopping layer, form dielectric layer.
Then, in step S505, said dielectric layer of etching and said etching stopping layer are until the surface of exposing said phase change resistor layer, in said dielectric layer and said etching stopping layer, to form the opening be positioned at directly over the said phase change resistor layer.
At last, in step S506, in said opening, fill metal material, to form top electrodes.
[beneficial effect of the present invention]
Be used to make the method for PCRAM memory cell according to the preferred embodiment of the invention; Inject reducing the speed of etching source gas etching phase-change material through the boron ion being carried out on the surface of phase change resistor layer before the etching dielectric layer, thus can reduce since in the process of etching dielectric layer since the phase-change material etching that the grade in uneven thickness of etching stopping layer causes lose.In addition, method technology is simple according to the preferred embodiment of the invention, and easy and traditional handicraft compatibility, thereby can reduce manufacturing cost.
[industrial usability of the present invention]
Semiconductor device according to aforesaid embodiment manufacturing can be applicable in the multiple integrated circuit (IC).According to IC of the present invention for example can be logical device, like programmable logic array (PLA), application-specific integrated circuit (ASIC) (ASIC), combination type DRAM logical integrated circuit (buried type DRAM), radio circuit or other circuit devcies arbitrarily.IC chip according to the present invention can be used for for example consumer electronic products; In various electronic products such as personal computer, portable computer, game machine, cellular phone, personal digital assistant, video camera, digital camera, mobile phone, especially in the radio frequency products.
The present invention is illustrated through the foregoing description, but should be understood that, the foregoing description just is used for for example and illustrative purposes, but not is intended to the present invention is limited in the described scope of embodiments.In addition, it will be appreciated by persons skilled in the art that the present invention is not limited to the foregoing description, can also make more kinds of variants and modifications according to instruction of the present invention, these variants and modifications all drop in the present invention's scope required for protection.Protection scope of the present invention is defined by appended claims book and equivalent scope thereof.
Claims (11)
1. method that is used to make the phase change random access memory devices memory cell comprises:
The front end device architecture is provided; Said front end device architecture comprises bottom electrode, phase change resistor layer and insulating barrier; Said bottom electrode and said phase change resistor layer are formed in the said insulating barrier; Said phase change resistor layer is positioned at said bottom electrode top, and expose on the surface of said insulating barrier on the surface of said phase change resistor layer;
Ion is carried out on the surface of said phase change resistor layer to be injected;
On the surface of the surface of said phase change resistor layer and said insulating barrier, form etching stopping layer;
On said etching stopping layer, form dielectric layer;
Said dielectric layer of etching and said etching stopping layer are until the surface of exposing said phase change resistor layer, in said dielectric layer and said etching stopping layer, to form the opening be positioned at directly over the said phase change resistor layer; And
In said opening, fill metal material, to form top electrodes.
2. method according to claim 1, wherein, said surface to said phase change resistor layer is carried out the ion injection and is comprised:
On the surface of said phase change resistor layer, form photoresist layer with pattern;
, said phase change resistor layer is carried out ion inject as mask with said photoresist layer; And
Remove said photoresist layer.
3. method according to claim 1, wherein, said ion injects and uses the boryl dopant.
4. method according to claim 3, wherein, said boryl dopant comprises at least a in boron and the boron fluoride.
5. method according to claim 4, wherein, the energy that said ion injects is that 100～4000eV and dosage are 5 * 10
14～5 * 10
15Cm
-2
6. method according to claim 1, wherein, the constituent material of said phase change resistor layer is selected from Ge
xSb
yTe
(1-x-y), Si
xSb
yTe
(1-x-y), Se
xSb
yTe
(1-x-y), Pb
xSb
yTe
(1-x-y), Ag
xIn
yTe
(1-x-y), Ag
xSb
yTe
(1-x-y)And Ge
xAs
yTe
(1-x-y), 0≤x≤1,0≤y≤1 wherein.
7. method according to claim 1, wherein, the constituent material of said etching stopping layer is selected from SiC, SiN, SiON and NDC.
8. method according to claim 7, wherein, said etching stopping layer is made up of SiN and thickness is 200～600 dusts.
9. method according to claim 1, wherein, the constituent material of said dielectric layer is selected from mixes fluorine silex glass, oxide layer and low-k materials.
10. method according to claim 1, wherein, the source gas of said dielectric layer of etching and said etching stopping layer is fluorine base gas.
11. electronic equipment that comprises through the memory cell of making according to each described method in the claim 1 to 10; Wherein, said electronic equipment is selected from personal computer, portable computer, game machine, cellular phone, personal digital assistant, video camera and digital camera.
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| CN103682094A (en) * | 2013-12-11 | 2014-03-26 | 上海新安纳电子科技有限公司 | Phase change memory structure and manufacturing method thereof |
| CN105720191A (en) * | 2014-12-02 | 2016-06-29 | 中芯国际集成电路制造(上海)有限公司 | Phase change random access memory and forming method thereof |
| CN113517393A (en) * | 2020-04-28 | 2021-10-19 | 台湾积体电路制造股份有限公司 | Phase change memory device and method of forming the same |
| US11925127B2 (en) | 2020-04-28 | 2024-03-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Phase-change memory device and method |
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| CN101675524A (en) * | 2007-05-08 | 2010-03-17 | 美光科技公司 | Inverted variable resistance memory cell and method of making the same |
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| US20040140289A1 (en) * | 2003-01-21 | 2004-07-22 | Lam Research Corporation | Method for selectively etching organosilicate glass with respect to a doped silicon carbide |
| CN101675524A (en) * | 2007-05-08 | 2010-03-17 | 美光科技公司 | Inverted variable resistance memory cell and method of making the same |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103682094A (en) * | 2013-12-11 | 2014-03-26 | 上海新安纳电子科技有限公司 | Phase change memory structure and manufacturing method thereof |
| CN103682094B (en) * | 2013-12-11 | 2016-08-17 | 上海新安纳电子科技有限公司 | A kind of phase change memory structure and preparation method thereof |
| CN105720191A (en) * | 2014-12-02 | 2016-06-29 | 中芯国际集成电路制造(上海)有限公司 | Phase change random access memory and forming method thereof |
| CN105720191B (en) * | 2014-12-02 | 2018-06-01 | 中芯国际集成电路制造(上海)有限公司 | Phase transition storage and forming method thereof |
| CN113517393A (en) * | 2020-04-28 | 2021-10-19 | 台湾积体电路制造股份有限公司 | Phase change memory device and method of forming the same |
| US11925127B2 (en) | 2020-04-28 | 2024-03-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Phase-change memory device and method |
| CN113517393B (en) * | 2020-04-28 | 2024-05-28 | 台湾积体电路制造股份有限公司 | Phase change memory device and method of forming the same |
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