CN102376365B - Erasure method of SONOS (Silicon Oxide Nitride Oxide Semiconductor) flash memory data - Google Patents
Erasure method of SONOS (Silicon Oxide Nitride Oxide Semiconductor) flash memory data Download PDFInfo
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- CN102376365B CN102376365B CN201010265201.6A CN201010265201A CN102376365B CN 102376365 B CN102376365 B CN 102376365B CN 201010265201 A CN201010265201 A CN 201010265201A CN 102376365 B CN102376365 B CN 102376365B
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Abstract
The invention discloses an erasure method of SONOS (Silicon Oxide Nitride Oxide Semiconductor) flash memory data. The erasure method comprises the following steps of: erasing the SONOS flash data by adopting an erasure voltage I until a threshold value voltage of an SONOS flash memory reaches a saturated value I; and erasing the SONOS flash data by adopting an erasure voltage II smaller than the erasure voltage I until the threshold value voltage of the SONOS flash memory reaches a saturated value II. According to the erasure method provided by the invention, grid electrode injection can be inhibited, the depth of the erased threshold value is remained, and the reliability of a device is improved; meanwhile, the erasing speed of the device also can be improved.
Description
Technical field
The present invention relates to SIC (semiconductor integrated circuit) and manufacture field, particularly relate to a kind of SONOS flash data method for deleting.
Background technology
SONOS flush memory device, becomes one of at present main flash type because possess good scaled down characteristic and radiation-resisting performance.The problem that N-type polysilicon gate SONOS flash memory faces is, for erase operation, due to the problem that exists grid to inject, after causing erasing voltage to increase, threshold voltage after wiping can corresponding reduction, and this is unfavorable for the operation of SONOS device, especially can reduce device to reliability.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of SONOS flash data method for deleting, the threshold voltage degree of depth after energy suppressor electrode injection, maintenance are wiped, the reliability of raising device, and the while can also be improved the erasing speed of device.
For solving the problems of the technologies described above, SONOS flash data method for deleting provided by the invention, comprises the steps:
Step 1, a pair of SONOS flash data of employing erasing voltage are wiped, until threshold voltage value of reaching capacity of described SONOS flash memory.Described erasing voltage one is in order to improve the erasing speed of described SONOS flash data, described in when described saturation value one is wiped for the described erasing voltage one of employing, threshold voltage can reach minimum value, and the erasing time of described erasing voltage one is from adding described erasing voltage at the beginning until described threshold voltage arrives the cut-off for the moment of described saturation value.Described saturation value one is by adding described erasing voltage to measure the threshold voltage of described SONOS flash memory for the moment and the relation curve in erasing time one obtains on the grid at described SONOS flash memory; According to described relation curve one, in step 1, control described threshold voltage and arrive described saturation value one by controlling the erasing time of described erasing voltage one, getting on described relation curve one is the erasing time of described erasing voltage one from the time initial threshold voltage that is 0 to the time period saturation value one.
Step 2, employing are less than the erasing voltage two of described erasing voltage one wipes described SONOS flash data, until threshold voltage value of reaching capacity two of described SONOS flash memory.The grid injection that described erasing voltage two produces in order to suppress described erasing voltage one, makes described threshold voltage can further reduce and reach described saturation value two.Described in when described saturation value two is wiped for the described erasing voltage two of employing, threshold voltage can reach minimum value, and the absolute value of described saturation value two is greater than the absolute value of described saturation value one.The erasing time of described erasing voltage two for arriving described saturation value at the beginning from described threshold voltage until described threshold voltage arrives described saturation value two time cut-off.Described saturation value two measures the threshold voltage of described SONOS flash memory by add described erasing voltage two on the grid of described SONOS flash memory time and the relation curve in erasing time two obtains.According to described relation curve two, in step 2, control described threshold voltage and arrive described saturation value two by controlling the erasing time of described erasing voltage two, getting threshold voltage in described relation curve two time period between saturation value one and saturation value two is the erasing time of described erasing voltage two.
Beneficial effect of the present invention is: the higher described erasing voltage one of utilization of the present invention carrys out the erasing speed of faster devices, reaching ultimate value that can reach of described erasing voltage at the threshold voltage of device is saturation value a period of time, using lower described erasing voltage two instead proceeds to wipe, utilizing described erasing voltage two to have lower grid injection effect reduces and the value of reaching capacity two the threshold voltage continuation of device, wherein the absolute value of saturation value two be greater than described saturation value one absolute value, the threshold voltage degree of depth after making device can keep wiping.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation:
Fig. 1 is the process flow diagram of SONOS flash data method for deleting of the present invention;
The relation curve one of threshold voltage and time and relation curve two schematic diagram when Fig. 2 is wiping of embodiment of the present invention method.
Embodiment
As shown in Figure 1, be the process flow diagram of SONOS flash data method for deleting of the present invention.Embodiment of the present invention method comprises the steps:
Step 1, a pair of SONOS flash data of employing erasing voltage are wiped, until threshold voltage value of reaching capacity of described SONOS flash memory.
Described erasing voltage one is in order to improve the erasing speed of described SONOS flash data, described in when described saturation value one is wiped for the described erasing voltage one of employing, threshold voltage can reach minimum value, and the erasing time of described erasing voltage one is from adding described erasing voltage at the beginning until described threshold voltage arrives the cut-off for the moment of described saturation value.Described erasing voltage one is higher than the normal erasing voltage of wiping same described SONOS flash memory in prior art, it is obvious that the shortcoming grid that described erasing voltage one exists injects problem, so the absolute value of the described saturation value one finally obtaining diminishes, reduce and wiped the rear threshold voltage degree of depth.
As shown in Figure 2, threshold voltage and the relation curve of time one and relation curve two schematic diagram while being the wiping of embodiment of the present invention method.Described saturation value one is by adding described erasing voltage to measure the threshold voltage of described SONOS flash memory for the moment and the relation curve in erasing time one obtains on the grid at described SONOS flash memory.According to described relation curve one, in step 1, control described threshold voltage and arrive described saturation value one by controlling the erasing time of described erasing voltage one, getting on described relation curve one is that 0～t1 time shaft is the erasing time of described erasing voltage one from the time initial threshold voltage that is 0 to the time period saturation value one.Wherein t1 is, relation curve one threshold voltage value is the saturation value erasing time of correspondence for the moment.
Step 2, employing are less than the erasing voltage two of described erasing voltage one wipes described SONOS flash data, until threshold voltage value of reaching capacity two of described SONOS flash memory.
The grid injection that described erasing voltage two produces in order to suppress described erasing voltage one, makes described threshold voltage can further reduce and reach described saturation value two.Described in when described saturation value two is wiped for the described erasing voltage two of employing, threshold voltage can reach minimum value, and the absolute value of described saturation value two is greater than the absolute value of described saturation value one.The erasing time of described erasing voltage two for arriving described saturation value at the beginning from described threshold voltage until described threshold voltage arrives described saturation value two time cut-off.Described erasing voltage two is identical with the normal erasing voltage of wiping same described SONOS flash memory in prior art, the described saturation value two obtaining is like this just identical with the saturation value of the threshold voltage obtaining in prior art, so just can keep wiping the rear threshold voltage degree of depth.
As shown in Figure 2, described saturation value two is measured the threshold voltage of described SONOS flash memory by add described erasing voltage two on the grid of described SONOS flash memory time and the relation curve in erasing time two obtains.According to described relation curve two, in step 2, control described threshold voltage and arrive described saturation value two by controlling the erasing time of described erasing voltage two, the t1～t2 that gets threshold voltage in described relation curve two time period between saturation value one and saturation value two and be on time shaft is the erasing time of described erasing voltage two.Wherein t2 is, relation curve two threshold voltage values are that the erasing time of correspondence is also the erasing time corresponding to intersection point place of relation curve one and relation curve two to saturation value for the moment.
As shown in Figure 2, in prior art, in order to keep the reliability of the threshold voltage degree of depth, retainer member, generally adopt relation curve two modes to wipe.And after employing the inventive method, the pattern that adopts the pattern of relation curve one to wipe, use instead during to t1 relation curve two is wiped, be equivalent to like this after the t1 time, pattern according to the dotted line in Fig. 2 is wiped, the time that invention just can be saved t2-t1 like this, and the last threshold voltage degree of depth can remain unchanged.
By specific embodiment, the present invention is had been described in detail above, but these are not construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (3)
1. a SONOS flash data method for deleting, is characterized in that, comprises the steps:
Step 1, a pair of SONOS flash data of employing erasing voltage are wiped, until threshold voltage value of reaching capacity of described SONOS flash memory; Described erasing voltage one is in order to improve the erasing speed of described SONOS flash data, described in when described saturation value one is wiped for the described erasing voltage one of employing, threshold voltage can reach minimum value, and the erasing time of described erasing voltage one is from adding described erasing voltage at the beginning until described threshold voltage arrives the cut-off for the moment of described saturation value;
Step 2, employing are less than the erasing voltage two of described erasing voltage one wipes described SONOS flash data, until threshold voltage value of reaching capacity two of described SONOS flash memory; The grid injection that described erasing voltage two produces in order to suppress described erasing voltage one, makes described threshold voltage can further reduce and reach described saturation value two; Described in when described saturation value two is wiped for the described erasing voltage two of employing, threshold voltage can reach minimum value, and the absolute value of described saturation value two is greater than the absolute value of described saturation value one; The erasing time of described erasing voltage two for arriving described saturation value at the beginning from described threshold voltage until described threshold voltage arrives described saturation value two time cut-off.
2. SONOS flash data method for deleting as claimed in claim 1, is characterized in that: described saturation value one is by adding described erasing voltage to measure the threshold voltage of described SONOS flash memory for the moment and the relation curve in erasing time one obtains on the grid at described SONOS flash memory; According to described relation curve one, in step 1, control described threshold voltage and arrive described saturation value one by controlling the erasing time of described erasing voltage one.
3. SONOS flash data method for deleting as claimed in claim 1, is characterized in that: described saturation value two measures the threshold voltage of described SONOS flash memory by add described erasing voltage two on the grid of described SONOS flash memory time and the relation curve in erasing time two obtains; According to described relation curve two, in step 2, control described threshold voltage and arrive described saturation value two by controlling the erasing time of described erasing voltage two.
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| CN1777959A (en) * | 2003-04-24 | 2006-05-24 | 先进微装置公司 | Method of dual cell memory device operation for improved end-of-life read margin |
| CN101692350A (en) * | 2007-10-18 | 2010-04-07 | 旺宏电子股份有限公司 | Erase method for silicon-oxide-nitride-oxide-silicon type and not gate flash |
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| CN1777959A (en) * | 2003-04-24 | 2006-05-24 | 先进微装置公司 | Method of dual cell memory device operation for improved end-of-life read margin |
| CN101692350A (en) * | 2007-10-18 | 2010-04-07 | 旺宏电子股份有限公司 | Erase method for silicon-oxide-nitride-oxide-silicon type and not gate flash |
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