CN102345165B - Device for reducing warping degree of polycrystalline silicon slice - Google Patents
Device for reducing warping degree of polycrystalline silicon slice Download PDFInfo
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- CN102345165B CN102345165B CN201110231808.7A CN201110231808A CN102345165B CN 102345165 B CN102345165 B CN 102345165B CN 201110231808 A CN201110231808 A CN 201110231808A CN 102345165 B CN102345165 B CN 102345165B
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Abstract
The invention discloses a device for reducing the warping degree of a polycrystalline silicon slice, which comprises a reaction furnace tube and is characterized in that the bottom of the reaction furnace tube is provided with a dispersion tube, both ends of the dispersion tube are provided with inlets, a plurality of through holes are arranged in the tube wall of the dispersion tube, and the dispersion tube is communicated with the reaction furnace tube through the through holes. Through selecting the proper device, the minimum warp increase quantity can reach 5.35 after a polycrystalline thin film grows on the silicon slice surface, and in addition, the uniformity of the silicon slice can also reach the use requirement.
Description
Technical field
The present invention relates to a kind of device that reduces warp of polycrystalline silicon wafer.
Background technology
Be illustrated in figure 1 polysilicon membrane growing apparatus in prior art, it comprises reaction boiler tube 1, and reaction boiler tube 1 is respectively arranged with electric heater 12 up and down.Reaction boiler tube 1 inner bottom part is provided with inlet pipe 2.Inlet pipe 2 one end are provided with import 21.Inlet pipe 2 tube walls are provided with equally distributed through hole (not shown).Part reactant gases, from import 21, enters in reaction boiler tube 1 through through hole after inlet pipe 2 transverse flow.One end of the interior import 21 away from inlet pipe 2 of reaction boiler tube 1 is provided with fire door inlet pipe 3.The upper end of fire door inlet pipe 3 is provided with import 31.On the tube wall of fire door inlet pipe 3, be provided with through hole (not shown).Another part reactant gases enters in reaction boiler tube 1 through through hole after import 31 enters fire door inlet pipe 3 longitudinal flows.Reaction boiler tube 1 is provided with extraction pipe 11 near one end of the import 21 of inlet pipe 2.The gas of vacuum extractor (not shown) in extraction pipe 11 extraction boiler tubes 1, to increase the mobility of the reactant gases in reaction boiler tube 1.One of device shortcoming of this growth polycrystalline is reactant gases skewness, causes the polycrystal film of growth in uneven thickness, and easily causes the silicon warp degree after growth polycrystalline to exceed the standard of service requirements.The silicon chip WARP mean value of not growing before polycrystal film is generally 10 left and right.In some Application Areas, need WARP≤37.Utilize apparatus and method of the prior art, after polycrystalline technique, WARP increasing amount is average 27.47, cannot reach service requirements, and the excessive fraction defective that causes of amplification rises.After silicon chip surface growth polycrystalline, angularity all can increase.When increasing degree is excessive, cannot meet service requirements.
Each parameter value of polycrystalline growth technique also can exert an influence to angularity increasing degree, and finding a kind of production method and device that reduces warp of polycrystalline silicon wafer is technical problem important in this area to solve angularity excessive.
Summary of the invention
The object of the invention is the device of spending greatly, can reduce warp of polycrystalline silicon wafer in order to overcome deficiency of the prior art, provide the silicon warp that prevents from growing after polycrystalline.
For realizing above object, the present invention is achieved through the following technical solutions:
The device that reduces warp of polycrystalline silicon wafer, comprises reaction boiler tube, it is characterized in that, described reaction boiler tube bottom is provided with disperse pipe, and disperse pipe two ends are provided with import; On disperse tube wall, be provided with a plurality of through holes; Disperse pipe is communicated with reaction boiler tube by through hole.
Preferably, the 5-15 that is positioned at the via densities that the via densities of 0.3 times of pipe range scope is other parts in the middle of the disperse pipe of reaction boiler tube doubly.
0.3 times of described pipe range refers to from the disperse pipe mid point that is positioned at reaction boiler tube and to two ends, extends respectively the length of 0.15 times.
Preferably, the through hole being positioned on the disperse pipe of reaction boiler tube is symmetrical arranged centered by the disperse pipe mid point that is positioned at reaction boiler tube.
Close to import more, pressure is larger, and pressure is larger, and flow velocity is faster.And disperse pipe middle part is from source of the gas place farthest, the therefore sparse through hole that arranges in place near import at disperse pipe, and the intensive through hole that arranges in middle part can contribute to the pressure in reaction tubes even.
The present invention is by selecting suitable device, and after silicon chip surface growth polycrystal film, the I of WARP increasing amount reaches 5.35.And the homogeneity of silicon chip also can reach service requirements.
Accompanying drawing explanation
Fig. 1 is the apparatus structure schematic diagram at silicon chip surface preparing polysilicon film using in prior art.
Fig. 2 is the apparatus structure schematic diagram at silicon chip surface preparing polysilicon film using in the present invention.
Fig. 3 is the disperse tubular construction schematic diagram that is positioned at reaction boiler tube in the present invention.
Warp value and the corresponding graphic representation of homogeneity with temperature that Fig. 4 produces silicon chip for the device using in the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described in detail:
As shown in Figure 2, can reduce the device of warp of polycrystalline silicon wafer, it comprises reaction boiler tube 1, and reaction boiler tube is provided with well heater 12 up and down, is used to reaction boiler tube 1 heating.Reaction boiler tube 1 inner bottom part is provided with disperse pipe 4.Disperse pipe 4 two ends are respectively arranged with the first import 41 and the second import 42.As shown in Figure 3, to be positioned at the length L of reaction boiler tube be 2300mm to disperse pipe.Disperse pipe 4 tube walls are provided with through hole 43.The two ends that are positioned at reaction boiler tube 1 from disperse pipe 4, to 0.35L, are respectively arranged with a through hole within the scope of 805mm, residue 0.3L is provided with 12 through holes within the scope of 690mm.
During use, reactant gases enters in disperse pipe 4 from the first import 41 and the second import 42 respectively, after the interior transverse flow of disperse pipe 4, through through hole 43, enters in reaction boiler tube 1.Reaction boiler tube 1 is provided with extraction pipe 11.The gas of vacuum extractor (not shown) in extraction pipe 11 extraction boiler tubes 1, to increase the mobility of the reactant gases in reaction boiler tube 1.
Use respectively said apparatus device of the prior art, the angularity numerical value of the polysilicon chip of producing under identical processing parameter condition is as shown in the table:
Use the device in the present invention, furnace pressure 220mtorr, the gas flow 75ml/min entering from the first import 41, the gas flow 75ml/min entering from the second import 42, the WARP value of the polysilicon chip of producing the in the situation that of differing temps and the corresponding relation curve of homogeneity and temperature are as shown in Figure 4.As can be seen from Figure 4, in 630 ℃～680 ℃, the polysilicon chip WARP increased value of production is 26.39 to the maximum, and homogeneity is 10.2 to the maximum, and the performance of this two aspect all can meet service requirements.
Comparative example 1
Use the device shown in Fig. 1,680 ℃ of the temperature in reaction boiler tube, furnace pressure 180mtorr, the gas flow 200ml/min entering from inlet pipe 2, the gas flow 50ml/min entering from fire door inlet pipe 3.
Use the device shown in Fig. 2,670 ℃ of the temperature in reaction boiler tube, furnace pressure 220mtorr, the gas flow 75ml/min entering from inlet pipe 4 first imports 41, the gas flow 75ml/min entering from the second import 42.
Comparative example 1 contrasts with the silicon chip performance test data that embodiment 10 produces
Through hole on disperse pipe 4 in the present invention, middle 0.3L scope inner via hole number can also be 5 times, 10 times, 11 times and 14 times of two ends 0.35L scope inner via hole numbers.
Embodiment in the present invention, only for the present invention will be described, does not form the restriction to claim scope, and other substituting of being equal in fact that those skilled in that art can expect, all in protection domain of the present invention.
Claims (2)
1. reduce the device of warp of polycrystalline silicon wafer, comprise reaction boiler tube, it is characterized in that, described reaction boiler tube bottom is provided with disperse pipe, and disperse pipe two ends are provided with import; On disperse tube wall, be provided with a plurality of through holes; Disperse pipe is communicated with reaction boiler tube by through hole; The 5-15 of the via densities that the via densities that is positioned at the middle 0.3 times of pipe range scope of disperse pipe of reaction boiler tube is other parts doubly.
2. the device of reduction warp of polycrystalline silicon wafer according to claim 1, is characterized in that, the through hole being positioned on the disperse pipe of reaction boiler tube is symmetrical arranged centered by the disperse pipe mid point that is positioned at reaction boiler tube.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110231808.7A CN102345165B (en) | 2011-08-14 | 2011-08-14 | Device for reducing warping degree of polycrystalline silicon slice |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201110231808.7A CN102345165B (en) | 2011-08-14 | 2011-08-14 | Device for reducing warping degree of polycrystalline silicon slice |
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| CN102345165A CN102345165A (en) | 2012-02-08 |
| CN102345165B true CN102345165B (en) | 2014-03-19 |
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| CN201110231808.7A Active CN102345165B (en) | 2011-08-14 | 2011-08-14 | Device for reducing warping degree of polycrystalline silicon slice |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110257908A (en) * | 2019-05-28 | 2019-09-20 | 天津中环领先材料技术有限公司 | A kind of polysilicon membrane preparation process |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5344796A (en) * | 1992-10-19 | 1994-09-06 | Samsung Electronics Co., Ltd. | Method for making polycrystalline silicon thin film |
| CN201232028Y (en) * | 2008-04-20 | 2009-05-06 | 徐州东南多晶硅材料研发有限公司 | Polycrystalline silicon reducing furnace with adjustable air inlet pipe nozzle |
| CN101572228A (en) * | 2008-04-28 | 2009-11-04 | 中芯国际集成电路制造(北京)有限公司 | Methods for forming polysilicon thin film and gate |
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2011
- 2011-08-14 CN CN201110231808.7A patent/CN102345165B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5344796A (en) * | 1992-10-19 | 1994-09-06 | Samsung Electronics Co., Ltd. | Method for making polycrystalline silicon thin film |
| CN201232028Y (en) * | 2008-04-20 | 2009-05-06 | 徐州东南多晶硅材料研发有限公司 | Polycrystalline silicon reducing furnace with adjustable air inlet pipe nozzle |
| CN101572228A (en) * | 2008-04-28 | 2009-11-04 | 中芯国际集成电路制造(北京)有限公司 | Methods for forming polysilicon thin film and gate |
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Address after: 201617 no.558, changta Road, Shihudang Town, Songjiang District, Shanghai Patentee after: Shanghai crystal silicon material Co., Ltd Address before: 201617 No. 500 South noble Road, Shanghai, Songjiang District Patentee before: Shanghai Hejing Silicon Material Co., Ltd. |