CN102331527A - Method for automatically detecting impedance characteristic in printed circuit board - Google Patents
Method for automatically detecting impedance characteristic in printed circuit board Download PDFInfo
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- CN102331527A CN102331527A CN2010102274972A CN201010227497A CN102331527A CN 102331527 A CN102331527 A CN 102331527A CN 2010102274972 A CN2010102274972 A CN 2010102274972A CN 201010227497 A CN201010227497 A CN 201010227497A CN 102331527 A CN102331527 A CN 102331527A
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- 238000012360 testing method Methods 0.000 claims abstract description 75
- 238000001514 detection method Methods 0.000 abstract description 16
- 238000013461 design Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
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Abstract
The invention discloses a method for automatically detecting the impedance characteristic in a printed circuit board (PCB), which comprises the following steps of: acquiring all impedance test strips of the PCB; acquiring a network name of each impedance test strip and network names of reference via holes of the impedance test strips; and according to the network names of the impedance test strips, determining a layer number of each impedance test strip on the PCB, comparing the network names of the reference via holes in the adjacent layers of the impedance test strips, and highlighting the impedance test strips when a comparison result is that the network names of the reference via holes in the adjacent layers of the impedance test strips are inconsistent. Due to the adoption of the method disclosed by the invention, not only can the consistency between the network name of the reference via hole on each impedance test strip and the network name of the reference via hole on the impedance test strip on the adjacent layer be rapidly detected, but also the detection efficiency of the impedance characteristic can be promoted. Moreover, the automatic detecting method can also be embedded in board distribution software of the PCB or be used in a plug-in way and is flexible and convenient to use without increasing the test cost.
Description
Technical Field
The present invention relates to printed circuit boards, and more particularly to the detection of impedance characteristics in printed circuit boards.
Background
Currently, it is very difficult to perform impedance testing in printed circuit boards, because the impedance lines on the board are typically short. Therefore, the printed board for processing the PCB circuit needs to specially design impedance lines with a certain length for impedance test, the physical size of the impedance lines is the same as that of the corresponding impedance lines in the PCB circuit, and the impedance lines and the PCB circuit are simultaneously processed and manufactured under the same process condition, so that the impedance lines specially used for test are cut to form impedance test strips, and the characteristics of the corresponding impedance lines in the PCB circuit can be reflected by testing the impedance characteristics of the impedance lines.
However, in the prior art, in order to test whether the impedance characteristics of signals, especially high-speed signals, are stable, an impedance test strip is often added to a PCB board, and the related properties of the impedance test strip are designed according to the actual routing in the PCB board. However, the method for detecting the impedance characteristic has high cost, complicated implementation process and low efficiency.
In view of this, how to design a method for automatically detecting impedance characteristics and improve detection efficiency is a subject faced by the related technical personnel.
Disclosure of Invention
Aiming at the defects existing in the prior art when the impedance characteristic is detected in the printed circuit board, the invention provides a novel detection method, which is rapid in detection and high in efficiency, and does not need to increase any cost.
According to an aspect of the present invention, there is provided a method for automatically detecting impedance characteristics in a printed circuit board, including:
acquiring all impedance test strips of the printed circuit board;
acquiring the network name of each impedance test strip and the network name of a reference through hole in the impedance test strip; and
determining the number of layers of the impedance test strips on the printed circuit board according to the network names of the impedance test strips, comparing the network names of the reference through holes in the impedance test strips with the network names of the reference through holes in the impedance test strips of the adjacent layers, and highlighting the impedance test strips when the comparison result is inconsistent.
The reference via is electrically grounded.
According to one embodiment, when the impedance test strip is located on a top layer of the printed circuit board, the adjacent layer is selected to be a layer next to the top layer. According to another embodiment, when the impedance test strip is located on a bottom layer of the printed circuit board, the adjacent layer is selected to be a layer above the bottom layer. According to yet another embodiment, when the impedance test strip is located in an inner layer of a printed circuit board, the adjacent layer is selected to be a layer above the inner layer or a layer below the inner layer.
Wherein, the detection method also comprises the following steps: after the impedance test strip is highlighted, the relative coordinate position of the impedance test strip and the network name are input to a target document.
By adopting the method for automatically detecting the impedance characteristic, whether the network name of the reference via hole on the impedance test strip is consistent with the network name of the reference via hole in the impedance test strip of the adjacent layer can be quickly detected, and the detection efficiency of the impedance characteristic can be improved. In addition, the automatic detection method can be embedded in the board distribution software of the PCB or externally hung for calling, the use is flexible and convenient, and the test cost does not need to be increased.
Drawings
The various aspects of the present invention will become more apparent to the reader after reading the detailed description of the invention with reference to the attached drawings. Wherein,
fig. 1 shows a flow diagram of a method for automatically detecting impedance characteristics in a printed circuit board, in accordance with an embodiment of the present invention.
Detailed Description
Embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.
Fig. 1 shows a flow diagram of a method for automatically detecting impedance characteristics in a printed circuit board, in accordance with an embodiment of the present invention. As mentioned above, a typical PCB manufacturer adds an impedance test strip with a grounding point around the PCB board, which is called "Coupon", and designs the relevant properties of the impedance test strip according to the actual trace of the PCB board so as to detect the impedance characteristic.
Referring to fig. 1, in the automatic detection method of the present invention, first, step S101 is executed to output the number of layers of the PCB, and because the current control circuit on the PCB is abnormally complex and the control signals are various, the PCB multi-layer board design is often adopted. Then, in step S103, all impedance test strips on the PCB board are obtained, and then steps S105 and S107 are performed to obtain the network name and all pins of each impedance test strip and the network name of the reference vias of the impedance test strip.
Further, step S109 is entered, and the specific layer position of the impedance test strip on the PCB board is determined according to the network name of the impedance test strip. In the above description, if the multi-layer board is divided into the top layer of the PCB, the bottom layer of the PCB, and the inner layer of the PCB, the impedance test strip may be located at either the top layer or the bottom layer of the PCB or the inner layer of the PCB. In step S111, the network name of the reference via on the impedance test strip is compared with the network name of the reference via of the impedance test strip of the adjacent layer, and if the comparison result is inconsistent, the impedance test strip is highlighted (step S113).
It should be understood by those skilled in the art that fig. 1 only symbolically describes the process of performing impedance detection on a single impedance test strip, and the detection process of all other impedance test strips on the PCB is similar to the above-described process, and therefore is omitted here. In addition, the reference via in the impedance test strip is electrically grounded.
According to the position of the impedance test strip, when the impedance test strip is positioned on the top layer of the PCB, the next layer of the top layer, namely the second layer, can be used as an adjacent layer to compare whether the network names of the two corresponding reference vias are consistent or not. When the impedance test strip is located at the bottom layer of the PCB board, the upper layer, i.e. the penultimate layer, of the bottom layer may be used as an adjacent layer to compare whether the network names of the two corresponding reference vias are consistent. In addition, when the impedance test strip is located in an inner layer of the PCB board, an upper layer or a lower layer of the layer where the impedance test strip is located may be selected as an adjacent layer to compare whether a network name of a reference via on the adjacent layer is consistent with a network name of a reference via of the impedance test strip of the adjacent layer. Preferably, when the comparison result is inconsistent, the impedance test strip is highlighted, and after the impedance test strip is highlighted, the relative coordinate position of the impedance test strip and the network name are input into a target document.
It should be noted that the automatic detection method of the present invention may also be embedded in the board layout software of the PCB board, or may also be separately made as an external call to the application software. For example, in the layout software of the PCB, corresponding operation instructions may be added to implement the implementation steps of the automatic detection method, such as obtaining the number of layers of the PCB using an "output" command, obtaining the network name of the impedance test strip using an "object" command, and comparing whether the network names are consistent using a "match" command and related additional parameters. It will be appreciated by those skilled in the art that the detection of the impedance characteristics achieved by the commands described above is also within the spirit of the present invention.
By adopting the method for automatically detecting the impedance characteristic, whether the network name of the reference via hole on the impedance test strip is consistent with the network name of the reference via hole of the impedance test strip at the adjacent layer can be quickly detected, and the detection efficiency of the impedance characteristic can be improved. In addition, the automatic detection method can be embedded in the board distribution software of the PCB or externally hung for calling, the use is flexible and convenient, and the test cost does not need to be increased.
Hereinbefore, specific embodiments of the present invention are described with reference to the drawings. However, those skilled in the art will appreciate that various modifications and substitutions can be made to the specific embodiments of the present invention without departing from the spirit and scope of the invention. Such modifications and substitutions are intended to be included within the scope of the present invention as defined by the appended claims.
Claims (6)
1. A method for automatically detecting impedance characteristics in a printed circuit board, the method comprising:
acquiring all impedance test strips of the printed circuit board;
acquiring a network name of each impedance test strip and a network name of a reference through hole in the impedance test strip; and
determining the number of layers of the impedance test strip on the printed circuit board according to the network name of the impedance test strip, comparing the network name of the reference through hole in the impedance test strip with the network name of the reference through hole in the impedance test strip of the adjacent layer, and highlighting the impedance test strip when the comparison result is inconsistent.
2. The method of claim 1, wherein the reference via is electrically grounded.
3. The method of claim 1, wherein when the impedance test strip is positioned on a top layer of the printed circuit board, the adjacent layer is selected to be a layer next to the top layer.
4. The method of claim 1 wherein when said impedance test strip is positioned on a bottom layer of said printed circuit board, said adjacent layer is selected to be a layer above said bottom layer.
5. The method of claim 1, wherein when the impedance test strip is located in an interior layer of the printed circuit board, the adjacent layer is selected to be a layer above the interior layer or a layer below the interior layer.
6. The method of claim 1, wherein the method further comprises: after highlighting the impedance test strip, the relative coordinate position of the impedance test strip and the network name are input to a target document.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102274972A CN102331527A (en) | 2010-07-12 | 2010-07-12 | Method for automatically detecting impedance characteristic in printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102274972A CN102331527A (en) | 2010-07-12 | 2010-07-12 | Method for automatically detecting impedance characteristic in printed circuit board |
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| Publication Number | Publication Date |
|---|---|
| CN102331527A true CN102331527A (en) | 2012-01-25 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2010102274972A Pending CN102331527A (en) | 2010-07-12 | 2010-07-12 | Method for automatically detecting impedance characteristic in printed circuit board |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104502715A (en) * | 2014-12-31 | 2015-04-08 | 广州兴森快捷电路科技有限公司 | Impedance testing method of impedance board |
| CN105158571A (en) * | 2015-09-23 | 2015-12-16 | 深圳崇达多层线路板有限公司 | Method and device for automatically generating PCB (Printed Circuit Board) impedance test strip |
| CN105675990A (en) * | 2016-01-01 | 2016-06-15 | 广州兴森快捷电路科技有限公司 | Link impedance test method for multi-layer interconnection circuit board |
-
2010
- 2010-07-12 CN CN2010102274972A patent/CN102331527A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104502715A (en) * | 2014-12-31 | 2015-04-08 | 广州兴森快捷电路科技有限公司 | Impedance testing method of impedance board |
| CN104502715B (en) * | 2014-12-31 | 2017-07-04 | 广州兴森快捷电路科技有限公司 | The impedance detecting method of impedance plate |
| CN105158571A (en) * | 2015-09-23 | 2015-12-16 | 深圳崇达多层线路板有限公司 | Method and device for automatically generating PCB (Printed Circuit Board) impedance test strip |
| CN105158571B (en) * | 2015-09-23 | 2018-04-03 | 深圳崇达多层线路板有限公司 | PCB testing impedance bar automatic generation methods and device |
| CN105675990A (en) * | 2016-01-01 | 2016-06-15 | 广州兴森快捷电路科技有限公司 | Link impedance test method for multi-layer interconnection circuit board |
| CN105675990B (en) * | 2016-01-01 | 2019-01-18 | 广州兴森快捷电路科技有限公司 | The link impedance detecting method of multi-layered interconnection board |
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Application publication date: 20120125 |
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| WD01 | Invention patent application deemed withdrawn after publication |