CN102326253A - Resistive memory element and use thereof - Google Patents
Resistive memory element and use thereof Download PDFInfo
- Publication number
- CN102326253A CN102326253A CN2009801571695A CN200980157169A CN102326253A CN 102326253 A CN102326253 A CN 102326253A CN 2009801571695 A CN2009801571695 A CN 2009801571695A CN 200980157169 A CN200980157169 A CN 200980157169A CN 102326253 A CN102326253 A CN 102326253A
- Authority
- CN
- China
- Prior art keywords
- resistance
- memory element
- pulse
- electrode
- element body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000463 material Substances 0.000 claims abstract description 27
- 230000004888 barrier function Effects 0.000 claims abstract description 18
- 229910052742 iron Inorganic materials 0.000 claims abstract description 15
- 239000004065 semiconductor Substances 0.000 claims abstract description 15
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims description 24
- 238000003860 storage Methods 0.000 claims description 3
- 230000008859 change Effects 0.000 abstract description 51
- 239000000203 mixture Substances 0.000 abstract description 12
- 230000003446 memory effect Effects 0.000 abstract description 11
- 229910052802 copper Inorganic materials 0.000 abstract description 3
- 239000000523 sample Substances 0.000 description 53
- 230000014759 maintenance of location Effects 0.000 description 27
- 229910052723 transition metal Inorganic materials 0.000 description 19
- 150000003624 transition metals Chemical class 0.000 description 19
- 229910002367 SrTiO Inorganic materials 0.000 description 9
- 229910010413 TiO 2 Inorganic materials 0.000 description 9
- 230000014509 gene expression Effects 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- 238000011156 evaluation Methods 0.000 description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 5
- 230000007547 defect Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 5
- 239000001301 oxygen Substances 0.000 description 5
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 4
- 101000963523 Homo sapiens Magnesium transporter MRS2 homolog, mitochondrial Proteins 0.000 description 4
- 101000589392 Homo sapiens Pannexin-1 Proteins 0.000 description 4
- 102100039143 Magnesium transporter MRS2 homolog, mitochondrial Human genes 0.000 description 4
- 102100032361 Pannexin-1 Human genes 0.000 description 4
- 101100024312 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) MRS3 gene Proteins 0.000 description 4
- 230000033228 biological regulation Effects 0.000 description 4
- 230000002950 deficient Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 229910052804 chromium Inorganic materials 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 238000000605 extraction Methods 0.000 description 3
- 229910052748 manganese Inorganic materials 0.000 description 3
- 230000007246 mechanism Effects 0.000 description 3
- 230000005012 migration Effects 0.000 description 3
- 238000013508 migration Methods 0.000 description 3
- 239000000843 powder Substances 0.000 description 3
- 238000004549 pulsed laser deposition Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910004121 SrRuO Inorganic materials 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000005238 degreasing Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 239000004570 mortar (masonry) Substances 0.000 description 2
- SFMJNHNUOVADRW-UHFFFAOYSA-N n-[5-[9-[4-(methanesulfonamido)phenyl]-2-oxobenzo[h][1,6]naphthyridin-1-yl]-2-methylphenyl]prop-2-enamide Chemical compound C1=C(NC(=O)C=C)C(C)=CC=C1N1C(=O)C=CC2=C1C1=CC(C=3C=CC(NS(C)(=O)=O)=CC=3)=CC=C1N=C2 SFMJNHNUOVADRW-UHFFFAOYSA-N 0.000 description 2
- 229910000510 noble metal Inorganic materials 0.000 description 2
- 238000005036 potential barrier Methods 0.000 description 2
- 230000002035 prolonged effect Effects 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 230000006641 stabilisation Effects 0.000 description 2
- 238000005303 weighing Methods 0.000 description 2
- 229920000144 PEDOT:PSS Polymers 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 238000007743 anodising Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000001354 calcination Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000003306 harvesting Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 230000005527 interface trap Effects 0.000 description 1
- 230000006386 memory function Effects 0.000 description 1
- 230000000116 mitigating effect Effects 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000001552 radio frequency sputter deposition Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/31—Material having complex metal oxide, e.g. perovskite structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/101—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Semiconductor Memories (AREA)
Abstract
Disclosed is a resistive memory element which has a high resistance change rate and an excellent memory effect. Specifically disclosed is a resistive memory element (1) which comprises an element body (2) and at least a pair of electrodes (3, 4) which face each other via at least a part of the element body (2). The element body (2) is formed from a polycrystalline oxide semiconductor that has a composition represented by the following general formula: Ti1-xMxO2 (wherein M represents at least one of Fe, Co, Ni and Cu, and x satisfies 0.005 <= x <= 0.05). The first electrode (3) is formed from a material which is capable of forming a Schottky barrier that can exhibit rectifying properties and resistance change characteristics at the interface region with the element body (2). The second electrode (4) is formed from a material which is capable of obtaining a more Ohmic junction with the element body (2) when compared with the first electrode (3).
Description
Technical field
The present invention relates to resistance memory element and method for using thereof, particularly relate to the resistance memory element and the method for using thereof that possess the element body (plain body) that constitutes by oxide semiconductor.
Background technology
The resistance memory element possesses the element body with resistance memory characteristic, and this element body has following characteristic: for example demonstrate under the state in the early stage than higher resistance, but when applying the above voltage of setting; Be varied to low resistance state; Even remove voltage, also keep (memory) this low resistance state, on the other hand; When the element body that is in low resistance state is applied the voltage more than the setting in the opposite direction; Return to high resistance state,, also keep (memory) high resistance state even remove this voltage.
Such resistance memory element through applying the voltage more than the threshold value respectively in positive direction and in the other direction, can switch to low resistance state and high resistance state, through switching, makes resistance variations, thereby can remember it.Through utilizing such resistance switching characteristic, the resistance memory element is not only as so-called resistance memory element but also can use as switching device.
Can think: the resistance memory element is because the variation of the vague and general layer thickness of Schottky barrier or electronics capturing or release etc. on the interface of electrode and the element body that is made of semiconductor or body material energy level (the accurate position of バ Le Network); The easiness that surpasses the electronics of potential barrier changes; Thus, variation becomes high resistance state and low resistance state.
In the resistance memory element; Need be under different polarities voltage controlling resistance (being called as ambipolar); When basically the front side of Schottky barrier being applied voltage; The switching of high resistance
low resistance state takes place; When applying voltage to tossing about, the switching of low resistance
high resistance state takes place.Can think display characteristic on the entire electrode interface, excellent in stability.
But; One of problem is the resistance retention performance; Has following problem: possibly be cause electronics capturing or discharge on interface or body material energy level owing to resistance switches; Therefore, the bad stability of low resistance state particularly is along with temperature rises or effluxion resistance switches to high resistance state.As the technology that can solve such problem, the technology of record in TOHKEMY 2006-324447 communique (patent documentation 1) is for example arranged.
In patent documentation 1, proposed to improve the technology of resistance memory characteristic.That is, in patent documentation 1, have with first electrode (for example Pt electrode) and another second electrode clamping oxide semiconductor that can form Schottky barrier (Nb:SrTiO for example
3) the resistance memory element of structure in, adopt Pt/Nb:SrTiO
3The structure of/dielectric film/electrode.Wherein, Above-mentioned dielectric film is played a role as suppressing the potential barrier that interface trap from oxide semiconductor discharges electronics, thus, suppress the capturing or discharge probability of electronics from the interface; Its result has realized the improvement of data retention characteristics (resistance memory effect).
But, in the technology of patent documentation 1 record,, reckon with the reduction of resistance change rate and the drawbacks such as increase of switched voltage (switching voltage) through introducing insulating barrier.
Therefore, require a kind of resistance memory element, it is even without being provided with aforesaid insulating barrier etc., and also such with the prior art equal extent, resistance change rate is big, obtains good resistance memory effect.
The prior art document
Patent documentation
Patent documentation 1: TOHKEMY 2006-324447 communique
Summary of the invention
Problem to be solved by this invention
The objective of the invention is to, the resistance memory element and the method for using thereof that can satisfy aforesaid requirement are provided.
The means of dealing with problems
First aspect of the present invention, at first towards a kind of resistance memory element, it possesses: element body and across opposed at least one pair of electrode of at least a portion of element body; When between pair of electrodes, applying the switched voltage of first direction, at least a portion generation low resistanceization in the element body between pair of electrodes, afterwards; Even remove the switched voltage of first direction, at least a portion between pair of electrodes also keeps low resistance state, on the other hand; When between pair of electrodes, applying the switched voltage of the second direction opposite with first direction; At least a portion generation high resistanceization in the element body between pair of electrodes, afterwards, even remove the switched voltage of second direction; At least a portion between pair of electrodes also keeps high resistance state; In order to solve above-mentioned technical task, it is characterized in that having following structure.
That is, the said elements body is characterized in that, by having general formula: Ti
1-xM
xO
2The oxide semiconductor of the composition of (M is at least a among Fe, Co, Ni and the Cu, and 0.005≤x≤0.05) expression constitutes.
Above-mentioned oxide semiconductor is preferably polycrystal.
In the resistance memory element of the present invention, at least one of preferred pair of electrodes is by constituting with the element body material that special base contacts that disappears.
Resistance memory element of the present invention can be effective to impedance matching.
The second aspect of resistance memory element of the present invention; It is characterized in that; Possess: element body and first and second electrode that is provided with the mode that contacts with element body; First electrode is made up of the material that can form the Schottky barrier that can demonstrate rectification property and resistance variation characteristic at the interface zone with element body, and said second electrode is to constitute by comparing the material that said element body more obtains ohmic contact with said first electrode, and element body is by having general formula Ti
1-xM
xO
2The oxide semiconductor of the composition of (M is at least a among Fe, Co, Ni and the Cu, and 0.005≤x≤0.05) expression constitutes.
Need to prove; Above-mentioned " said second electrode is to constitute by comparing the material that said element body more obtains ohmic contact with said first electrode " is meant; With the exposure phase ratio of the first electrode pair element body, the material that is become the contact that more is bordering on ohm property by the contact that makes the second electrode pair element body constitutes second electrode.
The present invention is also towards the method for using of the resistance memory element of above-mentioned second aspect.The method for using of resistance memory element of the present invention; It is characterized in that, comprising: the step of the low resistance state through realizing this resistance memory element at first potential pulse that applies first polarity between first and second electrode and through between first and second electrode, applying the step that realizes the high resistance state of this resistance memory element with second potential pulse of first opposite polarity second polarity.
The method for using of resistance memory element of the present invention; Preferably also possess following steps: through between first and second electrode, applying at least a intermediate voltage pulse; Realization demonstrates at least a interlaminated resistance state of the resistance value between above-mentioned low resistance state and the above-mentioned high resistance state, above-mentioned at least a intermediate voltage pulse be above-mentioned first polarity or above-mentioned second polarity and have above-mentioned first potential pulse and above-mentioned second potential pulse between energy.
As above-mentioned intermediate voltage pulse, apply at least a in the number of times for being selected from pulse duration, pulse amplitude and pulse, the preferred pulse of using median with above-mentioned first potential pulse and above-mentioned second potential pulse.
Aforesaid preferred method for using can use the resistance memory element as multivalued storage.
The invention effect
According to the present invention, obtain the resistance memory element that resistance change rate is big and have good resistance memory effect.Its reason can be inferred as follows.
The inventor infers: from the resistance switching characteristic of Schottky barrier type, make capturing or discharging stabilisation of electronics on interface and body material energy level, and extremely important for the improvement of resistance switching characteristic and resistance memory characteristic, at TiO
2The middle transition metal that adds, thus, if at TiO
2Band gap in form energy level, characteristic is improved and stabilisation.
In fact, by the TiO that is added with transition metal
2Scattered reflection measure, can confirm the absorption that causes by the energy level that forms in the band gap, can think that formed energy level influences capturing of electronics or discharges, thereby can improve the resistance retention performance of low resistance state.Its result can think, obtains good resistance memory effect.
In the resistance memory element of the present invention, when the oxide semiconductor of composed component body is polycrystal, the resistance retention performance of resistance memory effect, particularly low resistance state is further improved.This thinks that the crystal boundary in the polycrystal works.That is, the discontinuous construction of the such trapped electron of crystal boundary is set, make electronics capture or oxygen defect (sour element owe decrease) waits and is easy to generate, infer that this is for resistance of low resistance state in time and the generation high resistanceization is effective.
In the resistance memory element of the present invention, at least one of pair of electrodes demonstrates the effect of above-mentioned resistance change rate increase more significantly by disappearing material that special base contact when constituting with element body.
When resistance memory element of the present invention is used for impedance matching, can realize big impedance variations with low power consumption.
In the method for using of resistance memory element of the present invention; Implement following steps: the step of the low resistance state through first potential pulse that applies first polarity between first and second electrode being realized this resistance memory element and through to applying the step that realizes the high resistance state of this resistance memory element with second potential pulse of first opposite polarity second polarity between first and second electrode; In addition; If also implement following steps; That is: through to applying at least a intermediate voltage pulse between first and second electrode; Realization demonstrates at least a interlaminated resistance state of the resistance value between low resistance state and the high resistance state; Then when realizing good memory characteristic, can realize many-valuedization of the resistance value that this resistance memory element provides, said intermediate voltage pulse have first polarity or second polarity and have first potential pulse and second potential pulse between energy.
Under this situation, resistance memory element of the present invention, as stated; Owing to realize big resistance change rate, and then memory characteristic is good, when therefore using this element; Can stably realize multiple resistance states (many-valued), can be used as for example many-valued storage device or emulated memory device and use.
Thus, in the method for using of resistance memory element of the present invention, as stated; If carry out many-valuedization, then in the unit of same size, can keep multiple resistance states, therefore; Under the situation as the memory use, can in the same unit size, increase memory capacity.In addition, because width through changing the potential pulse applied or amplitude etc., can make resistance change continuously and be not the value that disperses, therefore, also can in the purposes of simulation, use.
Description of drawings
Fig. 1 is a sectional view of diagrammatically representing the resistance memory element of an embodiment of the invention.
Fig. 2 is the figure of I-E characteristic that is illustrated in the resistance memory element of the sample 14 in the scope that obtain in the experimental example 1, of the present invention.
Fig. 3 is the figure that is illustrated in the resistance memory element resistance retention performance at room temperature of extraneous sample 32 that obtain in the experimental example 1, of the present invention.
Fig. 4 is the figure of resistance retention performance of low resistance state that is illustrated in the resistance memory element of extraneous sample 32 that obtain in the experimental example 1, of the present invention.
Fig. 5 is the figure of resistance retention performance that is illustrated in the resistance memory element of the sample 14 in the scope that obtain in the experimental example 1, of the present invention.
Fig. 6 is the figure of impedance frequency characteristic that is illustrated in the resistance memory element of extraneous sample 32 that obtain in the experimental example 2, of the present invention.
Fig. 7 is the figure of impedance frequency characteristic that is illustrated in the resistance memory element of the sample 14 in the scope that obtain in the experimental example 2, of the present invention.
Fig. 8 is illustrated in the experimental example 3 the resistance memory element is applied the figure that first of potential pulse applies mode.
Fig. 9 is the figure of state of the resistance variations of the resistance memory element of expression when applying potential pulse with mode shown in Figure 8.
Figure 10 is illustrated in the experimental example 3 the resistance memory element is applied the figure that second of potential pulse applies mode.
Figure 11 is the figure of state of the resistance variations of the resistance memory element of expression when applying potential pulse with mode shown in Figure 10.
Figure 12 is illustrated in the experimental example 4 the resistance memory element is applied the figure that first of potential pulse applies mode.
Figure 13 is the figure of state of the resistance variations of the resistance memory element of expression when applying potential pulse with mode shown in Figure 12.
Figure 14 is illustrated in the experimental example 4 the resistance memory element is applied the figure that second of potential pulse applies mode.
Figure 15 is the figure of state of the resistance variations of the resistance memory element when applying potential pulse with mode shown in Figure 14.
Embodiment
With reference to Fig. 1, resistance memory element 1 possesses: element body 2 and across opposed at least one pair of electrode 3 and 4 of at least a portion of element body 2.In this execution mode, have: resistance memory element 1 forms the element body 2 of film like and forms the capacitor arrangement of the upper electrode 3 of film like above that on the lower electrode 4 of substrate shape.
As the film of element body 2, can use for example to have the target that regulation is formed, utilize PLD (pulsed laser deposition, Pulse Laser Deposition) method and form.At this,, use ArF or KrF excimer laser etc., but be not limited to these as laser.Lasing condition during as film forming can be energy 0.1～3J/cm
2, frequency 1～10Hz, 400～700 ℃ of temperature, vacuum degree 0.1Torr～1 * 10
-5Torr (O
2Flow).As becoming embrane method, in addition, can also use MOCVD (metal organic chemical vapor deposition, Metal Organic Chemical Vapor Deposition) method, RF sputtering method, MOD (metal organic deposit, Metal Organic deposition) method.
In addition, above-mentioned target has the general formula same with the element body that will obtain 2: Ti
1-xM
xO
2The composition of (M is at least a among Fe, Co, Ni and the Cu, and 0.005≤x≤0.05) expression is for example made through solid reaction process.That is,, use highly purified TiO as raw material
2Powder, and use Co as required
3O
4, Fe
2O
3, NiO and CuO each powder, carry out weighing with after reaching regulation and forming, in agate mortar, add ethanol and fully mix.After making its drying, add adhesive, after use high-pressure unit (high-pressure press) and mould are calcined, be shaped.After the degreasing of resulting shaping thing, adopt 1100 ℃～1200 ℃ temperature in atmosphere, to calcine 4 hours, thus, can obtain target.
As stated, in preferred embodiment, on upper electrode 3, form Schottky barrier, lower electrode 4 uses and obtains ohm property or near the electrode of ohm property, also can on any of upper electrode 3 and lower electrode 4, form Schottky barrier.
In addition, resistance memory element 1 also can be at the TiO as element body 2
2Be to form plane (the プ レ one Na type) structure of two electrodes 3 and 4 on the film side by side, and do not form the capacitor arrangement of illustrated execution mode.In addition, element body 2 can provide through body material (bulk body), rather than film.
In addition, among the present invention, the partial pressure of oxygen during through control system film is controlled electronics, according to process conditions, method, if desired, then adds the element that plays a role as donor, thereby can control carrier concn.
Below, for the experimental example of implementing describes in order to investigate the effect of being brought by resistance memory element of the present invention.
[experimental example 1]
Make general formula: Ti through solid reaction process
1-xM
xO
2The ceramic target (diameter: 20mm, thickness 5mm) of (M is any one among Cr, Mn, Co, Fe, Ni and the Cu) expression.As raw material, use highly purified TiO
2, Mn
3O
4, Cr
2O
3, Co
3O
4, Fe
2O
3, NiO and CuO each powder, carry out weighing with after reaching the regulation shown in the table 1 and forming, in agate mortar, add ethanol, fully mix.Then, make its drying after, add adhesive, use high-pressure unit and mould to calcine after, form with the mode that reaches the about 20mm of diameter, the about 5mm of thickness.After this formed body degreasing, calcining is 4 hours in 1100 ℃ temperature, atmosphere, obtains target.
On the other hand, as to form with as the TiO of element body
2Be that film obtains the material near the lower electrode of ohmic contact, prepare the SrTiO of doping Nb0.5 atom %
3(100) monocrystal substrate (Furuuchi Chemical system).
Then, use above-mentioned target, on aforesaid substrate, make Ti as the about 100nm of thickness of element body through the PLD legal system
1-xM
xO
2Film.At this, as laser, use Lambda Physics system " Compex110 " ArF excimer laser, with the laser light harvesting that is produced, incide in the target, make film.The condition of the laser during for film forming, making energy is 1J/cm
2, frequency is that 10Hz, temperature are that 600 ℃, vacuum degree are 0.1Torr (O
2Flow).
Need to prove, the composition analysis of the film of making as stated with fluorescent X-ray mensuration etc., results verification, in all samples, film is essentially same composition with the target that is used for its making.
Then, on above-mentioned film, use metal mask, form the upper electrode that the Pt by diameter 300 μ m constitutes through the DC sputtering method.
For the resistance memory element 1 in the sample that obtains thus; As shown in Figure 1; On lower electrode 4, form the extraction electrode 5 that constitutes by In-Ga, when W probe 6 is contacted with this extraction electrode 5, between extraction electrode 5 and upper electrode 3, be connected current/voltage generator 7; Estimate I-E characteristic, and estimate the resistance retention performance under room temperature and 100 ℃.As current/voltage generator 7, use " R6246A " current/voltage generator of Advantest manufactured.
Need to prove that sample 32 is a comparative example in the table 1.In the sample 1～31, has Pt/TiO
2/ Nb:SrTiO
3The structure of/In-Ga, but as sample 32, making has Pt/Nb:SrTiO
3The structure of/In-Ga and do not have TiO
2It is the sample of film.Therefore, in the sample 1～31, estimate at Pt and TiO
2Characteristic at the interface, in the sample 32, estimate at Pt and Nb:SrTiO
3Characteristic at the interface.
During I-E characteristic is estimated; Like
shown in (X and Y for magnitude of voltage) arbitrarily; The voltage that removing applies the resistance memory element is measured the electric current that flows through in the resistance memory element simultaneously.In addition, as shown in Figure 2, for I-E characteristic, will, low resistance state obtain the maximum voltage that changes under switching to the polarity of high resistance state as " estimated voltage ", and based on
Resistance value * 100 of resistance change rate [%]=(resistance value of the resistance value-low resistance state of high resistance state)/low resistance state
Formula calculate the resistance change rate under this " estimated voltage ".Its result is shown in table 1 " resistance change rate " item down.
Need to prove that I-E characteristic shown in Figure 2 is the sample 14 of table 1.
In addition; In estimating as the resistance retention performance of the index of resistance memory effect; After switching to each state of high resistance state and low resistance state; Under the voltage of 2V, measured resistance 10 hours in per 10 seconds, the time of under room temperature and 100 ℃, measuring resistance respectively changes, and estimates the stability of resistance.More specifically; As shown in Figure 3 for sample 32; From the logarithmic chart (Log vs.Log) of resistance value and time, draw straight line, the timing definition that the resistance value of low resistance state is consistent with the resistance value of high resistance state is the resistance retention time, obtains this resistance retention time.Its result is shown in table 1 " resistance retention time " item down.
Among Fig. 3, " LRS " representes low resistance state, and " HRS " representes high resistance state, and " RT " representes room temperature.In addition, after among Fig. 4 of stating, 100 ℃ of " 100C " expressions.These also are applicable to other accompanying drawing and table 1.
In addition, the resistance retention time of obtaining as stated is the factor of evaluation that is used to check the tendency of resistance memory effect, and does not represent the actual resistance memory effect time, but carry out relatively aspect, can think sufficient factor of evaluation.
Need to prove,, only sample 14 and sample 32 are estimated about the resistance retention time under the above-mentioned room temperature.In addition, about the resistance retention time under above-mentioned 100 ℃, the sample that only above-mentioned resistance change rate is demonstrated more than 1000% is estimated.
[table 1]
Table 1 and after in the table 2 stated, the sample of band * is represented the sample beyond the scope of the present invention in specimen coding.
Can know to have the TiO that does not add any transition metal by table 1
2In the sample 1 of film, resistance change rate is little, is lower than 100%, and in addition, even in sample that is added with transition metal Cr and Mn respectively 2～6 and sample 7～11, resistance change rate is also little, is lower than 100%.
With respect to these, the TiO of any one in having Co, Fe, Ni and the Cu of interpolation as transition metal
2In the sample 12～31 of film, the sample of the resistance change rate more than 1000% appears demonstrating.That is, satisfy in the sample 12～15,17～20,22～25 and 27～30 of condition of x≤0.05, demonstrate the resistance change rate more than 1000% at addition x as Co, Fe, Ni or the Cu of transition metal.
In addition; Satisfy in the sample 13～15,18～20,23～25 and 28～30 of condition of 0.005≤x≤0.05 at addition x, obtain the resistance change rate more than 6800% with resistance change rate 8500% coupling of sample 32 as Co, Fe, Ni or the Cu of transition metal.Particularly, when its addition x satisfies the condition of 0.005≤x≤0.05, can realize surpassing 10000% very big resistance change rate for adding Co or Fe sample 13～15 and 18～20 as transition metal.
Below, be conceived to the resistance retention time.
In the sample 32 as comparative example, this tendency is as shown in Figure 4, and when room temperature was increased to 100 ℃, the time dependence of the resistance variations of low resistance state increased with temperature.As shown in table 1,100 ℃ of following resistance retention times reach 91 days, with the resistance retention time 8 * 10 under the room temperature
+ 9It relatively becomes extremely short.Considering under the situation about in the fixedness Memister, using that the resistance retention time changes greatly promptly to shorten along with the temperature rising becomes problem greatly.
With respect to this, be added with any one the TiO among Co, Fe, Ni and the Cu as transition metal having the scope that satisfies the condition of 0.005≤x≤0.05 with addition x
2In the sample 13～15,18～20,23～25 and 28～30 of film; About sample 14, as shown in Figure 5, though the resistance value of observing low resistance state process and the tendency that changes in time; But different with above-mentioned sample 32 under 100 ℃, can realize the extremely long resistance retention time.This can be confirmed by the resistance retention time shown in the table 1.
About above result, can investigate as follows.
There is not the TiO that adds
2Generate defectives such as oxygen defect on the film easily, even use the big electrode of work function that becomes schottky junction, also do not form good Schottky barrier, leakage current is big, only demonstrates the small resistor rate of change.On the other hand, be added with the TiO of transition metal
2In the film, the transition metal of interpolation forms energy level, or compensating defective, therefore, can access good Schottky barrier.
But, in transition metal, only demonstrate the small resistor rate of change about Mn and Cr.Can think that this is because interface energy level and defect level as the resistance variations cause are excessively reduced, but definite reason is still indeterminate so far.On the other hand, about Co, Fe, Ni and Cu, form good Schottky barrier, thereby can realize big resistance change rate.
About Co, Fe, Ni and Cu as transition metal; Even its addition x is 0.001; Also can realize the big resistance change rate more than 1000%, but be below 1000 days in the resistance retention time under 100 ℃, with situation as the sample 32 of comparative example be same degree.Can think that this is because addition is few, the state density of energy level of mitigation that therefore suppresses resistance is little.Think that on the other hand addition x is greater than 0.05 o'clock, TiO
2The resistance value of film self excessively rises, and is difficult to form the Schottky barrier that shows resistance variations, therefore, only demonstrates the small resistor rate of change.
As implied above; If utilize resistance memory element of the present invention; Then can be clear and definite by table 1; In practical operation temperature province (more than the room temperature), good resistance retention performance can be realized, resistance retention performance can be significantly improved as the low resistance state of the problem of Schottky barrier type resistance switching device.
Need to prove; A lot of about the indefinite place of mechanism; Still not exclusively clear and definite; But can think because the time dependence of the resistance value of low resistance state, can cause little by little that some relax (capture or the migration of the release again of the electronics that discharges or retrapping, defective etc.), for the TiO that has added effective transition metal
2Film is inferred on transition metal or electrode interface or body material, to form energy level, can make quasi-stationary state (being low resistance state) more stable, thereby can significantly improve the resistance retention performance, be the resistance memory effect.
In addition, about the sample in the scope of the present invention of in above-mentioned experimental example, making, with the TiO that has added effective transition metal
2Film carries out tem observation, and the result can know that it is a polycrystal.Can know that in addition this polycrystal helps to make the resistance retention performance of resistance memory effect, particularly low resistance state further to improve.That is,, also can not get sufficient resistance memory characteristic even utilize the Schottky barrier at the interface of electrode and film can produce big resistance variations.Thus, though mechanism is still indeterminate, can infer, the discontinuous construction of the such trapped electron of crystal boundary is set, what be easy to generate electronics captures with oxygen defect etc., in time high resistanceization takes place for the resistance that suppresses low resistance state and produces effect.
As above illustrated, resistance memory element of the present invention is owing to obtain big resistance change rate, and therefore for example can be used as, the impedance switching device advantageously utilizes.For using resistance memory element of the present invention, below describe as the execution mode under the situation of impedance switching device.
As the switching device of RF signal circuit, use the switching device of PIN diode type or the switching device of FET transistor-type usually.
Under the situation of the switching device of PIN diode type, the low resistance state when applying forward bias is as opening state, and the high resistance state when applying reverse biased thus, is realized the ON/OFF of RF signal circuit as off status.On the other hand, under the situation of the switch of FET transistor-type, the low resistance state when applying gate voltage is as opening state, and the high resistance state when not applying gate voltage thus, is realized the ON/OFF of RF signal circuit as off status.
But, in the switching device of PIN diode type, in order to become out state; Need PIN diode just upwards apply voltage, in addition, in order to keep out state; Need just upwards be continuously applied voltage, but owing to be low resistance state under this state, therefore; Considerable electric current flows through, and has the very large problem of power consumption.
On the other hand, under the situation of the switching device of FET transistor-type, even owing on grid, also do not have too big electric current to flow through under the gate voltage state applying, so power consumption is little, but have in order to keep out the problem that state need be continuously applied gate voltage.In addition, with the situation of the switching device of PIN diode type relatively, also have the high problem of complex structure thereby cost.
With respect to these, under the situation of utilization,, can impedance be changed along with resistance variations as the resistance memory element of schottky junction device of the present invention, identical with the situation of PIN diode, can be used as the impedance switching device and use.In addition, resistance memory element of the present invention has the resistance memory function, therefore, after switching to low resistance state, need not be continuously applied voltage, thereby can reduce power consumption.Therefore, can solve as the problem of the power consumption of PIN diode type shortcoming and as the two the problem that need be continuously applied voltage in order to keep out state of shortcoming of PIN diode type and FET transistor-type.
Need to prove, for the device of realizing addressing the above problem, known all the time, for example SrTiO
3/ SrRuO
3Deng contact resistance change in the element (engage opposing and change sub-prime), resistance change rate and resistance memory characteristic are insufficient.
Shown in resistance memory element of the present invention, at TiO
2The middle transition metal that adds is at TiO
2Band gap in form energy level, thus, resistance change rate is big, can realize the impedance switching device of resistance memory characteristic good.Experimental example about implementing for this is confirmed below describes.
[experimental example 2]
In the experimental example 2, use the sample of making in the above-mentioned experimental example 1, carry out the impedance frequency characteristic evaluation under high resistance state and the low resistance state.
In this evaluation test; Use the current/voltage generator identical with the situation of experimental example 1; Sample is applied potential pulse, thus, make resistance states switch to high resistance state and low resistance state respectively; Then, use LCR tester (Hewlett-Packard corporate system " HP4284 ") to carry out the evaluation of impedance frequency characteristic in the frequency band territory of 100Hz～1MHz.Then, obtain the impedance of the high resistance state under the 10kHz and the impedance of low resistance state respectively by the frequency characteristic of being obtained, and based on
Impedance * 100 of impedance rate of change [%]=(impedance of the impedance-low resistance state of high resistance state)/low resistance state
Formula calculate impedance rate of change.Its result is shown in table 2.Need to prove, in the table 2, put down in writing " the interpolation element " shown in the table 1, " addition " and " resistance change rate " once more, so that understand the particularly correlation of resistance change rate and impedance rate of change easily.In addition, in the table 2, impedance rate of change is that 0% situation is meant and is almost 0%, says so below 5% exactly.
[table 2]
Shown in experimental example 1, in the sample 32 as comparative example, the resistance memory bad characteristic, resistance change rate is 8500%, can realize bigger resistance variation characteristic.The impedance operator evaluation result of this sample 32 is shown in Fig. 6.According to sample 32, can realize big resistance change rate through D.C. resistance, but the difference of impedance under this high resistance state and the impedance under the low resistance state is little, in addition, along with becoming high-frequency, this difference is further dwindled.By shown in the table 2, among the frequency 10kHz, impedance rate of change is 50%, and is very little.
On the other hand, represent the sample 13～15,18～20,23～25 and 28～30 in the scope of the present invention, the impedance operator of sample 14 is shown in Fig. 7.Same with the situation of sample 32 shown in Figure 6; In sample 14, along with becoming higher frequency, because the difference of the impedance of the problem of voxel is dwindled; But it is very large poor to have at low-frequency region; As shown in table 2, frequency 10kHz middle impedance rate of change is 7750%, can realize very large value.
By shown in the table 2, also can be described as same for other sample within the scope of the invention.
That is, about the sample in the scope of the present invention 13～15,18～20,23～25 and 28～30, when realizing big resistance change rate, the impedance rate of change under frequency 10kHz also surpasses 3000%, can realize very large impedance rate of change.
With respect to this, in the sample 32 as comparative example, with sample 13～15,18～20,23～25 and 28～30 comparisons in the scope of the present invention; Even obtain almost equal big resistance change rate; As stated, be 50% for impedance rate of change, also very little.
Its supposition: impedance (Z) is not only resistance components (R) and is the impedance of the combination of static capacity composition (C) and inductance composition (L); In the sample 13～15,18～20,23～25 and 28～30 within the scope of the invention; Because not only resistance change rate is big; And low etc. the reason of the resistance ratio sample of low resistance state 32, the influence of C composition diminishes, and obtains big impedance rate of change.In addition, the resistance memory characteristic also has very big contribution, under the situation of resistance memory characteristic difference, think that the resistance of low resistance state rises rapidly, so impedance rate of change diminishes also.
By last; According to resistance memory element of the present invention, not only can realize big resistance change rate, good resistance memory characteristic, and can realize big impedance rate of change; Not only can be used as the resistance memory device that utilizes resistance variations, and can be used as the impedance switching device and use effectively.
In addition; The resistance memory element of making in this experimental example; Restriction makes the frequency band of impedance variations; But the low capacityization that causes through the fine structure by the oxide semiconductor of composed component body etc., expectation can improve characteristic in the high-frequency side, thinks and in wideer frequency band, can use as the impedance switching device of low power consumption.
In addition; The resistance memory element of the application of the invention; Not only can realize two states of high resistance state and low resistance state, i.e. " 0 " and " 1 " these two values; And can be implemented at least a interlaminated resistance state between high resistance state and the low resistance state, be preferably a plurality of interlaminated resistance states.
In the resistance memory element of the present invention; About the aforesaid mechanism that can carry out good many-valuedization; Indefinite place is a lot, but near the interface energy level the electrode the capturing and discharge again or the migration of oxygen defect etc. also is considered to the reason as the cause of resistance variations of electronics.As constitute shown in the situation of compound semiconductor of the element body that possesses in the resistance memory element of the present invention, can think, when adding transition metal; It forms interface and body material energy level (bulk level), therefore, and status number increase that can trapped electron; Or cause that valence mumber changes; This eliminates the imbalance of the electric charge that is produced by the defective of migration, and its result realizes good memory characteristic.Think through applying potential pulse, change the degree of capturing or moving of electronics, realize many-valuedization thus.
[experimental example 3]
In the experimental example 3, carry out many-valuedization, estimate for the resistance memory element that uses the sample of making in the experimental example 1 14.
More detailed; After switching to high resistance state, apply when being used to switch to the potential pulse of low resistance state, as shown in Figure 8; With the size of switched voltage, be that pulse amplitude is fixed as-5V; On the other hand, pulse duration is slowly prolonged in the scope of 100ns～100 μ s, carry out the mensuration of resistance value simultaneously.Voltage during mensuration shows work " read-out voltage (Read voltage) " in Fig. 8.
It is more specifically as shown in Figure 9,
(1) measure 3 initial stage resistance states (HRS),
(2) then, after applying 1 subpulse amplitude and being the pulse voltage of 100ns, measure the resistance value of 3 times first interlaminated resistance states (MRS1) for-5V, pulse duration,
(3) then, apply 1 subpulse width longer be the pulse voltage of 1 μ s after, measure the resistance value of 3 times second interlaminated resistance states (MRS2),
(4) then, apply 1 subpulse width longer be the pulse voltage of 10 μ s after, measure the resistance value of 3 order, three interlaminated resistance states (MRS3),
(5) then, apply 1 subpulse width longer be the pulse voltage of 100 μ s after, measure the resistance value of 3 low resistance states (LRS).
Can know by Fig. 9,, can set a plurality of at state (MRS) from having median between high resistance state (HRS) to the low resistance state (LRS) through changing the pulse duration of switched voltage.
Then, with above-mentioned opposite, after switching to low resistance state; Apply when being used to switch to the potential pulse of high resistance state, shown in figure 10, pulse amplitude is fixed as+5V; On the other hand, pulse duration is slowly prolonged in the scope of 100ns～100 μ s, carry out the mensuration of resistance value simultaneously.More specifically, shown in figure 11,
(6) measure 3 initial stage resistance states (LRS),
(7) then, after applying 1 subpulse amplitude and being the pulse voltage of 100ns, measure the resistance value of 3 times first interlaminated resistance states (MRS1) for+5V, pulse duration,
(8) then, apply 1 subpulse width longer be the pulse voltage of 1 μ s after, measure the resistance value of 3 times second interlaminated resistance states (MRS2),
(9) then, apply 1 subpulse width longer be the pulse voltage of 10 μ s after, measure the resistance value of 3 order, three interlaminated resistance states (MRS3),
(10) then, apply 1 subpulse width longer be the pulse voltage of 100 μ s after, measure the resistance value of 3 high resistance states (HRS).
Can know by Figure 11,, can set a plurality of at state (MRS) from having median between low resistance state (LRS) to the high resistance state (HRS) through changing the pulse duration of switched voltage.
[experimental example 4]
In the experimental example 4, same with the situation of experimental example 3, carry out many-valuedization for the resistance memory element that uses the sample of making in the experimental example 1 14, estimate.Different with experimental example 3 is the mode that applies of pulse voltage.
Promptly; After switching to high resistance state, apply when being used to switch to the potential pulse of low resistance state, shown in figure 12; The pulse duration of switched voltage is fixed as 100 μ s; On the other hand, with pulse amplitude-1V～-scope of 5V in the slow increase of absolute value, carry out the mensuration of resistance value simultaneously.Voltage during mensuration shows work " read-out voltage " in Figure 12.
More specifically, shown in figure 13,
(1) measure 3 initial stage resistance states (HRS),
(2) then, after the pulse voltage that to apply 1 subpulse width be 100 μ s, pulse amplitude for-1V, measure the resistance value of 3 times first interlaminated resistance states (MRS1),
(3) then, apply 1 time pulse amplitude increased in absolute value-pulse voltage of 2V after, measure the resistance value of 3 times second interlaminated resistance states (MRS2),
(4) then, apply 1 time pulse amplitude increased in absolute value-pulse voltage of 3V after, measure the resistance value of 3 order, three interlaminated resistance states (MRS3),
(5) then, apply 1 time pulse amplitude increased in absolute value-pulse voltage of 4V after, measure the resistance value of 3 low resistance states (LRS).
Can know by Figure 13,, can set a plurality of at state (MRS) from having median between high resistance state (HRS) to the low resistance state (LRS) through changing the pulse amplitude of switched voltage.
Then, with above-mentioned opposite, after switching to low resistance state; Apply when being used to switch to the potential pulse of high resistance state, shown in figure 14, pulse duration is fixed as 100 μ s; On the other hand, with pulse amplitude+2V～+ slowly increase in the scope of 5V, carry out the mensuration of resistance value simultaneously.More specifically, shown in figure 15,
(6) measure 3 initial stage resistance states (LRS),
(7) then, after the pulse voltage that to apply 1 subpulse width be 100 μ s, pulse amplitude for+2V, measure the resistance value of 3 times first interlaminated resistance states (MRS1),
(8) then, apply 1 time pulse amplitude increased to+pulse voltage of 3V after, measure the resistance value of 3 times second interlaminated resistance states (MRS2),
(9) then, apply 1 time pulse amplitude increased to+pulse voltage of 4V after, measure the resistance value of 3 order, three interlaminated resistance states (MRS3),
(10) then, apply 1 time pulse amplitude increased to+pulse voltage of 5V after, measure the resistance value of 3 high resistance states (HRS).
Can know by Figure 15,, can set a plurality of at state (MRS) from having median between low resistance state (LRS) to the high resistance state (HRS) through changing the pulse amplitude of switched voltage.
More than, can know by experimental example 3 and 4, according to resistance memory element of the present invention; Can realize big resistance variations, therefore, even can obtain getting the resistance difference that a plurality of medians also can be discerned; In addition, because the resistance retention performance is good, therefore can realize stable many-valuedization.
Need to prove, in the experimental example 3 and 4,, realize multiple resistance states, but, also can realize multiple resistance states through changing the number of times that applies of potential pulse through changing the pulse duration and the pulse amplitude of the potential pulse that will apply respectively.
In addition; In the experimental example 3 and 4; Change resistance value interimly, but also can be to apply the pulse voltage that pulse duration, pulse amplitude or pulse with regulation apply number of times, be used for once switching to desired resistance value rather than interim the occupation mode that changes resistance value.
In addition; If making the potential pulse that will apply is opposite polarity, though then from low resistance state to the process of high resistance state, also can be back to low resistance state; Even or on the contrary from high resistance state to the process of low resistance state, also can be back to high resistance state.
Symbol description
1 resistance memory element
2 element body
3,4 electrodes
Claims (9)
1. resistance memory element, it possesses element body and across opposed at least one pair of electrode of at least a portion of said element body,
When between said pair of electrodes, applying the switched voltage of first direction; At least a portion generation low resistanceization in said element body between said pair of electrodes; Afterwards; Even remove the switched voltage of said first direction, at least a portion between said pair of electrodes also keeps low resistance state
On the other hand; When between said pair of electrodes, applying the switched voltage of the second direction opposite with first direction, at least a portion generation high resistanceization in said element body between said pair of electrodes, afterwards; Even remove the switched voltage of said second direction; At least a portion between said pair of electrodes also keeps high resistance state, wherein
Said element body is by having general formula Ti
1-xM
xO
2Shown in the oxide semiconductor formed constitute, in the said general formula, M is at least a among Fe, Co, Ni and the Cu, and satisfies 0.005≤x≤0.05.
2. resistance memory element according to claim 1, wherein, said oxide semiconductor is a polycrystal.
3. resistance memory element according to claim 1 and 2, wherein, at least one of said pair of electrodes is by constituting with the said element body material that special base contacts that disappears.
4. according to each described resistance memory element in the claim 1～3, it is used for impedance matching.
5. resistance memory element, first and second electrodes that it possesses element body and is provided with the mode that contacts with said element body,
Said first electrode is to be made up of the material that can form the Schottky barrier that can demonstrate rectification property and resistance variation characteristic at the interface zone with said element body,
Said second electrode is to constitute by comparing the material that said element body more obtains ohmic contact with said first electrode,
Said element body is by having general formula Ti
1-xM
xO
2Shown in the oxide semiconductor formed constitute, in the said general formula, M is at least a among Fe, Co, Ni and the Cu, and satisfies 0.005≤x≤0.05.
6. the method for using of the described resistance memory element of claim 5 wherein, comprising:
Realize through first potential pulse that between said first and second electrode, applies first polarity this resistance memory element low resistance state step and
Through between said first and second electrode, applying the step that realizes the high resistance state of this resistance memory element with second potential pulse of said first opposite polarity second polarity.
7. the method for using of resistance memory element according to claim 6; Wherein, Also comprise the steps: through between said first and second electrode, applying at least a intermediate voltage pulse; Realization demonstrates at least a interlaminated resistance state of the resistance value between said low resistance state and the said high resistance state, said intermediate voltage pulse be said first polarity or said second polarity and have said first potential pulse and said second potential pulse between energy.
8. the method for using of resistance memory element according to claim 7; Wherein, Apply at least a in the number of times for being selected from pulse duration, pulse amplitude and pulse, said intermediate voltage pulse has the median of said first potential pulse and said second potential pulse.
9. according to the method for using of claim 7 or 8 described resistance memory elements, wherein, use as multivalued storage.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009038152 | 2009-02-20 | ||
| JP2009-038152 | 2009-02-20 | ||
| PCT/JP2009/065633 WO2010095295A1 (en) | 2009-02-20 | 2009-09-08 | Resistive memory element and use thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102326253A true CN102326253A (en) | 2012-01-18 |
| CN102326253B CN102326253B (en) | 2014-06-25 |
Family
ID=42633589
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200980157169.5A Expired - Fee Related CN102326253B (en) | 2009-02-20 | 2009-09-08 | Resistive memory element and use thereof |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US8542520B2 (en) |
| JP (1) | JP5459515B2 (en) |
| CN (1) | CN102326253B (en) |
| WO (1) | WO2010095295A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110556474A (en) * | 2019-08-15 | 2019-12-10 | 华中科技大学 | Ion-doped wide-bandgap semiconductor memristor and preparation method thereof |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5603721B2 (en) * | 2010-09-13 | 2014-10-08 | シャープ株式会社 | Nonvolatile semiconductor memory device and manufacturing method thereof |
| JP5656229B2 (en) * | 2011-06-27 | 2015-01-21 | 独立行政法人産業技術総合研究所 | Variable resistance nonvolatile memory element |
| WO2013125421A1 (en) * | 2012-02-21 | 2013-08-29 | 株式会社村田製作所 | Resistance switching device and method for manufacturing same |
| US9183929B2 (en) * | 2012-08-29 | 2015-11-10 | Micron Technology, Inc. | Systems, methods and devices for programming a multilevel resistive memory cell |
| KR102127137B1 (en) | 2013-12-03 | 2020-06-26 | 삼성전자주식회사 | Resistive memory device capable of increasing sensing margin by controlling interface state of cell transistors |
| FR3021151B1 (en) * | 2014-05-15 | 2017-09-15 | Commissariat Energie Atomique | METHOD FOR DETERMINING PROGRAMMING PARAMETERS FOR PROGRAMMING RESISTIVE LIVER MEMORY |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1767049A (en) * | 2004-06-30 | 2006-05-03 | 夏普株式会社 | Method for driving variable resistor element and storage device |
| US20070200158A1 (en) * | 2006-02-27 | 2007-08-30 | Samsung Electronics Co., Ltd. | Electrode structure having at least two oxide layers and non-volatile memory device having the same |
| JP2008310859A (en) * | 2007-06-12 | 2008-12-25 | Toshiba Corp | Information recording and reproducing device |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2617655B1 (en) | 1987-06-30 | 1994-05-20 | Telecommunicat Radioelect Teleph | VARIABLE MITIGATION DEVICE FOR INSERTION BETWEEN A TRANSMITTER CIRCUIT AND A CHARGE CIRCUIT |
| US6639262B2 (en) | 1993-12-10 | 2003-10-28 | Symetrix Corporation | Metal oxide integrated circuit on silicon germanium substrate |
| JPH10135715A (en) * | 1996-11-01 | 1998-05-22 | Matsushita Electric Ind Co Ltd | Superconductor signal processor |
| US6693821B2 (en) | 2001-06-28 | 2004-02-17 | Sharp Laboratories Of America, Inc. | Low cross-talk electrically programmable resistance cross point memory |
| JP2004297072A (en) | 2003-03-27 | 2004-10-21 | Sharp Corp | Spin transistor magnetic random access memory device |
| JP2005197670A (en) | 2003-12-10 | 2005-07-21 | Showa Denko Kk | Gallium nitride base compound semiconductor light emitting element and its negative electrode |
| US7452740B2 (en) | 2003-12-10 | 2008-11-18 | Showa Denko K.K. | Gallium nitride-based compound semiconductor light-emitting device and negative electrode thereof |
| JP2005236003A (en) | 2004-02-19 | 2005-09-02 | Sony Corp | Resistance-variable nonvolatile memory, method of manufacturing the same, method for recording, method for reproduction, method for erasure, fine structure made of resistance-variable material, and method of manufacturing fine structure made of resistance-variable material |
| WO2005117021A1 (en) * | 2004-05-03 | 2005-12-08 | Unity Semiconductor Corporation | Non-volatile programmable memory |
| US7378286B2 (en) | 2004-08-20 | 2008-05-27 | Sharp Laboratories Of America, Inc. | Semiconductive metal oxide thin film ferroelectric memory transistor |
| JP4880894B2 (en) | 2004-11-17 | 2012-02-22 | シャープ株式会社 | Semiconductor memory device structure and manufacturing method thereof |
| JP4575837B2 (en) | 2005-05-19 | 2010-11-04 | シャープ株式会社 | Nonvolatile memory element and manufacturing method thereof |
| CN101233590B (en) | 2005-07-29 | 2012-03-28 | Tdk株式会社 | Process for producing thin-film capacitor |
| WO2007138646A1 (en) * | 2006-05-25 | 2007-12-06 | Hitachi, Ltd. | Nonvolatile memory element, its manufacturing method, and semiconductor device using the nonvolatile memory element |
| JP5251506B2 (en) | 2006-07-14 | 2013-07-31 | 株式会社村田製作所 | Resistance memory element |
| JP5012891B2 (en) | 2007-03-26 | 2012-08-29 | 株式会社村田製作所 | Resistance memory element |
| US8345462B2 (en) * | 2007-12-05 | 2013-01-01 | Macronix International Co., Ltd. | Resistive memory and method for manufacturing the same |
| JP5170107B2 (en) * | 2007-12-07 | 2013-03-27 | 富士通株式会社 | Resistance change type memory device, nonvolatile memory device, and manufacturing method thereof |
| WO2009122774A1 (en) | 2008-03-31 | 2009-10-08 | 三井金属鉱業株式会社 | Capacitor-forming member and printed wiring board comprising capacitor |
-
2009
- 2009-09-08 WO PCT/JP2009/065633 patent/WO2010095295A1/en active Application Filing
- 2009-09-08 CN CN200980157169.5A patent/CN102326253B/en not_active Expired - Fee Related
- 2009-09-08 JP JP2011500450A patent/JP5459515B2/en not_active Expired - Fee Related
-
2011
- 2011-08-18 US US13/212,229 patent/US8542520B2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1767049A (en) * | 2004-06-30 | 2006-05-03 | 夏普株式会社 | Method for driving variable resistor element and storage device |
| US20070200158A1 (en) * | 2006-02-27 | 2007-08-30 | Samsung Electronics Co., Ltd. | Electrode structure having at least two oxide layers and non-volatile memory device having the same |
| JP2008310859A (en) * | 2007-06-12 | 2008-12-25 | Toshiba Corp | Information recording and reproducing device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110556474A (en) * | 2019-08-15 | 2019-12-10 | 华中科技大学 | Ion-doped wide-bandgap semiconductor memristor and preparation method thereof |
| CN110556474B (en) * | 2019-08-15 | 2021-05-18 | 华中科技大学 | Ion-doped wide-bandgap semiconductor memristor and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| US8542520B2 (en) | 2013-09-24 |
| JP5459515B2 (en) | 2014-04-02 |
| CN102326253B (en) | 2014-06-25 |
| WO2010095295A1 (en) | 2010-08-26 |
| JPWO2010095295A1 (en) | 2012-08-16 |
| US20120092919A1 (en) | 2012-04-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Zhou et al. | Voltage-triggered ultrafast phase transition in vanadium dioxide switches | |
| CN102326253A (en) | Resistive memory element and use thereof | |
| Adams et al. | Characterization of grain boundary impedances in fine-and coarse-grained Ca Cu 3 Ti 4 O 12 ceramics | |
| Fujii et al. | Electrical properties and colossal electroresistance of heteroepitaxial Sr Ru O 3∕ Sr Ti 1− x Nb x O 3 (0.0002⩽ x⩽ 0.02) Schottky junctions | |
| US7666526B2 (en) | Non-volatile resistance-switching oxide thin film devices | |
| Blom et al. | Ferroelectric schottky diode | |
| Seong et al. | HPHA effect on reversible resistive switching of Pt∕ Nb-doped SrTiO3 Schottky junction for nonvolatile memory application | |
| CN102334187B (en) | Resistive memory element and using method thereof | |
| US8872246B1 (en) | Memristor using a transition metal nitride insulator | |
| Chan et al. | Resistive switching effects of HfO2 high-k dielectric | |
| RU2468471C1 (en) | Method of obtainment of nonvolatile storage element | |
| Yin et al. | The role of Schottky barrier in the resistive switching of SrTiO 3: direct experimental evidence | |
| Guerrero et al. | Growth and characterization of epitaxial ferroelectric PbZrxTi1− xO3 thin film capacitors with SrRuO3 electrodes for non-volatile memory applications | |
| US9035273B2 (en) | Resistive switching memory device | |
| Fleck et al. | Energy dissipation during pulsed switching of strontium-titanate based resistive switching memory devices | |
| Liang et al. | Resistance switching in anodic oxidized amorphous TiO2 films | |
| JP6813844B2 (en) | Tunnel junction element and non-volatile memory element | |
| Wang et al. | Resistance switching properties of Ag/ZnMn 2 O 4/p-Si fabricated by magnetron sputtering for resistance random access memory | |
| Groppi et al. | Electrode-dependent asymmetric conduction mechanisms in K0. 5Na0. 5NbO3 micro-capacitors | |
| Seong et al. | Understanding of the switching mechanism of a Pt/Ni-doped SrTiO3 junction via current–voltage and capacitance–voltage measurements | |
| CN104393172A (en) | Interface oxygen vacancy based stable-storage resistive random access memory achieving method | |
| Razumnaya et al. | Resistive switching hysteresis in thin films of bismuth ferrite | |
| Hu et al. | Coexistence of memristive behaviors and negative capacitance effects in single-crystal $\hbox {TiO} _ {2} $ thin-film-based devices | |
| Pan et al. | A very reliable multilevel YSZ resistive switching memory | |
| Wang et al. | Effects of electrode on resistance switching properties of ZnMn 2 O 4 films deposited by magnetron sputtering |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140625 Termination date: 20210908 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |