CN102280481B - Lateral double-diffused metal-oxide semiconductor device and manufacture method thereof - Google Patents
Lateral double-diffused metal-oxide semiconductor device and manufacture method thereof Download PDFInfo
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Abstract
The invention provides a kind of lateral double-diffused metal-oxide semiconductor device and manufacture method thereof.Lateral double-diffused metal-oxide semiconductor device according to the present invention comprises: arrange a P trap in the substrate, the source region be arranged in a described P trap, the N-type drift region be arranged in a described P trap, the drain region that is arranged in the N trap in described N-type drift region and is arranged in described N trap.According to the present invention, by drain region being arranged in the N trap in N-type drift region, instead of being directly arranged in N-type drift region, reducing conducting resistance when not affecting puncture voltage and expanding SOA working range.
Description
Technical field
The present invention relates to field of semiconductor manufacture, more particularly, the present invention relates to a kind of lateral double-diffused metal-oxide semiconductor device and manufacture method thereof.
Background technology
Lateral double diffusion metal oxide semiconductor (LDMOS) device is a kind of semiconductor device well known in the art.LDMOS device is for being quite similar to a kind of FET device of conventional field effect transistor (FET) device.The same with conventional field effect transistor device, LDMOS device comprise formed in the semiconductor substrate a pair the source/drain region separated by channel region, and above channel region, form gate electrode successively.
But, the part that LDMOS device is different from traditional F ET device is, territory, pair of source/drain region in traditional FET device is made with gate electrode symmetrical, and the drain region in LDMOS device is formed further from gate electrode than source region, and drain region is formed to separate in the dopant well (having and drain region identical polar) of channel region and drain region simultaneously.LDMOS device is a kind of power metal oxide semiconductor field-effect transistor (MOSFET) of asymmetry substantially, and it has coplanar drain electrode and source region, utilizes double diffusion technique to make.At present, LDMOS due to more easily with CMOS technology compatibility and being widely adopted.
Fig. 1 schematically shows the structure of the lateral double-diffused metal-oxide semiconductor device according to prior art.Lateral double-diffused metal-oxide semiconductor device according to prior art comprises: arrange a P trap hvpw, the source region S be arranged in a described P trap in the substrate, N-type drift region ndf, the drain region D be arranged in described N-type drift region ndf be arranged in a described P trap hvpw.In addition, this lateral double-diffused metal-oxide semiconductor device also comprises the grid G between drain region D and source region S, and described grid G is positioned at above silicon chip.Wherein, shallow trench isolation is puncture voltage in order to improve device from the object of (STI).Meanwhile, owing to there being the drift region ndf of shallow doping to exist between raceway groove and drain region D, and the drift region of shallow doping is darker than STI, therefore can not exist and block being communicated with of raceway groove and drain electrode.
In the prior art, the relation utilizing puncture voltage and the size L of shallow channel isolation area STI1 on channel direction to be directly proportional, can utilize the different puncture voltage of same manufacture technics and the satisfactory device of electrical parameter.Concerning a device optimized completely, when size L is short, puncture voltage is lower, conducting resistance is low, needs the doping content of the drift region ndf of shallow doping higher simultaneously, and vice versa, and (L is long, puncture voltage is high, and conducting resistance is high, and drift region ndf concentration is low).Like this, if adopt same technique to make variable voltage device, so just can only optimize wherein one end, such as optimize high voltage one end, such drift region ndf concentration concerning one optimize voltage devices seemed lower, this i-v curve from device can be found out, as shown in Figure 2.Fig. 2 schematically shows drain voltage according to the lateral double-diffused metal-oxide semiconductor device of prior art and drain current versus's performance map.
Summary of the invention
An object of the present invention is to provide to increase at drain voltage still keeps drain voltage and drain current in the lateral double-diffused metal-oxide semiconductor device of the linear relationship of working region and manufacture method thereof effectively.
According to a first aspect of the invention, provide a kind of lateral double-diffused metal-oxide semiconductor device, it comprises: arrange a P trap in the substrate, the source region be arranged in a described P trap, the N-type drift region be arranged in a described P trap, the drain region that is arranged in the N trap in described N-type drift region and is arranged in described N trap.
Preferably, in above-mentioned lateral double-diffused metal-oxide semiconductor device, the doping content of described N trap is greater than the doping content of described N-type drift region.
Preferably, in above-mentioned lateral double-diffused metal-oxide semiconductor device, the doping content of described N trap is less than the doping content of described drain region.
Preferably, in above-mentioned lateral double-diffused metal-oxide semiconductor device, described source region is arranged in the 2nd P trap in a described P trap, and the doping content of described 2nd P trap is greater than the doping content of a described P trap.
Preferably, in above-mentioned lateral double-diffused metal-oxide semiconductor device, the side away from grid of described source region is furnished with P type tagma, and the doping content in described P type tagma is greater than the doping content of a described P trap.
According to a first aspect of the invention, by drain region being arranged in the N trap in N-type drift region, instead of be directly arranged in N-type drift region, make along with the region size on channel direction of drain region near grid side does not change, N-type doping content thus in N-type drift region for N-type drift region width be still enough (that is, not affecting puncture voltage); Conducting resistance is reduced by the N trap increased in N-type drift region, make the relation between drain voltage and leakage current still remain the relation of approximately linear along with the increase of drain voltage thus, thus maintain the service behaviour of lateral double-diffused metal-oxide semiconductor device.
According to a second aspect of the invention, provide a kind of lateral double-diffused metal-oxide semiconductor device manufacture method, it comprises: form a P trap in the substrate; Source region is formed in a described P trap;
N-type drift region is formed in a described P trap; N trap is formed in described N-type drift region; And drain region is formed in described N trap.
Preferably, in above-mentioned lateral double-diffused metal-oxide semiconductor device manufacture method, the doping content of described N trap is greater than the doping content of described N-type drift region.
Preferably, in above-mentioned lateral double-diffused metal-oxide semiconductor device manufacture method, the doping content of described N trap is less than the doping content of described drain region.
Preferably, above-mentioned lateral double-diffused metal-oxide semiconductor device manufacture method is also included in the step forming the 2nd P trap in a described P trap, thus described source region is arranged in the 2nd P trap in a described P trap, and the doping content of described 2nd P trap is greater than the doping content of a described P trap.
Preferably, above-mentioned lateral double-diffused metal-oxide semiconductor device manufacture method is also included in the step in the layout P type tagma, the side away from grid of described source region, and the doping content in described P type tagma is greater than the doping content of a described P trap.
According to a second aspect of the invention, similarly, by drain region being arranged in the N trap in N-type drift region, instead of be directly arranged in N-type drift region, make along with the region size on channel direction of drain region near grid side does not change, N-type doping content thus in N-type drift region for N-type drift region width be still enough (that is, not affecting puncture voltage); Conducting resistance is reduced by the N trap increased in N-type drift region, make the relation between drain voltage and leakage current still remain the relation of approximately linear along with the increase of drain voltage thus, thus maintain the service behaviour of lateral double-diffused metal-oxide semiconductor device.
Namely, method according to a second aspect of the invention adds one doping process, the component influences of this road doping process on high voltage one end is little (does not affect puncture voltage substantially, and conducting resistance can be improved), but concerning the device of low-voltage one end, puncture voltage is in a slight decrease, but conducting resistance is greatly improved, i-v curve is simultaneously greatly improved, and contributes to improving device reliability and expanding SOA working range.
Accompanying drawing explanation
By reference to the accompanying drawings, and by reference to detailed description below, will more easily there is more complete understanding to the present invention and more easily understand its adjoint advantage and feature, wherein:
Fig. 1 schematically shows the structure of the lateral double-diffused metal-oxide semiconductor device according to prior art.
Fig. 2 schematically shows drain voltage according to the lateral double-diffused metal-oxide semiconductor device of prior art and drain current versus's performance map.
Fig. 3 schematically shows the structure of the lateral double-diffused metal-oxide semiconductor device according to the embodiment of the present invention.
Fig. 4 schematically shows drain voltage according to the lateral double-diffused metal-oxide semiconductor device of the embodiment of the present invention and drain current versus's performance map.
Fig. 5 schematically shows the flow chart of the lateral double-diffused metal-oxide semiconductor device manufacture method according to the embodiment of the present invention.
It should be noted that, accompanying drawing is for illustration of the present invention, and unrestricted the present invention.Note, represent that the accompanying drawing of structure may not be draw in proportion.Further, in accompanying drawing, identical or similar element indicates identical or similar label.
Embodiment
In order to make content of the present invention clearly with understandable, below in conjunction with specific embodiments and the drawings, content of the present invention is described in detail.
Fig. 3 schematically shows the structure of the lateral double-diffused metal-oxide semiconductor device according to the embodiment of the present invention.As shown in Figure 3, comprise according to the lateral double-diffused metal-oxide semiconductor device of the embodiment of the present invention: arrange a P trap hvpw, the source region S be arranged in a described P trap, the N-type drift region ndf be arranged in a described P trap hvpw in the substrate, be arranged in the N trap NW in described N-type drift region ndf and be arranged in the drain region D in described N trap NW.In addition, also comprise the grid G between drain region D and source region S according to the lateral double-diffused metal-oxide semiconductor device of the embodiment of the present invention, described grid G is positioned at above silicon chip.
Wherein, a described P trap hvpw is such as high pressure P trap.
Further, the doping content of wherein said N trap NW is greater than the doping content of described N-type drift region, and the doping content of described N trap is less than the doping content of described drain region.
Preferably, as shown in Figure 3, described source region S is arranged in the 2nd P trap ptub in a described P trap hvpw, and the doping content of described 2nd P trap ptub is greater than the doping content of a described P trap hvpw.
In addition, preferably, the side away from grid G of described source region S is furnished with P type tagma B, and the doping content of described P type tagma B is greater than the doping content of a described P trap hvpw.And preferably, drain region D is furnished with the first shallow channel isolation area STI1 and the second shallow channel isolation area STI2 respectively, to isolate relevant region.Arrange that the object of shallow channel isolation area (STI) is the puncture voltage in order to improve device, and exist owing to there being the drift region of shallow doping between raceway groove and drain region D, and the drift region of shallow doping is darker than shallow channel isolation area, therefore can not exists and block being communicated with of raceway groove and drain electrode.
Fig. 4 schematically shows drain voltage VD according to the lateral double-diffused metal-oxide semiconductor device of the embodiment of the present invention and leakage current ID contrast properties figure.From the contrast of Fig. 4 and Fig. 2, compared with the lateral double diffusion metal oxide semiconductor device performance of prior art, by to emulating according to the lateral double-diffused metal-oxide semiconductor device of the embodiment of the present invention and testing discovery, the linear character of good drain voltage VD and leakage current ID still can be kept when drain voltage increases (in working region) gradually according to the lateral double-diffused metal-oxide semiconductor device of the embodiment of the present invention.
Namely, by drain region S being arranged in the N trap NW in N-type drift region ndf, instead of be directly arranged in N-type drift region ndf, make along with the region size L on channel direction of drain region near grid side does not change, N-type doping content thus in N-type drift region for N-type drift region width be still enough (that is, not affecting puncture voltage); Conducting resistance is reduced by the N trap NW increased in N-type drift region, make the relation between drain voltage and leakage current still remain the relation of approximately linear along with the increase of drain voltage thus, thus maintain the service behaviour of lateral double-diffused metal-oxide semiconductor device.
Fig. 5 schematically shows the flow chart of the lateral double-diffused metal-oxide semiconductor device manufacture method according to the embodiment of the present invention.As shown in Figure 5, can comprise the steps: according to the lateral double-diffused metal-oxide semiconductor device manufacture method of the embodiment of the present invention
First in the substrate a P trap (step S1) is formed.
The 2nd P trap (step S2) can be formed subsequently in a described P trap; After this in the 2nd P trap, source region (step S3) is formed,
Further, after step S1, N-type drift region (step S4) can be formed in a described P trap; And then form N trap NW (step S5) in described N-type drift region, the doping content of wherein said N trap NW is greater than the doping content of described N-type drift region.
After step s 5, can form drain region (step S6) in described N trap NW, the doping content of described N trap NW is less than the doping content of described drain region.
Equally preferably, said method can also be included in the step in the layout P type tagma, the side away from grid of described source region, and the doping content in described P type tagma is greater than the doping content of a described P trap.
Namely, above-mentioned technique adds one doping process to form N trap NW relative to prior art, the component influences of this road doping process on high voltage one end is little (does not affect puncture voltage substantially, and conducting resistance can be improved), but concerning the device of low-voltage one end, puncture voltage (2-3V in a slight decrease, reduce by 8%), but conducting resistance is greatly improved (reducing by 25%), i-v curve is greatly improved simultaneously, contributes to improving device reliability and expanding SOA working range.
Any those of ordinary skill in the art are understandable that, although describe manufacture method of the present invention with the order of step S1 to step S6, for the manufacturing sequence of the source electrode in substrate and drain electrode, do not need to be specifically limited; Thus the sequencing of the manufacture of source electrode and drain electrode does not cause restriction to manufacture method of the present invention.
Be understandable that, although the present invention with preferred embodiment disclose as above, but above-described embodiment and be not used to limit the present invention.For any those of ordinary skill in the art, do not departing under technical solution of the present invention ambit, the technology contents of above-mentioned announcement all can be utilized to make many possible variations and modification to technical solution of the present invention, or be revised as the Equivalent embodiments of equivalent variations.Therefore, every content not departing from technical solution of the present invention, according to technical spirit of the present invention to any simple modification made for any of the above embodiments, equivalent variations and modification, all still belongs in the scope of technical solution of the present invention protection.
Claims (8)
1. a lateral double-diffused metal-oxide semiconductor device, is characterized in that comprising: arrange a P trap in the substrate, the source region be arranged in a described P trap, the N-type drift region be arranged in a described P trap, the drain region that is arranged in the N trap in described N-type drift region and is arranged in described N trap; Wherein, described source region is arranged in the 2nd P trap in a described P trap, and the doping content of described 2nd P trap is greater than the doping content of a described P trap.
2. lateral double-diffused metal-oxide semiconductor device according to claim 1, is characterized in that, the doping content of described N trap is greater than the doping content of described N-type drift region.
3. lateral double-diffused metal-oxide semiconductor device according to claim 1 and 2, is characterized in that, the doping content of described N trap is less than the doping content of described drain region.
4. lateral double-diffused metal-oxide semiconductor device according to claim 1 and 2, it is characterized in that, the side away from grid of described source region is furnished with P type tagma, and the doping content in described P type tagma is greater than the doping content of a described P trap.
5. a lateral double-diffused metal-oxide semiconductor device manufacture method, is characterized in that comprising:
Form a P trap in the substrate;
Source region is formed in a described P trap;
N-type drift region is formed in a described P trap;
N trap is formed in described N-type drift region; And
Drain region is formed in described N trap;
In a described P trap, form the 2nd P trap, described source region is arranged in the 2nd P trap in a described P trap, and the doping content of described 2nd P trap is greater than the doping content of a described P trap.
6. lateral double-diffused metal-oxide semiconductor device manufacture method according to claim 5, is characterized in that, the doping content of described N trap is greater than the doping content of described N-type drift region.
7. the lateral double-diffused metal-oxide semiconductor device manufacture method according to claim 5 or 6, is characterized in that, the doping content of described N trap is less than the doping content of described drain region.
8. lateral double-diffused metal-oxide semiconductor device manufacture method according to claim 5, characterized by further comprising the step of arranging P type tagma in the side away from grid of described source region, and the doping content in described P type tagma is greater than the doping content of a described P trap.
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| KR102248307B1 (en) * | 2014-09-01 | 2021-05-04 | 에스케이하이닉스 시스템아이씨 주식회사 | Power integrated device, and electronic device and electronic system having the power integrated device |
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| CN102088031A (en) * | 2009-12-03 | 2011-06-08 | 无锡华润上华半导体有限公司 | N-type laterally diffused metal oxide semiconductor (NLDMOS) device and manufacturing method thereof |
| KR20110078861A (en) * | 2009-12-31 | 2011-07-07 | 주식회사 동부하이텍 | Lateral double diffused metal oxide semiconductor |
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| CN102088031A (en) * | 2009-12-03 | 2011-06-08 | 无锡华润上华半导体有限公司 | N-type laterally diffused metal oxide semiconductor (NLDMOS) device and manufacturing method thereof |
| KR20110078861A (en) * | 2009-12-31 | 2011-07-07 | 주식회사 동부하이텍 | Lateral double diffused metal oxide semiconductor |
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