CN102263200A - Organic field effect transistor and preparation method thereof - Google Patents
Organic field effect transistor and preparation method thereof Download PDFInfo
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- CN102263200A CN102263200A CN2010101817863A CN201010181786A CN102263200A CN 102263200 A CN102263200 A CN 102263200A CN 2010101817863 A CN2010101817863 A CN 2010101817863A CN 201010181786 A CN201010181786 A CN 201010181786A CN 102263200 A CN102263200 A CN 102263200A
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Abstract
The invention discloses an organic field effect transistor and a preparation method thereof and belongs to the field of organic electronics. The transistor comprises an insulating substrate, and a source electrode, a dielectric layer, a gate electrode, an organic semiconductor layer, an insulating layer and a drain electrode which are arranged on the insulating substrate, wherein the drain electrode is positioned on the insulating substrate, and is in contact with the insulating substrate; the dielectric layer, the organic semiconductor layer and the insulating layer are positioned on the drain electrode, and are in contact with the drain electrode; the center of the source electrode is provided with a round hole; the source electrode is positioned on the insulating layer and the organic semiconductor layer, and is in contact with the insulating layer and the organic semiconductor layer; the gate electrode is columnar, and is positioned in the center of the transistor and wrapped by the dielectric layer; and the organic semiconductor layer is tubular, and is wrapped about the dielectric layer. In the invention, a low temperature process is adopted, conventional planar tunnels are changed into vertical tunnels, and the tunnel length of the transistor can be controlled by controlling the thickness of a thin film of the organic semiconductor layer to greatly reduce difficulties in the preparation of short-tunnel organic transistors, thereby reducing preparation cost.
Description
Technical field
The invention belongs to organic electronic and learn field, particularly a kind of organic field effect tube and preparation method thereof.
Background technology
Along with deepening continuously of information technology, electronic product has entered each link of people's life and work; People are increasing to the demand of low cost, flexibility, low weight, portable electronic product in daily life; Traditional device and circuit based on inorganic semiconductor material are difficult to satisfy these requirements, and the organic microelectric technique based on the organic polymer semi-conducting material that therefore can realize these characteristics has obtained people and more and more paid close attention under this trend.
Organic field effect tube is as the basic device of organic circuit, and its performance is to the performance decisive role of circuit.Wherein mobility has determined the speed of device work, and then influences the operating frequency of circuit; Voltage comprises operating voltage and threshold voltage, has determined the power consumption of device and circuit.Because the amount of information explosive growth, people wish that all the time the information processing technology can be more and more faster, and the content that can handle is more and more.The factor of restriction information processing technology speed has a lot, comprises hardware aspect, also comprises the software aspect.The operating frequency of unit component is the basic problem of hardware aspect.The operating frequency that improves device mainly contains two paths: Yi Tiaolu and reduces channel length, and another road is to improve the mobility of charge carrier rate.Under the situation that does not have important breakthrough aspect the present material, the mobility of charge carrier rate improves very limited, and the method that therefore improves the device operating frequency mainly is exactly the length that reduces raceway groove.The factor of restriction information processing technology capacity equally also has a lot, mainly is the integrated level of circuit at hardware aspect, and the integrated level that improves circuit need reduce the area of unit component.Therefore, also there is the defective that the device operating frequency is low, circuit level is low in existing organic field effect tube.Summary of the invention
The technical problem to be solved in the present invention provides a kind of organic field effect tube that improves device operating frequency and circuit level.
Another object of the present invention is to provide a kind of preparation method of organic field effect tube.
In order to achieve the above object, the technical solution used in the present invention is:
A kind of organic field effect tube comprises dielectric substrate and source electrode, dielectric layer, gate electrode, organic semiconductor layer, insulating barrier and drain electrode on described dielectric substrate, and described drain electrode is positioned on the described dielectric substrate, and contacts with described dielectric substrate; Described dielectric layer, organic semiconductor layer and insulating barrier are positioned on the described drain electrode, and contact with described drain electrode; Described source electrode central authorities are provided with a circular hole, and described source electrode is positioned on described insulating barrier and the organic semiconductor layer, and contacts with organic semiconductor layer with described insulating barrier; Described gate electrode is the column gate electrode, is positioned at described transistor central authorities, is wrapped by described dielectric layer, and described dielectric layer is kept apart described gate electrode and source electrode, drain electrode; Described organic semiconductor layer is the tubulose organic semiconductor layer, is wrapped in around the described dielectric layer.
In the such scheme, described source electrode and drain electrode are planar metal electrode.
In the such scheme, the height of described organic semiconductor layer is less than the height of described dielectric layer, and the height of described dielectric layer is less than the height of described column gate electrode.
In the such scheme, described dielectric substrate is long silicon chip, insulating glass or the ambroin film that silica or insulating silicon nitride film are arranged.
In the such scheme, described dielectric layer and insulating barrier are inorganic material or organic material.
In the such scheme, the material of described organic semiconductor layer is pentacene, CuPc, P3HT, thiophene or red glimmering rare.
In the such scheme, described gate material is metallic conduction material or conductive organic matter.
In the such scheme, described source electrode, drain electrode material are that high official letter is counted metal material or conductive organic matter.
A kind of preparation method of organic field effect tube, the step of this method is as follows:
(1) drain electrode on preparation plane on dielectric substrate;
(2) metallization medium layer on described drain electrode layer;
(3) preparation column gate electrode on described dielectric layer;
(4) metallization medium layer around described column gate electrode, and remove column district dielectric layer in addition;
(5) around dielectric layer, deposit the organic semiconductor layer of tubulose, and remove the organic semiconductor beyond the column district;
(6) depositing insulating layer on described drain electrode;
(7) the source electrode on preparation plane on described organic semiconductor layer and insulating barrier.
In the such scheme, in described step (1), the concrete grammar of the drain electrode on preparation plane is: adopt the hot physical deposition of vacuum, electron beam deposition or splash-proofing sputtering metal electrode; Or employing inkjet printing or spin coating organic substance electrode.
In the such scheme, in described step (2), the concrete grammar of preparation dielectric layer is: adopt the method for low-pressure chemical vapor deposition, sputter or ald to prepare the inorganic medium layer; Or adopt spin coating or inkjet printing methods to deposit organic dielectric layer.
In the such scheme, in described step (3), the concrete grammar of preparation column gate electrode is: adopt photoetching technique to define its corresponding glue pattern of carving, come plated metal by methods such as electron beam evaporation, sputter or thermal evaporations again, come transition diagram by the method for metal-stripping at last, thereby prepare the cylindrical metal gate electrode; Perhaps adopt inkjet technology to deposit and the graphical organic gate electrode of column.
In the such scheme, in described step (4), the concrete grammar of preparation dielectric layer is: the inorganic medium layer deposits by the method for low-pressure chemical vapor deposition, sputter or ald, make it have good step coverage, be wrapped in around the column gate electrode, then by photoetching and anisotropic dry etching the material removal medium beyond the column district sidewall, thereby obtain the dielectric layer of tubulose; Organic dielectric layer comes the deposition medium film by spin coating technique, after the annealed processing again by photoetching technique definition figure, at last by lithographic technique the material removal medium beyond the column district, thereby obtain the dielectric layer of tubulose.
In the such scheme, in described step (5), the concrete grammar of preparation organic semiconductor layer is: organic semiconductive layer prepares film by spin coating technique at a slow speed, makes it have good step coverage, is wrapped in around the dielectric layer; By anisotropic dry etching the organic semiconducting materials beyond the column district sidewall is removed then, thereby obtained the tubulose organic semiconductor layer.
In the such scheme, in described step (6), the concrete grammar of preparation insulating barrier is: at first by photoetching technique the column district is protected with photoresist, pass through low-pressure chemical vapor deposition then, sputter or Atomic layer deposition method deposit inorganic insulation layer, perhaps, deposit organic insulator by spin coating method; Remove the photoresist in column district and unnecessary insulating barrier then.
In the such scheme; in described step (7); the concrete grammar of the drain electrode on preparation plane is: at first by photoetching technique the column district is protected with photoresist; come the deposit metal electrodes film by the hot physical deposition of vacuum, electron beam deposition or sputtering technology then; perhaps adopt inkjet printing or spin coating technique to come the sedimentary organic material electrode film; go then to remove the photoresist of column gate electrode area and unnecessary electrode material, finish the whole transistor preparation by the method for peeling off.
Compared with prior art, technical solution of the present invention has following beneficial effect:
The column gate electrode vertical channel organic field-effect transistor that the present invention proposes, by raceway groove is improved to vertical-type by traditional plane, thereby as long as the channel length that the film thickness by controlling organic semiconductor layer just can oxide-semiconductor control transistors, avoided the lower electron beam lithography of service efficiency, reduce the difficulty of preparation short channel organic transistor significantly, thereby reduced the cost of preparation.The present invention can effectively reduce the device area occupied, improves the integrated level of circuit.
The present invention also provides the preparation method of column gate electrode vertical channel organic field-effect transistor, adopts low temperature process, can not cause damage to ready-made other organic functional thin films, and can with existing silicon micromachining technology compatibility.
Description of drawings
The three-dimensional structure diagram of the column gate electrode vertical channel organic field-effect transistor that Fig. 1 provides for the embodiment of the invention;
The profile of the column gate electrode vertical channel organic field-effect transistor that Fig. 2 provides for the embodiment of the invention;
The flow chart of the preparation column gate electrode vertical channel organic field-effect transistor that Fig. 3 provides for the embodiment of the invention;
Fig. 3-1 is the embodiment of the invention prepares drain electrode on dielectric substrate a schematic diagram;
Fig. 3-2 is the schematic diagram of embodiment of the invention metallization medium layer on drain electrode layer;
Fig. 3-3 is the embodiment of the invention prepares the column gate electrode on dielectric layer a schematic diagram;
Fig. 3-4 is wrapped in the schematic diagram of the dielectric layer on the gate electrode for embodiment of the invention deposition;
Fig. 3-5 deposits the schematic diagram of organic semiconductor layer around dielectric layer for the embodiment of the invention;
Fig. 3-6 is the schematic diagram of embodiment of the invention depositing insulating layer on drain electrode;
Fig. 3-7 is the embodiment of the invention prepares the source electrode on insulating barrier a schematic diagram;
Fig. 4 prepares the method flow diagram of organic field effect tube for the present invention's one specific embodiment;
Fig. 4-1～Fig. 4-9 prepares the structural representation of organic field effect tube process for the present invention's one specific embodiment.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
Referring to Fig. 1 and Fig. 2, the embodiment of the invention provides a kind of organic field effect tube, comprises the source electrode 107 on drain electrode 102, dielectric layer 103, gate electrode 104, organic semiconductor layer 105, insulating barrier 106 and the plane on dielectric substrate 101 and the plane on described dielectric substrate 101; The drain electrode 102 on plane is positioned on the dielectric substrate 101, and contacts with dielectric substrate 101; Dielectric layer 103, organic semiconductor layer 105 and insulating barrier 106 are positioned on the drain electrode 102 on plane, and contact with the drain electrode 102 on plane; Source electrode 107 central authorities on plane are provided with a circular hole, and described source electrode 107 is positioned on insulating barrier 106 and the organic semiconductor layer 105, and contact with organic semiconductor layer 105 with insulating barrier 106; Gate electrode 104 is the column gate electrode, is positioned at described transistor central authorities, is wrapped by dielectric layer 103, and dielectric layer 103 is kept apart the source electrode 107 on gate electrode 104 and plane, the drain electrode 102 on plane; Organic semiconductor layer 105 is the tubulose organic semiconductor layer, is wrapped in around the dielectric layer 103.
Dielectric substrate is silicon chip, insulating glass or the ambroin film etc. that insulation films such as silica, silicon nitride are arranged.
When the material of dielectric layer and insulating barrier is inorganic material, can be inorganic material such as silica, silicon nitride, zirconia, aluminium oxide, tantalum oxide or hafnium oxide, when the material of dielectric layer and insulating barrier is organic material, can be polyimides (PI), polyethylene pyrrolidone (PVP), polymethyl acrylate (PMMA) or Parylene organic materials such as (parylene).
The material of organic semiconductor layer is pentacene, CuPc (CuPc), P3HT, thiophene or red glimmering organic semiconducting materials such as rare.
The material of gate electrode is conductive organic matters such as metallic conduction materials such as gold, aluminium, platinum, copper or silver, or PEDOT:PSS.
The material of source electrode and drain electrode is that gold, platinum, silver-colored contour official letter are counted conductive organic matters such as metal material or PEDOT:PSS.
The organic field effect tube that the embodiment of the invention proposes, by raceway groove is improved to vertical-type by traditional plane, thereby as long as the channel length that the film thickness by controlling organic semiconductor layer just can oxide-semiconductor control transistors, avoided the lower electron beam lithography of service efficiency, reduce the difficulty of preparation short channel organic transistor significantly, thereby reduced the cost of preparation.The present invention can effectively reduce the device area occupied, improves the integrated level of circuit.
Referring to Fig. 3 and Fig. 3-1～Fig. 3-7, the invention provides a kind of preparation method of organic field effect tube, the step of this method is as follows:
301, the drain electrode on preparation plane on dielectric substrate is shown in Fig. 3-1;
302, metallization medium layer on drain electrode layer makes its graphical so that isolate gate electrode and drain electrode, shown in Fig. 3-2;
303, preparation column gate electrode on the described dielectric layer of step 302 is shown in Fig. 3-3;
304, metallization medium layer makes around its gate electrode that is wrapped in column, removes column district dielectric layer in addition by lithographic technique, as shown in Figure 3-4;
305, the deposition organic semiconductor layer is wrapped in around the gate medium it, removes column district organic semiconductor in addition by lithographic technique, shown in Fig. 3-5;
306, depositing insulating layer is shown in Fig. 3-6;
307, the source electrode on preparation plane is shown in Fig. 3-7.
Describe an embodiment who more optimizes below in detail:
The organic field effect tube that present embodiment provides comprises: thermal oxidation silicon dielectric substrate 401, the Au drain electrode on plane, column Au metal gate electrode, tubulose SiO
2Dielectric layer, tubulose pentacene organic semiconductor layer, SiO
2The Au source electrode on insulating barrier and plane.
Referring to Fig. 4, Fig. 4 is the preparation method's of the organic field effect tube that provides of present embodiment a concrete process chart; Referring to Fig. 4-1～Fig. 4-9, Fig. 4-1～Fig. 4-the 9th, in conjunction with the making flow chart that the processing step of Fig. 4 is made, its step of explaining is as follows:
501, at the SiO of thermal oxide growth
2Preparation plane Au drain electrode 402 on the dielectric substrate 401 is shown in Fig. 4-1;
502, on drain electrode layer, pass through electron-beam evaporation SiO
2Dielectric layer 403 is shown in Fig. 4-2;
503, add the graphical SiO of lithographic technique by photoetching
2 Dielectric layer 403 is shown in Fig. 4-3;
504, the glue pattern 404 for preparing the column gate electrode by photoetching technique is shown in Fig. 4-4;
505, electron-beam evaporation Au film, then by lift-off technology at SiO
2Preparation Au gate electrode 405 on the dielectric layer 403 is shown in Fig. 4-5.
506, prepare SiO by technique for atomic layer deposition
2Dielectric layer 406 makes around its gate electrode that is wrapped in column, and removes column district dielectric layer in addition by lithographic technique, shown in Fig. 4-6;
507, deposition organic semiconductor layer 407 on gate dielectric layer 406 is wrapped in around the gate medium it, removes column district organic semiconductor in addition by lithographic technique, shown in Fig. 4-7;
508, by electron beam evaporation secondary deposition SiO
2Insulating barrier 408 is shown in Fig. 4-8;
509, preparation is by electron beam evaporation on insulating barrier 408, and photoetching and lithographic technique prepare Au source, plane electrode 409, shown in Fig. 4-9;
The preparation method of the organic field effect tube that the embodiment of the invention provides, adopt low temperature process, can not cause damage ready-made other organic functional thin films, and can with existing silicon micromachining technology compatibility, can make full use of existing equipment, reduce the cost of new unit preparation.
Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. organic field effect tube, comprise dielectric substrate and source electrode, dielectric layer, gate electrode, organic semiconductor layer, insulating barrier and drain electrode on described dielectric substrate, it is characterized in that: described drain electrode is positioned on the described dielectric substrate, and contacts with described dielectric substrate; Described dielectric layer, organic semiconductor layer and insulating barrier are positioned on the described drain electrode, and contact with described drain electrode; Described source electrode central authorities are provided with a circular hole, and described source electrode is positioned on described insulating barrier and the organic semiconductor layer, and contacts with organic semiconductor layer with described insulating barrier; Described gate electrode is the column gate electrode, is positioned at described transistor central authorities, is wrapped by described dielectric layer, and described dielectric layer is kept apart described gate electrode and source electrode, drain electrode; Described organic semiconductor layer is the tubulose organic semiconductor layer, is wrapped in around the described dielectric layer.
2. organic field effect tube according to claim 1 is characterized in that: described source electrode and drain electrode are planar metal electrode.
3. organic field effect tube according to claim 1 is characterized in that: the height of described organic semiconductor layer is less than the height of described dielectric layer, and the height of described dielectric layer is less than the height of described column gate electrode.
4. organic field effect tube according to claim 1 is characterized in that: described dielectric substrate is long silicon chip, insulating glass or the ambroin film that silica or insulating silicon nitride film are arranged.
5. organic field effect tube according to claim 1 is characterized in that: the material of described dielectric layer and insulating barrier is inorganic material or organic material.
6. organic field effect tube according to claim 1 is characterized in that: the material of described organic semiconductor layer is pentacene, CuPc, P3HT, thiophene or red glimmering rare.
7. organic field effect tube according to claim 1 is characterized in that: the material of described gate electrode is metallic conduction material or conductive organic matter.
8. organic field effect tube according to claim 1 is characterized in that: the material of described source electrode and drain electrode is that high official letter is counted metal material or conductive organic matter.
9. the preparation method of an organic field effect tube, it is characterized in that: described method comprises:
(1) drain electrode on preparation plane on dielectric substrate;
(2) metallization medium layer on described drain electrode layer;
(3) preparation column gate electrode on described dielectric layer;
(4) metallization medium layer around described column gate electrode, and remove column district dielectric layer in addition;
(5) around dielectric layer, deposit the organic semiconductor layer of tubulose, and remove the organic semiconductor beyond the column district;
(6) depositing insulating layer on described drain electrode;
(7) the source electrode on preparation plane on described organic semiconductor layer and insulating barrier.
10. the preparation method of organic field effect tube according to claim 9 is characterized in that:
In described step (1), the concrete grammar of the drain electrode on preparation plane is: adopt the hot physical deposition of vacuum, electron beam deposition or splash-proofing sputtering metal electrode; Perhaps, adopt inkjet printing or spin coating organic substance electrode;
In described step (2), the concrete grammar of preparation dielectric layer is: adopt the method for low-pressure chemical vapor deposition, sputter or ald to prepare the inorganic medium layer; Perhaps, adopt spin coating or inkjet printing methods deposition organic dielectric layer;
In described step (3), the concrete grammar of preparation column gate electrode is: adopt photoetching technique to define its corresponding glue pattern of carving, come plated metal by electron beam evaporation, sputter or thermal evaporation method again, come transition diagram by the method for metal-stripping at last, thereby prepare the cylindrical metal gate electrode; Perhaps, adopt inkjet technology to deposit and the graphical organic gate electrode of column;
In described step (4), the concrete grammar of preparation dielectric layer is: the inorganic medium layer deposits by the method for low-pressure chemical vapor deposition, sputter or ald, make it have good step coverage, be wrapped in around the column gate electrode, then by photoetching and anisotropic dry etching the material removal medium beyond the column district sidewall, thereby obtain the dielectric layer of tubulose; Organic dielectric layer comes the deposition medium film by spin coating technique, after the annealed processing again by photoetching technique definition figure, at last by lithographic technique the material removal medium beyond the column district, thereby obtain the dielectric layer of tubulose;
In described step (5), the concrete grammar of preparation organic semiconductor layer is: organic semiconductive layer prepares film by spin coating technique at a slow speed, makes it have good step coverage, is wrapped in around the dielectric layer; By anisotropic dry etching the organic semiconducting materials beyond the column district sidewall is removed then, thereby obtained the tubulose organic semiconductor layer;
In described step (6), the concrete grammar of preparation insulating barrier is: at first by photoetching technique the column district is protected with photoresist, deposit inorganic insulation layer by low-pressure chemical vapor deposition, sputter or Atomic layer deposition method then; Perhaps, deposit organic insulator by spin coating method; Remove the photoresist in column district and unnecessary insulating barrier then;
In described step (7), the concrete grammar of the drain electrode on preparation plane is: at first by photoetching technique the column district is protected with photoresist, come the deposit metal electrodes film by the hot physical deposition of vacuum, electron beam deposition or sputtering technology then; Perhaps, adopt inkjet printing or spin coating technique to come the sedimentary organic material electrode film, remove the photoresist of column gate electrode area and unnecessary electrode material by the method for peeling off then, finish the whole transistor preparation.
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| WO2020155432A1 (en) * | 2019-02-03 | 2020-08-06 | 中国科学院微电子研究所 | Semiconductor device and fabrication method therefor, and electronic device comprising device |
| CN112951925A (en) * | 2021-02-19 | 2021-06-11 | 上海大学 | Synaptic transistor and preparation method thereof |
| CN113013252A (en) * | 2021-02-19 | 2021-06-22 | 上海大学 | Synaptic transistor and preparation method thereof |
| WO2023173914A1 (en) * | 2022-03-14 | 2023-09-21 | 华为技术有限公司 | Vertical channel transistor structure and manufacturing method therefor |
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Application publication date: 20111130 |